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GET /api/patches/68838/?format=api
{ "id": 68838, "url": "http://patches.dpdk.org/api/patches/68838/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1587179056-133714-7-git-send-email-nicolas.chautru@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1587179056-133714-7-git-send-email-nicolas.chautru@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1587179056-133714-7-git-send-email-nicolas.chautru@intel.com", "date": "2020-04-18T03:04:11", "name": "[v4,06/11] baseband/fpga_5gnr_fec: add HW error capture", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "3289ff8e1815128ed968c0faa83f9842cd28d138", "submitter": { "id": 1314, "url": "http://patches.dpdk.org/api/people/1314/?format=api", "name": "Chautru, Nicolas", "email": "nicolas.chautru@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1587179056-133714-7-git-send-email-nicolas.chautru@intel.com/mbox/", "series": [ { "id": 9488, "url": "http://patches.dpdk.org/api/series/9488/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=9488", "date": "2020-04-18T03:04:05", "name": "drivers/baseband: PMD for FPGA 5GNR FEC", "version": 4, "mbox": "http://patches.dpdk.org/series/9488/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/68838/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/68838/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D8C06A0598;\n\tSat, 18 Apr 2020 05:06:21 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 93EAF1EA05;\n\tSat, 18 Apr 2020 05:05:33 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by dpdk.org (Postfix) with ESMTP id 6A19F1E9B6\n for <dev@dpdk.org>; Sat, 18 Apr 2020 05:05:25 +0200 (CEST)", "from orsmga006.jf.intel.com ([10.7.209.51])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 17 Apr 2020 20:05:22 -0700", "from skx-5gnr-sc12-4.sc.intel.com ([172.25.69.210])\n by orsmga006.jf.intel.com with ESMTP; 17 Apr 2020 20:05:22 -0700" ], "IronPort-SDR": [ "\n RRYckQ9RfKo2igf++33KzJhr8ZL5Z5SY/9ARLskHof3/XK3p4lqlOsAyv89pqjr0AauMPA8I8D\n JpWb13f+r/bA==", "\n K1iJizriAd2KhIwOQAmqGQLaDOywV8kRwCjY5PMvarXraxcmmvPAG0BMuPVW3BLxB0upasIHL/\n 10H38+gxpcEA==" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.72,397,1580803200\"; d=\"scan'208\";a=\"257774784\"", "From": "Nicolas Chautru <nicolas.chautru@intel.com>", "To": "dev@dpdk.org,\n\takhil.goyal@nxp.com", "Cc": "bruce.richardson@intel.com,\n\tNicolas Chautru <nicolas.chautru@intel.com>", "Date": "Fri, 17 Apr 2020 20:04:11 -0700", "Message-Id": "<1587179056-133714-7-git-send-email-nicolas.chautru@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1587179056-133714-1-git-send-email-nicolas.chautru@intel.com>", "References": "<1587179056-133714-1-git-send-email-nicolas.chautru@intel.com>", "Subject": "[dpdk-dev] [PATCH v4 06/11] baseband/fpga_5gnr_fec: add HW error\n\tcapture", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Adding HW specific parsing of error report for\nnegative scenarios. Not hit through unit test.\n\nSigned-off-by: Nicolas Chautru <nicolas.chautru@intel.com>\n---\n drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 60 +++++++++++++++++++++-\n 1 file changed, 58 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c\nindex b77e9c8..fdc4bad 100644\n--- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c\n+++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c\n@@ -519,6 +519,54 @@\n \treturn bitmap & bitmask;\n }\n \n+/* Print an error if a descriptor error has occurred.\n+ * Return 0 on success, 1 on failure\n+ */\n+static inline int\n+check_desc_error(uint32_t error_code) {\n+\tswitch (error_code) {\n+\tcase DESC_ERR_NO_ERR:\n+\t\treturn 0;\n+\tcase DESC_ERR_K_P_OUT_OF_RANGE:\n+\t\trte_bbdev_log(ERR, \"Encode block size K' is out of range\");\n+\t\tbreak;\n+\tcase DESC_ERR_Z_C_NOT_LEGAL:\n+\t\trte_bbdev_log(ERR, \"Zc is illegal\");\n+\t\tbreak;\n+\tcase DESC_ERR_DESC_OFFSET_ERR:\n+\t\trte_bbdev_log(ERR,\n+\t\t\t\t\"Queue offset does not meet the expectation in the FPGA\"\n+\t\t\t\t);\n+\t\tbreak;\n+\tcase DESC_ERR_DESC_READ_FAIL:\n+\t\trte_bbdev_log(ERR, \"Unsuccessful completion for descriptor read\");\n+\t\tbreak;\n+\tcase DESC_ERR_DESC_READ_TIMEOUT:\n+\t\trte_bbdev_log(ERR, \"Descriptor read time-out\");\n+\t\tbreak;\n+\tcase DESC_ERR_DESC_READ_TLP_POISONED:\n+\t\trte_bbdev_log(ERR, \"Descriptor read TLP poisoned\");\n+\t\tbreak;\n+\tcase DESC_ERR_CB_READ_FAIL:\n+\t\trte_bbdev_log(ERR, \"Unsuccessful completion for code block\");\n+\t\tbreak;\n+\tcase DESC_ERR_CB_READ_TIMEOUT:\n+\t\trte_bbdev_log(ERR, \"Code block read time-out\");\n+\t\tbreak;\n+\tcase DESC_ERR_CB_READ_TLP_POISONED:\n+\t\trte_bbdev_log(ERR, \"Code block read TLP poisoned\");\n+\t\tbreak;\n+\tcase DESC_ERR_HBSTORE_ERR:\n+\t\trte_bbdev_log(ERR, \"Hbstroe exceeds HARQ buffer size.\");\n+\t\tbreak;\n+\tdefault:\n+\t\trte_bbdev_log(ERR, \"Descriptor error unknown error code %u\",\n+\t\t\t\terror_code);\n+\t\tbreak;\n+\t}\n+\treturn 1;\n+}\n+\n /* Compute value of k0.\n * Based on 3GPP 38.212 Table 5.4.2.1-2\n * Starting position of different redundancy versions, k0\n@@ -985,7 +1033,7 @@\n \t\tuint16_t desc_offset)\n {\n \tunion fpga_dma_desc *desc;\n-\n+\tint desc_error;\n \t/* Set current desc */\n \tdesc = q->ring_addr + ((q->head_free_desc + desc_offset)\n \t\t\t& q->sw_ring_wrap_mask);\n@@ -999,6 +1047,11 @@\n \n \trte_bbdev_log_debug(\"DMA response desc %p\", desc);\n \n+\t*op = desc->enc_req.op_addr;\n+\t/* Check the descriptor error field, return 1 on error */\n+\tdesc_error = check_desc_error(desc->enc_req.error);\n+\t(*op)->status = desc_error << RTE_BBDEV_DATA_ERROR;\n+\n \treturn 1;\n }\n \n@@ -1008,7 +1061,7 @@\n \t\tuint16_t desc_offset)\n {\n \tunion fpga_dma_desc *desc;\n-\n+\tint desc_error;\n \t/* Set descriptor */\n \tdesc = q->ring_addr + ((q->head_free_desc + desc_offset)\n \t\t\t& q->sw_ring_wrap_mask);\n@@ -1035,6 +1088,9 @@\n \t\t(*op)->status = 1 << RTE_BBDEV_CRC_ERROR;\n \t/* et_pass = 0 when decoder fails */\n \t(*op)->status |= !(desc->dec_req.et_pass) << RTE_BBDEV_SYNDROME_ERROR;\n+\t/* Check the descriptor error field, return 1 on error */\n+\tdesc_error = check_desc_error(desc->dec_req.error);\n+\t(*op)->status |= desc_error << RTE_BBDEV_DATA_ERROR;\n \treturn 1;\n }\n \n", "prefixes": [ "v4", "06/11" ] }