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GET /api/patches/67279/?format=api
{ "id": 67279, "url": "http://patches.dpdk.org/api/patches/67279/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200327101823.12646-6-mk@semihalf.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200327101823.12646-6-mk@semihalf.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200327101823.12646-6-mk@semihalf.com", "date": "2020-03-27T10:17:59", "name": "[05/29] net/ena/base: rework interrupt moderation", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "ebe10cc69b73bdad91724d59ef41f79ab5af1bae", "submitter": { "id": 786, "url": "http://patches.dpdk.org/api/people/786/?format=api", "name": "Michal Krawczyk", "email": "mk@semihalf.com" }, "delegate": { "id": 3961, "url": "http://patches.dpdk.org/api/users/3961/?format=api", "username": "arybchenko", "first_name": "Andrew", "last_name": "Rybchenko", "email": "andrew.rybchenko@oktetlabs.ru" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200327101823.12646-6-mk@semihalf.com/mbox/", "series": [ { "id": 9077, "url": "http://patches.dpdk.org/api/series/9077/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=9077", "date": "2020-03-27T10:17:54", "name": "Update ENA driver to v2.1.0", "version": 1, "mbox": "http://patches.dpdk.org/series/9077/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/67279/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/67279/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7E9B8A0589;\n\tFri, 27 Mar 2020 11:30:05 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 94DED1C0CC;\n\tFri, 27 Mar 2020 11:29:23 +0100 (CET)", "from mail-lj1-f196.google.com (mail-lj1-f196.google.com\n [209.85.208.196]) by dpdk.org (Postfix) with ESMTP id 5BF861C08C\n for <dev@dpdk.org>; Fri, 27 Mar 2020 11:29:17 +0100 (CET)", "by mail-lj1-f196.google.com with SMTP id t17so9617974ljc.12\n for <dev@dpdk.org>; Fri, 27 Mar 2020 03:29:17 -0700 (PDT)", "from localhost.localdomain (193-106-246-138.noc.fibertech.net.pl.\n [193.106.246.138])\n by smtp.gmail.com with ESMTPSA id i11sm2789587lfo.84.2020.03.27.03.29.15\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Fri, 27 Mar 2020 03:29:15 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=semihalf-com.20150623.gappssmtp.com; s=20150623;\n h=from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding;\n bh=L4rGZkls6z+oK9UingF9l/t0LrvKB3RiUWnKcuTIYDE=;\n b=ktidsfCGkeEm17Lv6C3HNjXZGV9NdM98EaL9a8svf5NBgTi1Vb8xjOchptj0zZkVeH\n ZWYlsNS0FbcF8S+Hz+fxhDjlF5pX8NgsOS0auPPaX/RAA6P1H2/6miEzmk/QgK7IfB27\n GHZt8wFRw0UwfZrbJOAAPB2Ey6Bdy0FpL0tT/wrasN8iNoeHA3MGR2iG3wgAXbCpphla\n iT6ZbjYCAufsQqFdASHhFeR2FFFil0ZWyBP1JsJWSuvETOqg9o6TAK92tF4/q2ZcKBSi\n AWE2APPc3jLMQA2wVgghPsBza+0CalCk1u/WEPGw3fbkR0U0ySmoBXpNmKA+oC0I3X9t\n d05w==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=L4rGZkls6z+oK9UingF9l/t0LrvKB3RiUWnKcuTIYDE=;\n b=ugB/pscgkV3RZUKwgs0jK/n06TL1YPV2JT4tAUYM53fQOyKUXk0mVpMP0TntALtTVo\n x8iT3pyz1a34/4nyOG5PFBKrp+KpCCfn9nM0KluAM50PhUsmb6nsjVCfsCrdB8pRuzpS\n jrDsw86jz2BCm3oG6sPmkUIfXOjMpg8+vfl2Us8DoQdP5W8v6Ys/yMXfRmxr+mm75p9h\n abnfxAp/zOO3y64iSYIZVEgPJCPQhLIYgJWX3FglzVgKG0RExLxtDkVxhqlrs5Ei+tXf\n jU7JFIzheHEFmlAi4J2eh2RXffZMH9DKFX1iCciOD1Ydm8cFxcGmlRAKKAhHC9dkwFJC\n AsGg==", "X-Gm-Message-State": "AGi0PuYa84GDgnkS7r9r3wpDNSkHEOAg+/eeEFgH37/ptitnax2C7tjN\n ei2i21qf0mGPmoVv7cul6HnbnZEuNHvAWg==", "X-Google-Smtp-Source": "\n APiQypKjpBv3cI1f9ZVw3TiVFGYde9/U6A9LwilqtK5OHwURmtHC9KxHgZya4kQgRf0fRWRmMcbwxA==", "X-Received": "by 2002:a2e:8699:: with SMTP id l25mr6979424lji.156.1585304956352;\n Fri, 27 Mar 2020 03:29:16 -0700 (PDT)", "From": "Michal Krawczyk <mk@semihalf.com>", "To": "dev@dpdk.org", "Cc": "mw@semihalf.com, mba@semihalf.com, gtzalik@amazon.com, evgenys@amazon.com,\n igorch@amazon.com, Michal Krawczyk <mk@semihalf.com>", "Date": "Fri, 27 Mar 2020 11:17:59 +0100", "Message-Id": "<20200327101823.12646-6-mk@semihalf.com>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20200327101823.12646-1-mk@semihalf.com>", "References": "<20200327101823.12646-1-mk@semihalf.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 05/29] net/ena/base: rework interrupt moderation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This feature allows for adaptive interrupt moderation. It's not used by\nthe DPDK PMD, but is a part of the newest HAL version.\n\nSigned-off-by: Michal Krawczyk <mk@semihalf.com>\nReviewed-by: Igor Chauskin <igorch@amazon.com>\nReviewed-by: Guy Tzalik <gtzalik@amazon.com>\n---\n drivers/net/ena/base/ena_com.c | 171 +++++----------------------\n drivers/net/ena/base/ena_com.h | 154 ++----------------------\n drivers/net/ena/base/ena_plat_dpdk.h | 3 +-\n 3 files changed, 42 insertions(+), 286 deletions(-)", "diff": "diff --git a/drivers/net/ena/base/ena_com.c b/drivers/net/ena/base/ena_com.c\nindex a5753997ed..cb2114acb7 100644\n--- a/drivers/net/ena/base/ena_com.c\n+++ b/drivers/net/ena/base/ena_com.c\n@@ -1284,39 +1284,29 @@ static int ena_com_ind_tbl_convert_to_device(struct ena_com_dev *ena_dev)\n \treturn 0;\n }\n \n-static int ena_com_init_interrupt_moderation_table(struct ena_com_dev *ena_dev)\n-{\n-\tsize_t size;\n-\n-\tsize = sizeof(struct ena_intr_moder_entry) * ENA_INTR_MAX_NUM_OF_LEVELS;\n-\n-\tena_dev->intr_moder_tbl = ENA_MEM_ALLOC(ena_dev->dmadev, size);\n-\tif (!ena_dev->intr_moder_tbl)\n-\t\treturn ENA_COM_NO_MEM;\n-\n-\tena_com_config_default_interrupt_moderation_table(ena_dev);\n-\n-\treturn 0;\n-}\n-\n static void ena_com_update_intr_delay_resolution(struct ena_com_dev *ena_dev,\n \t\t\t\t\t\t u16 intr_delay_resolution)\n {\n-\tstruct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;\n-\tunsigned int i;\n+\tu16 prev_intr_delay_resolution = ena_dev->intr_delay_resolution;\n \n-\tif (!intr_delay_resolution) {\n+\tif (unlikely(!intr_delay_resolution)) {\n \t\tena_trc_err(\"Illegal intr_delay_resolution provided. Going to use default 1 usec resolution\\n\");\n-\t\tintr_delay_resolution = 1;\n+\t\tintr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION;\n \t}\n-\tena_dev->intr_delay_resolution = intr_delay_resolution;\n \n \t/* update Rx */\n-\tfor (i = 0; i < ENA_INTR_MAX_NUM_OF_LEVELS; i++)\n-\t\tintr_moder_tbl[i].intr_moder_interval /= intr_delay_resolution;\n+\tena_dev->intr_moder_rx_interval =\n+\t\tena_dev->intr_moder_rx_interval *\n+\t\tprev_intr_delay_resolution /\n+\t\tintr_delay_resolution;\n \n \t/* update Tx */\n-\tena_dev->intr_moder_tx_interval /= intr_delay_resolution;\n+\tena_dev->intr_moder_tx_interval =\n+\t\tena_dev->intr_moder_tx_interval *\n+\t\tprev_intr_delay_resolution /\n+\t\tintr_delay_resolution;\n+\n+\tena_dev->intr_delay_resolution = intr_delay_resolution;\n }\n \n /*****************************************************************************/\n@@ -2892,44 +2882,35 @@ bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev)\n \t\t\t\t\t\t ENA_ADMIN_INTERRUPT_MODERATION);\n }\n \n-int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,\n-\t\t\t\t\t\t u32 tx_coalesce_usecs)\n+static int ena_com_update_nonadaptive_moderation_interval(u32 coalesce_usecs,\n+\t\t\t\t\t\t\t u32 intr_delay_resolution,\n+\t\t\t\t\t\t\t u32 *intr_moder_interval)\n {\n-\tif (!ena_dev->intr_delay_resolution) {\n+\tif (!intr_delay_resolution) {\n \t\tena_trc_err(\"Illegal interrupt delay granularity value\\n\");\n \t\treturn ENA_COM_FAULT;\n \t}\n \n-\tena_dev->intr_moder_tx_interval = tx_coalesce_usecs /\n-\t\tena_dev->intr_delay_resolution;\n+\t*intr_moder_interval = coalesce_usecs / intr_delay_resolution;\n \n \treturn 0;\n }\n \n-int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,\n-\t\t\t\t\t\t u32 rx_coalesce_usecs)\n-{\n-\tif (!ena_dev->intr_delay_resolution) {\n-\t\tena_trc_err(\"Illegal interrupt delay granularity value\\n\");\n-\t\treturn ENA_COM_FAULT;\n-\t}\n \n-\t/* We use LOWEST entry of moderation table for storing\n-\t * nonadaptive interrupt coalescing values\n-\t */\n-\tena_dev->intr_moder_tbl[ENA_INTR_MODER_LOWEST].intr_moder_interval =\n-\t\trx_coalesce_usecs / ena_dev->intr_delay_resolution;\n-\n-\treturn 0;\n+int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,\n+\t\t\t\t\t\t u32 tx_coalesce_usecs)\n+{\n+\treturn ena_com_update_nonadaptive_moderation_interval(tx_coalesce_usecs,\n+\t\t\t\t\t\t\t ena_dev->intr_delay_resolution,\n+\t\t\t\t\t\t\t &ena_dev->intr_moder_tx_interval);\n }\n \n-void ena_com_destroy_interrupt_moderation(struct ena_com_dev *ena_dev)\n+int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,\n+\t\t\t\t\t\t u32 rx_coalesce_usecs)\n {\n-\tif (ena_dev->intr_moder_tbl)\n-\t\tENA_MEM_FREE(ena_dev->dmadev,\n-\t\t\t ena_dev->intr_moder_tbl,\n-\t\t\t (sizeof(struct ena_intr_moder_entry) * ENA_INTR_MAX_NUM_OF_LEVELS));\n-\tena_dev->intr_moder_tbl = NULL;\n+\treturn ena_com_update_nonadaptive_moderation_interval(rx_coalesce_usecs,\n+\t\t\t\t\t\t\t ena_dev->intr_delay_resolution,\n+\t\t\t\t\t\t\t &ena_dev->intr_moder_rx_interval);\n }\n \n int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev)\n@@ -2956,10 +2937,6 @@ int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev)\n \t\treturn rc;\n \t}\n \n-\trc = ena_com_init_interrupt_moderation_table(ena_dev);\n-\tif (rc)\n-\t\tgoto err;\n-\n \t/* if moderation is supported by device we set adaptive moderation */\n \tdelay_resolution = get_resp.u.intr_moderation.intr_delay_resolution;\n \tena_com_update_intr_delay_resolution(ena_dev, delay_resolution);\n@@ -2968,52 +2945,6 @@ int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev)\n \tena_com_disable_adaptive_moderation(ena_dev);\n \n \treturn 0;\n-err:\n-\tena_com_destroy_interrupt_moderation(ena_dev);\n-\treturn rc;\n-}\n-\n-void ena_com_config_default_interrupt_moderation_table(struct ena_com_dev *ena_dev)\n-{\n-\tstruct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;\n-\n-\tif (!intr_moder_tbl)\n-\t\treturn;\n-\n-\tintr_moder_tbl[ENA_INTR_MODER_LOWEST].intr_moder_interval =\n-\t\tENA_INTR_LOWEST_USECS;\n-\tintr_moder_tbl[ENA_INTR_MODER_LOWEST].pkts_per_interval =\n-\t\tENA_INTR_LOWEST_PKTS;\n-\tintr_moder_tbl[ENA_INTR_MODER_LOWEST].bytes_per_interval =\n-\t\tENA_INTR_LOWEST_BYTES;\n-\n-\tintr_moder_tbl[ENA_INTR_MODER_LOW].intr_moder_interval =\n-\t\tENA_INTR_LOW_USECS;\n-\tintr_moder_tbl[ENA_INTR_MODER_LOW].pkts_per_interval =\n-\t\tENA_INTR_LOW_PKTS;\n-\tintr_moder_tbl[ENA_INTR_MODER_LOW].bytes_per_interval =\n-\t\tENA_INTR_LOW_BYTES;\n-\n-\tintr_moder_tbl[ENA_INTR_MODER_MID].intr_moder_interval =\n-\t\tENA_INTR_MID_USECS;\n-\tintr_moder_tbl[ENA_INTR_MODER_MID].pkts_per_interval =\n-\t\tENA_INTR_MID_PKTS;\n-\tintr_moder_tbl[ENA_INTR_MODER_MID].bytes_per_interval =\n-\t\tENA_INTR_MID_BYTES;\n-\n-\tintr_moder_tbl[ENA_INTR_MODER_HIGH].intr_moder_interval =\n-\t\tENA_INTR_HIGH_USECS;\n-\tintr_moder_tbl[ENA_INTR_MODER_HIGH].pkts_per_interval =\n-\t\tENA_INTR_HIGH_PKTS;\n-\tintr_moder_tbl[ENA_INTR_MODER_HIGH].bytes_per_interval =\n-\t\tENA_INTR_HIGH_BYTES;\n-\n-\tintr_moder_tbl[ENA_INTR_MODER_HIGHEST].intr_moder_interval =\n-\t\tENA_INTR_HIGHEST_USECS;\n-\tintr_moder_tbl[ENA_INTR_MODER_HIGHEST].pkts_per_interval =\n-\t\tENA_INTR_HIGHEST_PKTS;\n-\tintr_moder_tbl[ENA_INTR_MODER_HIGHEST].bytes_per_interval =\n-\t\tENA_INTR_HIGHEST_BYTES;\n }\n \n unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev)\n@@ -3023,49 +2954,7 @@ unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *\n \n unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev)\n {\n-\tstruct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;\n-\n-\tif (intr_moder_tbl)\n-\t\treturn intr_moder_tbl[ENA_INTR_MODER_LOWEST].intr_moder_interval;\n-\n-\treturn 0;\n-}\n-\n-void ena_com_init_intr_moderation_entry(struct ena_com_dev *ena_dev,\n-\t\t\t\t\tenum ena_intr_moder_level level,\n-\t\t\t\t\tstruct ena_intr_moder_entry *entry)\n-{\n-\tstruct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;\n-\n-\tif (level >= ENA_INTR_MAX_NUM_OF_LEVELS)\n-\t\treturn;\n-\n-\tintr_moder_tbl[level].intr_moder_interval = entry->intr_moder_interval;\n-\tif (ena_dev->intr_delay_resolution)\n-\t\tintr_moder_tbl[level].intr_moder_interval /=\n-\t\t\tena_dev->intr_delay_resolution;\n-\tintr_moder_tbl[level].pkts_per_interval = entry->pkts_per_interval;\n-\n-\t/* use hardcoded value until ethtool supports bytecount parameter */\n-\tif (entry->bytes_per_interval != ENA_INTR_BYTE_COUNT_NOT_SUPPORTED)\n-\t\tintr_moder_tbl[level].bytes_per_interval = entry->bytes_per_interval;\n-}\n-\n-void ena_com_get_intr_moderation_entry(struct ena_com_dev *ena_dev,\n-\t\t\t\t enum ena_intr_moder_level level,\n-\t\t\t\t struct ena_intr_moder_entry *entry)\n-{\n-\tstruct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;\n-\n-\tif (level >= ENA_INTR_MAX_NUM_OF_LEVELS)\n-\t\treturn;\n-\n-\tentry->intr_moder_interval = intr_moder_tbl[level].intr_moder_interval;\n-\tif (ena_dev->intr_delay_resolution)\n-\t\tentry->intr_moder_interval *= ena_dev->intr_delay_resolution;\n-\tentry->pkts_per_interval =\n-\tintr_moder_tbl[level].pkts_per_interval;\n-\tentry->bytes_per_interval = intr_moder_tbl[level].bytes_per_interval;\n+\treturn ena_dev->intr_moder_rx_interval;\n }\n \n int ena_com_config_dev_mode(struct ena_com_dev *ena_dev,\ndiff --git a/drivers/net/ena/base/ena_com.h b/drivers/net/ena/base/ena_com.h\nindex dc7e0d3930..5935d024dd 100644\n--- a/drivers/net/ena/base/ena_com.h\n+++ b/drivers/net/ena/base/ena_com.h\n@@ -27,47 +27,16 @@\n /*****************************************************************************/\n /* ENA adaptive interrupt moderation settings */\n \n-#define ENA_INTR_LOWEST_USECS (0)\n-#define ENA_INTR_LOWEST_PKTS (3)\n-#define ENA_INTR_LOWEST_BYTES (2 * 1524)\n-\n-#define ENA_INTR_LOW_USECS (32)\n-#define ENA_INTR_LOW_PKTS (12)\n-#define ENA_INTR_LOW_BYTES (16 * 1024)\n-\n-#define ENA_INTR_MID_USECS (80)\n-#define ENA_INTR_MID_PKTS (48)\n-#define ENA_INTR_MID_BYTES (64 * 1024)\n-\n-#define ENA_INTR_HIGH_USECS (128)\n-#define ENA_INTR_HIGH_PKTS (96)\n-#define ENA_INTR_HIGH_BYTES (128 * 1024)\n-\n-#define ENA_INTR_HIGHEST_USECS (192)\n-#define ENA_INTR_HIGHEST_PKTS (128)\n-#define ENA_INTR_HIGHEST_BYTES (192 * 1024)\n-\n-#define ENA_INTR_INITIAL_TX_INTERVAL_USECS\t\t196\n-#define ENA_INTR_INITIAL_RX_INTERVAL_USECS\t\t4\n-#define ENA_INTR_DELAY_OLD_VALUE_WEIGHT\t\t\t6\n-#define ENA_INTR_DELAY_NEW_VALUE_WEIGHT\t\t\t4\n-#define ENA_INTR_MODER_LEVEL_STRIDE\t\t\t1\n-#define ENA_INTR_BYTE_COUNT_NOT_SUPPORTED\t\t0xFFFFFF\n+#define ENA_INTR_INITIAL_TX_INTERVAL_USECS ENA_INTR_INITIAL_TX_INTERVAL_USECS_PLAT\n+#define ENA_INTR_INITIAL_RX_INTERVAL_USECS 0\n+#define ENA_DEFAULT_INTR_DELAY_RESOLUTION 1\n+\n #define ENA_HASH_KEY_SIZE\t\t\t\t40\n \n #define ENA_HW_HINTS_NO_TIMEOUT\t\t\t\t0xFFFF\n \n #define ENA_FEATURE_MAX_QUEUE_EXT_VER\t1\n \n-enum ena_intr_moder_level {\n-\tENA_INTR_MODER_LOWEST = 0,\n-\tENA_INTR_MODER_LOW,\n-\tENA_INTR_MODER_MID,\n-\tENA_INTR_MODER_HIGH,\n-\tENA_INTR_MODER_HIGHEST,\n-\tENA_INTR_MAX_NUM_OF_LEVELS,\n-};\n-\n struct ena_llq_configurations {\n \tenum ena_admin_llq_header_location llq_header_location;\n \tenum ena_admin_llq_ring_entry_size llq_ring_entry_size;\n@@ -76,12 +45,6 @@ struct ena_llq_configurations {\n \tu16 llq_ring_entry_size_value;\n };\n \n-struct ena_intr_moder_entry {\n-\tunsigned int intr_moder_interval;\n-\tunsigned int pkts_per_interval;\n-\tunsigned int bytes_per_interval;\n-};\n-\n enum queue_direction {\n \tENA_COM_IO_QUEUE_DIRECTION_TX,\n \tENA_COM_IO_QUEUE_DIRECTION_RX\n@@ -353,7 +316,13 @@ struct ena_com_dev {\n \tstruct ena_host_attribute host_attr;\n \tbool adaptive_coalescing;\n \tu16 intr_delay_resolution;\n+\n+\t/* interrupt moderation intervals are in usec divided by\n+\t * intr_delay_resolution, which is supplied by the device.\n+\t */\n \tu32 intr_moder_tx_interval;\n+\tu32 intr_moder_rx_interval;\n+\n \tstruct ena_intr_moder_entry *intr_moder_tbl;\n \n \tstruct ena_com_llq_info llq_info;\n@@ -938,11 +907,6 @@ int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,\n */\n int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev);\n \n-/* ena_com_destroy_interrupt_moderation - Destroy interrupt moderation resources\n- * @ena_dev: ENA communication layer struct\n- */\n-void ena_com_destroy_interrupt_moderation(struct ena_com_dev *ena_dev);\n-\n /* ena_com_interrupt_moderation_supported - Return if interrupt moderation\n * capability is supported by the device.\n *\n@@ -950,12 +914,6 @@ void ena_com_destroy_interrupt_moderation(struct ena_com_dev *ena_dev);\n */\n bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev);\n \n-/* ena_com_config_default_interrupt_moderation_table - Restore the interrupt\n- * moderation table back to the default parameters.\n- * @ena_dev: ENA communication layer struct\n- */\n-void ena_com_config_default_interrupt_moderation_table(struct ena_com_dev *ena_dev);\n-\n /* ena_com_update_nonadaptive_moderation_interval_tx - Update the\n * non-adaptive interval in Tx direction.\n * @ena_dev: ENA communication layer struct\n@@ -992,29 +950,6 @@ unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *\n */\n unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev);\n \n-/* ena_com_init_intr_moderation_entry - Update a single entry in the interrupt\n- * moderation table.\n- * @ena_dev: ENA communication layer struct\n- * @level: Interrupt moderation table level\n- * @entry: Entry value\n- *\n- * Update a single entry in the interrupt moderation table.\n- */\n-void ena_com_init_intr_moderation_entry(struct ena_com_dev *ena_dev,\n-\t\t\t\t\tenum ena_intr_moder_level level,\n-\t\t\t\t\tstruct ena_intr_moder_entry *entry);\n-\n-/* ena_com_get_intr_moderation_entry - Init ena_intr_moder_entry.\n- * @ena_dev: ENA communication layer struct\n- * @level: Interrupt moderation table level\n- * @entry: Entry to fill.\n- *\n- * Initialize the entry according to the adaptive interrupt moderation table.\n- */\n-void ena_com_get_intr_moderation_entry(struct ena_com_dev *ena_dev,\n-\t\t\t\t enum ena_intr_moder_level level,\n-\t\t\t\t struct ena_intr_moder_entry *entry);\n-\n /* ena_com_config_dev_mode - Configure the placement policy of the device.\n * @ena_dev: ENA communication layer struct\n * @llq_features: LLQ feature descriptor, retrieve via\n@@ -1040,75 +975,6 @@ static inline void ena_com_disable_adaptive_moderation(struct ena_com_dev *ena_d\n \tena_dev->adaptive_coalescing = false;\n }\n \n-/* ena_com_calculate_interrupt_delay - Calculate new interrupt delay\n- * @ena_dev: ENA communication layer struct\n- * @pkts: Number of packets since the last update\n- * @bytes: Number of bytes received since the last update.\n- * @smoothed_interval: Returned interval\n- * @moder_tbl_idx: Current table level as input update new level as return\n- * value.\n- */\n-static inline void ena_com_calculate_interrupt_delay(struct ena_com_dev *ena_dev,\n-\t\t\t\t\t\t unsigned int pkts,\n-\t\t\t\t\t\t unsigned int bytes,\n-\t\t\t\t\t\t unsigned int *smoothed_interval,\n-\t\t\t\t\t\t unsigned int *moder_tbl_idx)\n-{\n-\tenum ena_intr_moder_level curr_moder_idx, new_moder_idx;\n-\tstruct ena_intr_moder_entry *curr_moder_entry;\n-\tstruct ena_intr_moder_entry *pred_moder_entry;\n-\tstruct ena_intr_moder_entry *new_moder_entry;\n-\tstruct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;\n-\tunsigned int interval;\n-\n-\t/* We apply adaptive moderation on Rx path only.\n-\t * Tx uses static interrupt moderation.\n-\t */\n-\tif (!pkts || !bytes)\n-\t\t/* Tx interrupt, or spurious interrupt,\n-\t\t * in both cases we just use same delay values\n-\t\t */\n-\t\treturn;\n-\n-\tcurr_moder_idx = (enum ena_intr_moder_level)(*moder_tbl_idx);\n-\tif (unlikely(curr_moder_idx >= ENA_INTR_MAX_NUM_OF_LEVELS)) {\n-\t\tena_trc_err(\"Wrong moderation index %u\\n\", curr_moder_idx);\n-\t\treturn;\n-\t}\n-\n-\tcurr_moder_entry = &intr_moder_tbl[curr_moder_idx];\n-\tnew_moder_idx = curr_moder_idx;\n-\n-\tif (curr_moder_idx == ENA_INTR_MODER_LOWEST) {\n-\t\tif ((pkts > curr_moder_entry->pkts_per_interval) ||\n-\t\t (bytes > curr_moder_entry->bytes_per_interval))\n-\t\t\tnew_moder_idx =\n-\t\t\t\t(enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);\n-\t} else {\n-\t\tpred_moder_entry = &intr_moder_tbl[curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE];\n-\n-\t\tif ((pkts <= pred_moder_entry->pkts_per_interval) ||\n-\t\t (bytes <= pred_moder_entry->bytes_per_interval))\n-\t\t\tnew_moder_idx =\n-\t\t\t\t(enum ena_intr_moder_level)(curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE);\n-\t\telse if ((pkts > curr_moder_entry->pkts_per_interval) ||\n-\t\t\t (bytes > curr_moder_entry->bytes_per_interval)) {\n-\t\t\tif (curr_moder_idx != ENA_INTR_MODER_HIGHEST)\n-\t\t\t\tnew_moder_idx =\n-\t\t\t\t\t(enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);\n-\t\t}\n-\t}\n-\tnew_moder_entry = &intr_moder_tbl[new_moder_idx];\n-\n-\tinterval = new_moder_entry->intr_moder_interval;\n-\t*smoothed_interval = (\n-\t\t(interval * ENA_INTR_DELAY_NEW_VALUE_WEIGHT +\n-\t\tENA_INTR_DELAY_OLD_VALUE_WEIGHT * (*smoothed_interval)) + 5) /\n-\t\t10;\n-\n-\t*moder_tbl_idx = new_moder_idx;\n-}\n-\n /* ena_com_update_intr_reg - Prepare interrupt register\n * @intr_reg: interrupt register to update.\n * @rx_delay_interval: Rx interval in usecs\ndiff --git a/drivers/net/ena/base/ena_plat_dpdk.h b/drivers/net/ena/base/ena_plat_dpdk.h\nindex 24a831f4d4..2989df8f7e 100644\n--- a/drivers/net/ena/base/ena_plat_dpdk.h\n+++ b/drivers/net/ena/base/ena_plat_dpdk.h\n@@ -307,6 +307,7 @@ void ena_rss_key_fill(void *key, size_t size);\n \n #define ENA_RSS_FILL_KEY(key, size) ena_rss_key_fill(key, size)\n \n-#include \"ena_includes.h\"\n+#define ENA_INTR_INITIAL_TX_INTERVAL_USECS_PLAT 0\n \n+#include \"ena_includes.h\"\n #endif /* DPDK_ENA_COM_ENA_PLAT_DPDK_H_ */\n", "prefixes": [ "05/29" ] }