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{
    "id": 66803,
    "url": "http://patches.dpdk.org/api/patches/66803/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1584459511-5353-20-git-send-email-venkatkumar.duvvuru@broadcom.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1584459511-5353-20-git-send-email-venkatkumar.duvvuru@broadcom.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1584459511-5353-20-git-send-email-venkatkumar.duvvuru@broadcom.com",
    "date": "2020-03-17T15:38:17",
    "name": "[19/33] net/bnxt: add support to process key tables",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "d17c3938c16a90a573c253ca3dc9ffcac62cc9a5",
    "submitter": {
        "id": 1635,
        "url": "http://patches.dpdk.org/api/people/1635/?format=api",
        "name": "Venkat Duvvuru",
        "email": "venkatkumar.duvvuru@broadcom.com"
    },
    "delegate": {
        "id": 1766,
        "url": "http://patches.dpdk.org/api/users/1766/?format=api",
        "username": "ajitkhaparde",
        "first_name": "Ajit",
        "last_name": "Khaparde",
        "email": "ajit.khaparde@broadcom.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1584459511-5353-20-git-send-email-venkatkumar.duvvuru@broadcom.com/mbox/",
    "series": [
        {
            "id": 8955,
            "url": "http://patches.dpdk.org/api/series/8955/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8955",
            "date": "2020-03-17T15:37:58",
            "name": "add support for host based flow table management",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/8955/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/66803/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/66803/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
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        "X-Received": "by 2002:a7b:c3cf:: with SMTP id t15mr5629558wmj.183.1584459581193;\n Tue, 17 Mar 2020 08:39:41 -0700 (PDT)",
        "From": "Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>",
        "To": "dev@dpdk.org",
        "Cc": "Mike Baucom <michael.baucom@broadcom.com>,\n Kishore Padmanabha <kishore.padmanabha@broadcom.com>,\n Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>",
        "Date": "Tue, 17 Mar 2020 21:08:17 +0530",
        "Message-Id": "\n <1584459511-5353-20-git-send-email-venkatkumar.duvvuru@broadcom.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "\n <1584459511-5353-1-git-send-email-venkatkumar.duvvuru@broadcom.com>",
        "References": "\n <1584459511-5353-1-git-send-email-venkatkumar.duvvuru@broadcom.com>",
        "Subject": "[dpdk-dev] [PATCH 19/33] net/bnxt: add support to process key tables",
        "X-BeenThere": "dev@dpdk.org",
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        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Mike Baucom <michael.baucom@broadcom.com>\n\nThis patch creates the classifier table entries for a flow.\n\nSigned-off-by: Mike Baucom <michael.baucom@broadcom.com>\nSigned-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\nSigned-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>\nReviewed-by: Lance Richardson <lance.richardson@broadcom.com>\nReviewed-by: Ajit Kumar Khaparde <ajit.khaparde@broadcom.com>\n---\n drivers/net/bnxt/tf_ulp/ulp_mapper.c            | 773 +++++++++++++++++++-\n drivers/net/bnxt/tf_ulp/ulp_mark_mgr.c          |  80 ++-\n drivers/net/bnxt/tf_ulp/ulp_mark_mgr.h          |  18 +\n drivers/net/bnxt/tf_ulp/ulp_template_db.c       | 896 ++++++++++++++++++++++++\n drivers/net/bnxt/tf_ulp/ulp_template_db.h       | 142 +++-\n drivers/net/bnxt/tf_ulp/ulp_template_field_db.h | 133 ++++\n drivers/net/bnxt/tf_ulp/ulp_template_struct.h   |  93 ++-\n 7 files changed, 2127 insertions(+), 8 deletions(-)\n create mode 100644 drivers/net/bnxt/tf_ulp/ulp_template_field_db.h",
    "diff": "diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c\nindex 9cfc382..a041394 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c\n@@ -19,6 +19,9 @@\n int32_t\n ulp_mapper_action_tbls_process(struct bnxt_ulp_mapper_parms *parms);\n \n+int32_t\n+ulp_mapper_class_tbls_process(struct bnxt_ulp_mapper_parms *parms);\n+\n /*\n  * Get the size of the action property for a given index.\n  *\n@@ -37,10 +40,65 @@ ulp_mapper_act_prop_size_get(uint32_t idx)\n /*\n  * Get the list of result fields that implement the flow action\n  *\n+ * ctxt [in] The ulp context\n+ *\n+ * tbl [in] A single table instance to get the key fields from\n+ *\n+ * num_flds [out] The number of key fields in the returned array\n+ *\n+ * returns array of Key fields, or NULL on error\n+ */\n+static struct bnxt_ulp_mapper_class_key_field_info *\n+ulp_mapper_key_fields_get(struct bnxt_ulp_mapper_class_tbl_info *tbl,\n+\t\t\t  uint32_t *num_flds)\n+{\n+\tuint32_t idx;\n+\n+\tif (!tbl || !num_flds)\n+\t\treturn NULL;\n+\n+\tidx\t\t= tbl->key_start_idx;\n+\t*num_flds\t= tbl->key_num_fields;\n+\n+\t/* NOTE: Need template to provide range checking define */\n+\treturn &ulp_class_key_field_list[idx];\n+}\n+\n+/*\n+ * Get the list of data fields that implement the flow.\n+ *\n+ * ctxt [in] The ulp context\n+ *\n+ * tbl [in] A single table instance to get the data fields from\n+ *\n+ * num_flds [out] The number of data fields in the returned array.\n+ *\n+ * Returns array of data fields, or NULL on error.\n+ */\n+static struct bnxt_ulp_mapper_result_field_info *\n+ulp_mapper_result_fields_get(struct bnxt_ulp_mapper_class_tbl_info *tbl,\n+\t\t\t     uint32_t *num_flds)\n+{\n+\tuint32_t idx;\n+\n+\tif (!tbl || !num_flds)\n+\t\treturn NULL;\n+\n+\tidx\t\t= tbl->result_start_idx;\n+\t*num_flds\t= tbl->result_num_fields;\n+\n+\t/* NOTE: Need template to provide range checking define */\n+\treturn &ulp_class_result_field_list[idx];\n+}\n+\n+/*\n+ * Get the list of result fields that implement the flow action.\n+ *\n  * tbl [in] A single table instance to get the results fields\n  * from num_flds [out] The number of data fields in the returned\n- * array\n- * returns array of data fields, or NULL on error\n+ * array.\n+ *\n+ * Returns array of data fields, or NULL on error.\n  */\n static struct bnxt_ulp_mapper_result_field_info *\n ulp_mapper_act_result_fields_get(struct bnxt_ulp_mapper_act_tbl_info *tbl,\n@@ -60,6 +118,106 @@ ulp_mapper_act_result_fields_get(struct bnxt_ulp_mapper_act_tbl_info *tbl,\n \treturn &ulp_act_result_field_list[idx];\n }\n \n+/*\n+ * Get the list of ident fields that implement the flow\n+ *\n+ * tbl [in] A single table instance to get the ident fields from\n+ *\n+ * num_flds [out] The number of ident fields in the returned array\n+ *\n+ * returns array of ident fields, or NULL on error\n+ */\n+static struct bnxt_ulp_mapper_ident_info *\n+ulp_mapper_ident_fields_get(struct bnxt_ulp_mapper_class_tbl_info *tbl,\n+\t\t\t    uint32_t *num_flds)\n+{\n+\tuint32_t idx;\n+\n+\tif (!tbl || !num_flds)\n+\t\treturn NULL;\n+\n+\tidx = tbl->ident_start_idx;\n+\t*num_flds = tbl->ident_nums;\n+\n+\t/* NOTE: Need template to provide range checking define */\n+\treturn &ulp_ident_list[idx];\n+}\n+\n+static int32_t\n+ulp_mapper_ident_process(struct bnxt_ulp_mapper_parms *parms,\n+\t\t\t struct bnxt_ulp_mapper_class_tbl_info *tbl,\n+\t\t\t struct bnxt_ulp_mapper_ident_info *ident)\n+{\n+\tstruct ulp_flow_db_res_params\tfid_parms;\n+\tuint64_t id = 0;\n+\tint32_t idx;\n+\tstruct tf_alloc_identifier_parms iparms = { 0 };\n+\tstruct tf_free_identifier_parms free_parms = { 0 };\n+\tstruct tf *tfp;\n+\tint rc;\n+\n+\ttfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx);\n+\tif (!tfp) {\n+\t\tBNXT_TF_DBG(ERR, \"Failed to get tf pointer\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tidx = ident->regfile_wr_idx;\n+\n+\tiparms.ident_type = ident->ident_type;\n+\tiparms.dir = tbl->direction;\n+\n+\trc = tf_alloc_identifier(tfp, &iparms);\n+\tif (rc) {\n+\t\tBNXT_TF_DBG(ERR, \"Alloc ident %s:%d failed.\\n\",\n+\t\t\t    (iparms.dir == TF_DIR_RX) ? \"RX\" : \"TX\",\n+\t\t\t    iparms.ident_type);\n+\t\treturn rc;\n+\t}\n+\n+\tid = (uint64_t)tfp_cpu_to_be_64(iparms.id);\n+\tif (!ulp_regfile_write(parms->regfile, idx, id)) {\n+\t\tBNXT_TF_DBG(ERR, \"Regfile[%d] write failed.\\n\", idx);\n+\t\trc = -EINVAL;\n+\t\t/* Need to free the identifier, so goto error */\n+\t\tgoto error;\n+\t}\n+\n+\t/* Link the resource to the flow in the flow db */\n+\tmemset(&fid_parms, 0, sizeof(fid_parms));\n+\tfid_parms.direction\t\t= tbl->direction;\n+\tfid_parms.resource_func\t= ident->resource_func;\n+\tfid_parms.resource_type\t= ident->ident_type;\n+\tfid_parms.resource_hndl\t= iparms.id;\n+\tfid_parms.critical_resource\t= 0;\n+\n+\trc = ulp_flow_db_resource_add(parms->ulp_ctx,\n+\t\t\t\t      parms->tbl_idx,\n+\t\t\t\t      parms->fid,\n+\t\t\t\t      &fid_parms);\n+\tif (rc) {\n+\t\tBNXT_TF_DBG(ERR, \"Failed to link resource to flow rc = %d\\n\",\n+\t\t\t    rc);\n+\t\t/* Need to free the identifier, so goto error */\n+\t\tgoto error;\n+\t}\n+\n+\treturn 0;\n+\n+error:\n+\t/* Need to free the identifier */\n+\tfree_parms.dir\t\t= tbl->direction;\n+\tfree_parms.ident_type\t= ident->ident_type;\n+\tfree_parms.id\t\t= iparms.id;\n+\n+\t(void)tf_free_identifier(tfp, &free_parms);\n+\n+\tBNXT_TF_DBG(ERR, \"Ident process failed for %s:%s\\n\",\n+\t\t    ident->name,\n+\t\t    (tbl->direction == TF_DIR_RX) ? \"RX\" : \"TX\");\n+\treturn rc;\n+}\n+\n static int32_t\n ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,\n \t\t\t\tstruct bnxt_ulp_mapper_result_field_info *fld,\n@@ -163,6 +321,89 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,\n \n /* Function to alloc action record and set the table. */\n static int32_t\n+ulp_mapper_keymask_field_process(struct bnxt_ulp_mapper_parms *parms,\n+\t\t\t\t struct bnxt_ulp_mapper_class_key_field_info *f,\n+\t\t\t\t struct ulp_blob *blob,\n+\t\t\t\t uint8_t is_key)\n+{\n+\tuint64_t regval;\n+\tuint16_t idx, bitlen;\n+\tuint32_t opcode;\n+\tuint8_t *operand;\n+\tstruct ulp_regfile *regfile = parms->regfile;\n+\tuint8_t *val = NULL;\n+\tstruct bnxt_ulp_mapper_class_key_field_info *fld = f;\n+\n+\tif (is_key) {\n+\t\toperand = fld->spec_operand;\n+\t\topcode\t= fld->spec_opcode;\n+\t} else {\n+\t\toperand = fld->mask_operand;\n+\t\topcode\t= fld->mask_opcode;\n+\t}\n+\n+\tbitlen = fld->field_bit_size;\n+\n+\tswitch (opcode) {\n+\tcase BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT:\n+\t\tval = operand;\n+\t\tif (!ulp_blob_push(blob, val, bitlen)) {\n+\t\t\tBNXT_TF_DBG(ERR, \"push to key blob failed\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tbreak;\n+\tcase BNXT_ULP_SPEC_OPC_ADD_PAD:\n+\t\tif (!ulp_blob_pad_push(blob, bitlen)) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Pad too large for blob\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\n+\t\tbreak;\n+\tcase BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD:\n+\t\tif (!ulp_operand_read(operand, (uint8_t *)&idx,\n+\t\t\t\t      sizeof(uint16_t))) {\n+\t\t\tBNXT_TF_DBG(ERR, \"key operand read failed.\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tidx = tfp_be_to_cpu_16(idx);\n+\t\tif (is_key)\n+\t\t\tval = parms->hdr_field[idx].spec;\n+\t\telse\n+\t\t\tval = parms->hdr_field[idx].mask;\n+\n+\t\tif (!ulp_blob_push(blob, val, bitlen)) {\n+\t\t\tBNXT_TF_DBG(ERR, \"push to key blob failed\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tbreak;\n+\tcase BNXT_ULP_SPEC_OPC_SET_TO_REGFILE:\n+\t\tif (!ulp_operand_read(operand, (uint8_t *)&idx,\n+\t\t\t\t      sizeof(uint16_t))) {\n+\t\t\tBNXT_TF_DBG(ERR, \"key operand read failed.\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tidx = tfp_be_to_cpu_16(idx);\n+\n+\t\tif (!ulp_regfile_read(regfile, idx, &regval)) {\n+\t\t\tBNXT_TF_DBG(ERR, \"regfile[%d] read failed.\\n\",\n+\t\t\t\t    idx);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\n+\t\tval = ulp_blob_push_64(blob, &regval, bitlen);\n+\t\tif (!val) {\n+\t\t\tBNXT_TF_DBG(ERR, \"push to key blob failed\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\tdefault:\n+\t\tbreak;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/* Function to alloc action record and set the table. */\n+static int32_t\n ulp_mapper_action_alloc_and_set(struct bnxt_ulp_mapper_parms *parms,\n \t\t\t\tstruct ulp_blob *blob)\n {\n@@ -338,6 +579,489 @@ ulp_mapper_action_info_process(struct bnxt_ulp_mapper_parms *parms,\n \treturn rc;\n }\n \n+static int32_t\n+ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms,\n+\t\t\t    struct bnxt_ulp_mapper_class_tbl_info *tbl)\n+{\n+\tstruct bnxt_ulp_mapper_class_key_field_info\t*kflds;\n+\tstruct ulp_blob key, mask, data;\n+\tuint32_t i, num_kflds;\n+\tstruct tf *tfp;\n+\tint32_t rc, trc;\n+\tstruct tf_alloc_tcam_entry_parms aparms\t\t= { 0 };\n+\tstruct tf_set_tcam_entry_parms sparms\t\t= { 0 };\n+\tstruct ulp_flow_db_res_params\tfid_parms\t= { 0 };\n+\tstruct tf_free_tcam_entry_parms free_parms\t= { 0 };\n+\tuint32_t hit = 0;\n+\tuint16_t tmplen = 0;\n+\n+\ttfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx);\n+\tif (!tfp) {\n+\t\tBNXT_TF_DBG(ERR, \"Failed to get truflow pointer\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tkflds = ulp_mapper_key_fields_get(tbl, &num_kflds);\n+\tif (!kflds || !num_kflds) {\n+\t\tBNXT_TF_DBG(ERR, \"Failed to get key fields\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (!ulp_blob_init(&key, tbl->key_bit_size, parms->order) ||\n+\t    !ulp_blob_init(&mask, tbl->key_bit_size, parms->order) ||\n+\t    !ulp_blob_init(&data, tbl->result_bit_size, parms->order)) {\n+\t\tBNXT_TF_DBG(ERR, \"blob inits failed.\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* create the key/mask */\n+\t/*\n+\t * NOTE: The WC table will require some kind of flag to handle the\n+\t * mode bits within the key/mask\n+\t */\n+\tfor (i = 0; i < num_kflds; i++) {\n+\t\t/* Setup the key */\n+\t\trc = ulp_mapper_keymask_field_process(parms, &kflds[i],\n+\t\t\t\t\t\t      &key, 1);\n+\t\tif (rc) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Key field set failed.\\n\");\n+\t\t\treturn rc;\n+\t\t}\n+\n+\t\t/* Setup the mask */\n+\t\trc = ulp_mapper_keymask_field_process(parms, &kflds[i],\n+\t\t\t\t\t\t      &mask, 0);\n+\t\tif (rc) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Mask field set failed.\\n\");\n+\t\t\treturn rc;\n+\t\t}\n+\t}\n+\n+\taparms.dir\t\t= tbl->direction;\n+\taparms.tcam_tbl_type\t= tbl->table_type;\n+\taparms.search_enable\t= tbl->srch_b4_alloc;\n+\taparms.key_sz_in_bits\t= tbl->key_bit_size;\n+\taparms.key\t\t= ulp_blob_data_get(&key, &tmplen);\n+\tif (tbl->key_bit_size != tmplen) {\n+\t\tBNXT_TF_DBG(ERR, \"Key len (%d) != Expected (%d)\\n\",\n+\t\t\t    tmplen, tbl->key_bit_size);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\taparms.mask\t\t= ulp_blob_data_get(&mask, &tmplen);\n+\tif (tbl->key_bit_size != tmplen) {\n+\t\tBNXT_TF_DBG(ERR, \"Mask len (%d) != Expected (%d)\\n\",\n+\t\t\t    tmplen, tbl->key_bit_size);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\taparms.priority\t\t= tbl->priority;\n+\n+\t/*\n+\t * All failures after this succeeds require the entry to be freed.\n+\t * cannot return directly on failure, but needs to goto error\n+\t */\n+\trc = tf_alloc_tcam_entry(tfp, &aparms);\n+\tif (rc) {\n+\t\tBNXT_TF_DBG(ERR, \"tcam alloc failed rc=%d.\\n\", rc);\n+\t\treturn rc;\n+\t}\n+\n+\thit = aparms.hit;\n+\n+\t/* Build the result */\n+\tif (!tbl->srch_b4_alloc || !hit) {\n+\t\tstruct bnxt_ulp_mapper_result_field_info *dflds;\n+\t\tstruct bnxt_ulp_mapper_ident_info *idents;\n+\t\tuint32_t num_dflds, num_idents;\n+\n+\t\t/* Alloc identifiers */\n+\t\tidents = ulp_mapper_ident_fields_get(tbl, &num_idents);\n+\n+\t\tfor (i = 0; i < num_idents; i++) {\n+\t\t\trc = ulp_mapper_ident_process(parms, tbl, &idents[i]);\n+\n+\t\t\t/* Already logged the error, just return */\n+\t\t\tif (rc)\n+\t\t\t\tgoto error;\n+\t\t}\n+\n+\t\t/* Create the result data blob */\n+\t\tdflds = ulp_mapper_result_fields_get(tbl, &num_dflds);\n+\t\tif (!dflds || !num_dflds) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Failed to get data fields.\\n\");\n+\t\t\trc = -EINVAL;\n+\t\t\tgoto error;\n+\t\t}\n+\n+\t\tfor (i = 0; i < num_dflds; i++) {\n+\t\t\trc = ulp_mapper_result_field_process(parms,\n+\t\t\t\t\t\t\t     &dflds[i],\n+\t\t\t\t\t\t\t     &data);\n+\t\t\tif (rc) {\n+\t\t\t\tBNXT_TF_DBG(ERR, \"Failed to set data fields\\n\");\n+\t\t\t\tgoto error;\n+\t\t\t}\n+\t\t}\n+\n+\t\tsparms.dir\t\t= aparms.dir;\n+\t\tsparms.tcam_tbl_type\t= aparms.tcam_tbl_type;\n+\t\tsparms.idx\t\t= aparms.idx;\n+\t\t/* Already verified the key/mask lengths */\n+\t\tsparms.key\t\t= ulp_blob_data_get(&key, &tmplen);\n+\t\tsparms.mask\t\t= ulp_blob_data_get(&mask, &tmplen);\n+\t\tsparms.key_sz_in_bits\t= tbl->key_bit_size;\n+\t\tsparms.result\t\t= ulp_blob_data_get(&data, &tmplen);\n+\n+\t\tif (tbl->result_bit_size != tmplen) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Result len (%d) != Expected (%d)\\n\",\n+\t\t\t\t    tmplen, tbl->result_bit_size);\n+\t\t\trc = -EINVAL;\n+\t\t\tgoto error;\n+\t\t}\n+\t\tsparms.result_sz_in_bits = tbl->result_bit_size;\n+\n+\t\trc = tf_set_tcam_entry(tfp, &sparms);\n+\t\tif (rc) {\n+\t\t\tBNXT_TF_DBG(ERR, \"tcam[%d][%s][%d] write failed.\\n\",\n+\t\t\t\t    sparms.tcam_tbl_type,\n+\t\t\t\t    (sparms.dir == TF_DIR_RX) ? \"RX\" : \"TX\",\n+\t\t\t\t    sparms.idx);\n+\t\t\tgoto error;\n+\t\t}\n+\t} else {\n+\t\tBNXT_TF_DBG(ERR, \"Not supporting search before alloc now\\n\");\n+\t\trc = -EINVAL;\n+\t\tgoto error;\n+\t}\n+\n+\t/* Link the resource to the flow in the flow db */\n+\tfid_parms.direction = tbl->direction;\n+\tfid_parms.resource_func\t= tbl->resource_func;\n+\tfid_parms.resource_type\t= tbl->table_type;\n+\tfid_parms.critical_resource = tbl->critical_resource;\n+\tfid_parms.resource_hndl\t= aparms.idx;\n+\n+\trc = ulp_flow_db_resource_add(parms->ulp_ctx,\n+\t\t\t\t      parms->tbl_idx,\n+\t\t\t\t      parms->fid,\n+\t\t\t\t      &fid_parms);\n+\tif (rc) {\n+\t\tBNXT_TF_DBG(ERR, \"Failed to link resource to flow rc = %d\\n\",\n+\t\t\t    rc);\n+\t\t/* Need to free the identifier, so goto error */\n+\t\tgoto error;\n+\t}\n+\n+\treturn 0;\n+error:\n+\tfree_parms.dir\t\t\t= tbl->direction;\n+\tfree_parms.tcam_tbl_type\t= tbl->table_type;\n+\tfree_parms.idx\t\t\t= aparms.idx;\n+\ttrc = tf_free_tcam_entry(tfp, &free_parms);\n+\tif (trc)\n+\t\tBNXT_TF_DBG(ERR, \"Failed to free tcam[%d][%d][%d] on failure\\n\",\n+\t\t\t    tbl->table_type, tbl->direction, aparms.idx);\n+\n+\treturn rc;\n+}\n+\n+static int32_t\n+ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms,\n+\t\t\t  struct bnxt_ulp_mapper_class_tbl_info *tbl)\n+{\n+\tstruct bnxt_ulp_mapper_class_key_field_info\t*kflds;\n+\tstruct bnxt_ulp_mapper_result_field_info *dflds;\n+\tstruct ulp_blob key, data;\n+\tuint32_t i, num_kflds, num_dflds;\n+\tuint16_t tmplen;\n+\tstruct tf *tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx);\n+\tstruct ulp_rte_act_prop\t *a_prop = parms->act_prop;\n+\tstruct ulp_flow_db_res_params\tfid_parms = { 0 };\n+\tstruct tf_insert_em_entry_parms iparms = { 0 };\n+\tstruct tf_delete_em_entry_parms free_parms = { 0 };\n+\tint32_t\ttrc;\n+\tint32_t rc = 0;\n+\n+\tkflds = ulp_mapper_key_fields_get(tbl, &num_kflds);\n+\tif (!kflds || !num_kflds) {\n+\t\tBNXT_TF_DBG(ERR, \"Failed to get key fields\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Initialize the key/result blobs */\n+\tif (!ulp_blob_init(&key, tbl->blob_key_bit_size, parms->order) ||\n+\t    !ulp_blob_init(&data, tbl->result_bit_size, parms->order)) {\n+\t\tBNXT_TF_DBG(ERR, \"blob inits failed.\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* create the key */\n+\tfor (i = 0; i < num_kflds; i++) {\n+\t\t/* Setup the key */\n+\t\trc = ulp_mapper_keymask_field_process(parms, &kflds[i],\n+\t\t\t\t\t\t      &key, 1);\n+\t\tif (rc) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Key field set failed.\\n\");\n+\t\t\treturn rc;\n+\t\t}\n+\t}\n+\n+\t/*\n+\t * TBD: Normally should process identifiers in case of using recycle or\n+\t * loopback.  Not supporting recycle for now.\n+\t */\n+\n+\t/* Create the result data blob */\n+\tdflds = ulp_mapper_result_fields_get(tbl, &num_dflds);\n+\tif (!dflds || !num_dflds) {\n+\t\tBNXT_TF_DBG(ERR, \"Failed to get data fields.\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tfor (i = 0; i < num_dflds; i++) {\n+\t\tstruct bnxt_ulp_mapper_result_field_info *fld;\n+\n+\t\tfld = &dflds[i];\n+\n+\t\trc = ulp_mapper_result_field_process(parms,\n+\t\t\t\t\t\t     fld,\n+\t\t\t\t\t\t     &data);\n+\t\tif (rc) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Failed to set data fields.\\n\");\n+\t\t\treturn rc;\n+\t\t}\n+\t}\n+\n+\trc = bnxt_ulp_cntxt_tbl_scope_id_get(parms->ulp_ctx,\n+\t\t\t\t\t     &iparms.tbl_scope_id);\n+\tif (rc) {\n+\t\tBNXT_TF_DBG(ERR, \"Failed to get table scope rc=%d\\n\", rc);\n+\t\treturn rc;\n+\t}\n+\n+\t/*\n+\t * NOTE: the actual blob size will differ from the size in the tbl\n+\t * entry due to the padding.\n+\t */\n+\tiparms.dup_check\t\t= 0;\n+\tiparms.dir\t\t\t= tbl->direction;\n+\tiparms.mem\t\t\t= tbl->mem;\n+\tiparms.key\t\t\t= ulp_blob_data_get(&key, &tmplen);\n+\tiparms.key_sz_in_bits\t\t= tbl->key_bit_size;\n+\tiparms.em_record\t\t= ulp_blob_data_get(&data, &tmplen);\n+\tiparms.em_record_sz_in_bits\t= tbl->result_bit_size;\n+\n+\trc = tf_insert_em_entry(tfp, &iparms);\n+\tif (rc) {\n+\t\tBNXT_TF_DBG(ERR, \"Failed to insert em entry rc=%d.\\n\", rc);\n+\t\treturn rc;\n+\t}\n+\n+\tif (tbl->mark_enable &&\n+\t    ULP_BITMAP_ISSET(parms->act_bitmap->bits,\n+\t\t\t     BNXT_ULP_ACTION_BIT_MARK)) {\n+\t\tuint32_t val, mark, gfid, flag;\n+\t\t/* TBD: Need to determine if GFID is enabled globally */\n+\t\tif (sizeof(val) != BNXT_ULP_ACT_PROP_SZ_MARK) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Mark size (%d) != expected (%ld)\\n\",\n+\t\t\t\t    BNXT_ULP_ACT_PROP_SZ_MARK, sizeof(val));\n+\t\t\trc = -EINVAL;\n+\t\t\tgoto error;\n+\t\t}\n+\n+\t\tmemcpy(&val,\n+\t\t       &a_prop->act_details[BNXT_ULP_ACT_PROP_IDX_MARK],\n+\t\t       sizeof(val));\n+\n+\t\tmark = tfp_be_to_cpu_32(val);\n+\n+\t\tTF_GET_GFID_FROM_FLOW_ID(iparms.flow_id, gfid);\n+\t\tTF_GET_FLAG_FROM_FLOW_ID(iparms.flow_id, flag);\n+\n+\t\trc = ulp_mark_db_mark_add(parms->ulp_ctx,\n+\t\t\t\t\t  (flag == TF_GFID_TABLE_EXTERNAL),\n+\t\t\t\t\t  gfid,\n+\t\t\t\t\t  mark);\n+\t\tif (rc) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Failed to add mark to flow\\n\");\n+\t\t\tgoto error;\n+\t\t}\n+\n+\t\t/*\n+\t\t * Link the mark resource to the flow in the flow db\n+\t\t * The mark is never the critical resource, so it is 0.\n+\t\t */\n+\t\tmemset(&fid_parms, 0, sizeof(fid_parms));\n+\t\tfid_parms.direction\t= tbl->direction;\n+\t\tfid_parms.resource_func\t= BNXT_ULP_RESOURCE_FUNC_HW_FID;\n+\t\tfid_parms.resource_type\t= tbl->table_type;\n+\t\tfid_parms.resource_hndl\t= iparms.flow_id;\n+\t\tfid_parms.critical_resource = 0;\n+\n+\t\trc = ulp_flow_db_resource_add(parms->ulp_ctx,\n+\t\t\t\t\t      parms->tbl_idx,\n+\t\t\t\t\t      parms->fid,\n+\t\t\t\t\t      &fid_parms);\n+\t\tif (rc) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Fail to link res to flow rc = %d\\n\",\n+\t\t\t\t    rc);\n+\t\t\t/* Need to free the identifier, so goto error */\n+\t\t\tgoto error;\n+\t\t}\n+\t}\n+\n+\t/* Link the EM resource to the flow in the flow db */\n+\tmemset(&fid_parms, 0, sizeof(fid_parms));\n+\tfid_parms.direction\t\t= tbl->direction;\n+\tfid_parms.resource_func\t\t= tbl->resource_func;\n+\tfid_parms.resource_type\t\t= tbl->table_type;\n+\tfid_parms.critical_resource\t= tbl->critical_resource;\n+\tfid_parms.resource_hndl\t\t= iparms.flow_handle;\n+\n+\trc = ulp_flow_db_resource_add(parms->ulp_ctx,\n+\t\t\t\t      parms->tbl_idx,\n+\t\t\t\t      parms->fid,\n+\t\t\t\t      &fid_parms);\n+\tif (rc) {\n+\t\tBNXT_TF_DBG(ERR, \"Fail to link res to flow rc = %d\\n\",\n+\t\t\t    rc);\n+\t\t/* Need to free the identifier, so goto error */\n+\t\tgoto error;\n+\t}\n+\n+\treturn 0;\n+error:\n+\tfree_parms.dir\t\t= iparms.dir;\n+\tfree_parms.mem\t\t= iparms.mem;\n+\tfree_parms.tbl_scope_id\t= iparms.tbl_scope_id;\n+\tfree_parms.flow_handle\t= iparms.flow_handle;\n+\n+\ttrc = tf_delete_em_entry(tfp, &free_parms);\n+\tif (trc)\n+\t\tBNXT_TF_DBG(ERR, \"Failed to delete EM entry on failed add\\n\");\n+\n+\treturn rc;\n+}\n+\n+static int32_t\n+ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms,\n+\t\t\t     struct bnxt_ulp_mapper_class_tbl_info *tbl)\n+{\n+\tstruct bnxt_ulp_mapper_result_field_info *flds;\n+\tstruct ulp_flow_db_res_params\tfid_parms;\n+\tstruct ulp_blob\tdata;\n+\tuint64_t idx;\n+\tuint16_t tmplen;\n+\tuint32_t i, num_flds;\n+\tint32_t rc = 0, trc = 0;\n+\tstruct tf_alloc_tbl_entry_parms\taparms = { 0 };\n+\tstruct tf_set_tbl_entry_parms\tsparms = { 0 };\n+\tstruct tf_free_tbl_entry_parms\tfree_parms = { 0 };\n+\n+\tstruct tf *tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx);\n+\n+\tif (!ulp_blob_init(&data, tbl->result_bit_size, parms->order)) {\n+\t\tBNXT_TF_DBG(ERR, \"Failed initial index table blob\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tflds = ulp_mapper_result_fields_get(tbl, &num_flds);\n+\tif (!flds || !num_flds) {\n+\t\tBNXT_TF_DBG(ERR, \"Template undefined for action\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tfor (i = 0; i < num_flds; i++) {\n+\t\trc = ulp_mapper_result_field_process(parms,\n+\t\t\t\t\t\t     &flds[i],\n+\t\t\t\t\t\t     &data);\n+\t\tif (rc) {\n+\t\t\tBNXT_TF_DBG(ERR, \"data field failed\\n\");\n+\t\t\treturn rc;\n+\t\t}\n+\t}\n+\n+\taparms.dir\t\t= tbl->direction;\n+\taparms.type\t\t= tbl->table_type;\n+\taparms.search_enable\t= tbl->srch_b4_alloc;\n+\taparms.result\t\t= ulp_blob_data_get(&data, &tmplen);\n+\taparms.result_sz_in_bytes = ULP_SZ_BITS2BYTES(tbl->result_bit_size);\n+\n+\t/* All failures after the alloc succeeds require a free */\n+\trc = tf_alloc_tbl_entry(tfp, &aparms);\n+\tif (rc) {\n+\t\tBNXT_TF_DBG(ERR, \"Alloc table[%d][%s] failed rc=%d\\n\",\n+\t\t\t    tbl->table_type,\n+\t\t\t    (tbl->direction == TF_DIR_RX) ? \"RX\" : \"TX\",\n+\t\t\t    rc);\n+\t\treturn rc;\n+\t}\n+\n+\t/* Always storing values in Regfile in BE */\n+\tidx = tfp_cpu_to_be_64(aparms.idx);\n+\trc = ulp_regfile_write(parms->regfile, tbl->regfile_wr_idx, idx);\n+\tif (!rc) {\n+\t\tBNXT_TF_DBG(ERR, \"Write regfile[%d] failed\\n\",\n+\t\t\t    tbl->regfile_wr_idx);\n+\t\tgoto error;\n+\t}\n+\n+\tif (!tbl->srch_b4_alloc) {\n+\t\tsparms.dir\t\t= tbl->direction;\n+\t\tsparms.type\t\t= tbl->table_type;\n+\t\tsparms.data\t\t= ulp_blob_data_get(&data, &tmplen);\n+\t\tsparms.data_sz_in_bytes =\n+\t\t\tULP_SZ_BITS2BYTES(tbl->result_bit_size);\n+\t\tsparms.idx\t\t= aparms.idx;\n+\n+\t\trc = tf_set_tbl_entry(tfp, &sparms);\n+\t\tif (rc) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Set table[%d][%s][%d] failed rc=%d\\n\",\n+\t\t\t\t    tbl->table_type,\n+\t\t\t\t    (tbl->direction == TF_DIR_RX) ? \"RX\" : \"TX\",\n+\t\t\t\t    sparms.idx,\n+\t\t\t\t    rc);\n+\n+\t\t\tgoto error;\n+\t\t}\n+\t}\n+\n+\t/* Link the resource to the flow in the flow db */\n+\tmemset(&fid_parms, 0, sizeof(fid_parms));\n+\tfid_parms.direction\t= tbl->direction;\n+\tfid_parms.resource_func\t= tbl->resource_func;\n+\tfid_parms.resource_type\t= tbl->table_type;\n+\tfid_parms.resource_hndl\t= aparms.idx;\n+\tfid_parms.critical_resource\t= 0;\n+\n+\trc = ulp_flow_db_resource_add(parms->ulp_ctx,\n+\t\t\t\t      parms->tbl_idx,\n+\t\t\t\t      parms->fid,\n+\t\t\t\t      &fid_parms);\n+\tif (rc) {\n+\t\tBNXT_TF_DBG(ERR, \"Failed to link resource to flow rc = %d\\n\",\n+\t\t\t    rc);\n+\t\tgoto error;\n+\t}\n+\n+\treturn rc;\n+error:\n+\t/*\n+\t * Free the allocated resource since we failed to either\n+\t * write to the entry or link the flow\n+\t */\n+\tfree_parms.dir\t= tbl->direction;\n+\tfree_parms.type\t= tbl->table_type;\n+\tfree_parms.idx\t= aparms.idx;\n+\n+\ttrc = tf_free_tbl_entry(tfp, &free_parms);\n+\tif (trc)\n+\t\tBNXT_TF_DBG(ERR, \"Failed to free tbl entry on failure\\n\");\n+\n+\treturn rc;\n+}\n+\n /*\n  * Function to process the action template. Iterate through the list\n  * action info templates and process it.\n@@ -362,3 +1086,48 @@ ulp_mapper_action_tbls_process(struct bnxt_ulp_mapper_parms *parms)\n \n \treturn rc;\n }\n+\n+/* Create the classifier table entries for a flow. */\n+int32_t\n+ulp_mapper_class_tbls_process(struct bnxt_ulp_mapper_parms *parms)\n+{\n+\tuint32_t\ti;\n+\tint32_t\t\trc = 0;\n+\n+\tif (!parms)\n+\t\treturn -EINVAL;\n+\n+\tif (!parms->ctbls || !parms->num_ctbls) {\n+\t\tBNXT_TF_DBG(ERR, \"No class tables for template[%d][%d].\\n\",\n+\t\t\t    parms->dev_id, parms->class_tid);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tfor (i = 0; i < parms->num_ctbls; i++) {\n+\t\tstruct bnxt_ulp_mapper_class_tbl_info *tbl = &parms->ctbls[i];\n+\n+\t\tswitch (tbl->resource_func) {\n+\t\tcase BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE:\n+\t\t\trc = ulp_mapper_tcam_tbl_process(parms, tbl);\n+\t\t\tbreak;\n+\t\tcase BNXT_ULP_RESOURCE_FUNC_EM_TABLE:\n+\t\t\trc = ulp_mapper_em_tbl_process(parms, tbl);\n+\t\t\tbreak;\n+\t\tcase BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE:\n+\t\t\trc = ulp_mapper_index_tbl_process(parms, tbl);\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tBNXT_TF_DBG(ERR, \"Unexpected class resource %d\\n\",\n+\t\t\t\t    tbl->resource_func);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\n+\t\tif (rc) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Resource type %d failed\\n\",\n+\t\t\t\t    tbl->resource_func);\n+\t\t\treturn rc;\n+\t\t}\n+\t}\n+\n+\treturn rc;\n+}\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_mark_mgr.c b/drivers/net/bnxt/tf_ulp/ulp_mark_mgr.c\nindex 9e4307e..837064e 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_mark_mgr.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_mark_mgr.c\n@@ -6,14 +6,71 @@\n #include <rte_common.h>\n #include <rte_malloc.h>\n #include <rte_log.h>\n+#include \"bnxt.h\"\n #include \"bnxt_ulp.h\"\n #include \"tf_ext_flow_handle.h\"\n #include \"ulp_mark_mgr.h\"\n #include \"bnxt_tf_common.h\"\n-#include \"../bnxt.h\"\n #include \"ulp_template_db.h\"\n #include \"ulp_template_struct.h\"\n \n+static inline uint32_t\n+ulp_mark_db_idx_get(bool is_gfid, uint32_t fid, struct bnxt_ulp_mark_tbl *mtbl)\n+{\n+\tuint32_t idx = 0, hashtype = 0;\n+\n+\tif (is_gfid) {\n+\t\tTF_GET_HASH_TYPE_FROM_GFID(fid, hashtype);\n+\t\tTF_GET_HASH_INDEX_FROM_GFID(fid, idx);\n+\n+\t\t/* Need to truncate anything beyond supported flows */\n+\t\tidx &= mtbl->gfid_mask;\n+\n+\t\tif (hashtype)\n+\t\t\tidx |= mtbl->gfid_type_bit;\n+\t} else {\n+\t\tidx = fid;\n+\t}\n+\n+\treturn idx;\n+}\n+\n+static int32_t\n+ulp_mark_db_mark_set(struct bnxt_ulp_context *ctxt,\n+\t\t     bool is_gfid,\n+\t\t     uint32_t fid,\n+\t\t     uint32_t mark)\n+{\n+\tstruct\t\tbnxt_ulp_mark_tbl *mtbl;\n+\tuint32_t\tidx = 0;\n+\n+\tif (!ctxt) {\n+\t\tBNXT_TF_DBG(ERR, \"Invalid ulp context\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tmtbl = bnxt_ulp_cntxt_ptr2_mark_db_get(ctxt);\n+\tif (!mtbl) {\n+\t\tBNXT_TF_DBG(ERR, \"Unable to get Mark DB\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tidx = ulp_mark_db_idx_get(is_gfid, fid, mtbl);\n+\n+\tif (is_gfid) {\n+\t\tBNXT_TF_DBG(ERR, \"Set GFID[0x%0x] = 0x%0x\\n\", idx, mark);\n+\n+\t\tmtbl->gfid_tbl[idx].mark_id = mark;\n+\t\tmtbl->gfid_tbl[idx].valid = true;\n+\t} else {\n+\t\t/* For the LFID, the FID is used as the index */\n+\t\tmtbl->lfid_tbl[fid].mark_id = mark;\n+\t\tmtbl->lfid_tbl[fid].valid = true;\n+\t}\n+\n+\treturn 0;\n+}\n+\n /*\n  * Allocate and Initialize all Mark Manager resources for this ulp context.\n  *\n@@ -117,3 +174,24 @@ ulp_mark_db_deinit(struct bnxt_ulp_context *ctxt)\n \n \treturn 0;\n }\n+\n+/*\n+ * Adds a Mark to the Mark Manager\n+ *\n+ * ctxt [in] The ulp context for the mark manager\n+ *\n+ * is_gfid [in] The type of fid (GFID or LFID)\n+ *\n+ * fid [in] The flow id that is returned by HW in BD\n+ *\n+ * mark [in] The mark to be associated with the FID\n+ *\n+ */\n+int32_t\n+ulp_mark_db_mark_add(struct bnxt_ulp_context *ctxt,\n+\t\t     bool is_gfid,\n+\t\t     uint32_t gfid,\n+\t\t     uint32_t mark)\n+{\n+\treturn ulp_mark_db_mark_set(ctxt, is_gfid, gfid, mark);\n+}\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_mark_mgr.h b/drivers/net/bnxt/tf_ulp/ulp_mark_mgr.h\nindex 5948683..18abea4 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_mark_mgr.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_mark_mgr.h\n@@ -54,4 +54,22 @@ ulp_mark_db_init(struct bnxt_ulp_context *ctxt);\n int32_t\n ulp_mark_db_deinit(struct bnxt_ulp_context *ctxt);\n \n+/*\n+ * Adds a Mark to the Mark Manager\n+ *\n+ * ctxt [in] The ulp context for the mark manager\n+ *\n+ * is_gfid [in] The type of fid (GFID or LFID)\n+ *\n+ * fid [in] The flow id that is returned by HW in BD\n+ *\n+ * mark [in] The mark to be associated with the FID\n+ *\n+ */\n+int32_t\n+ulp_mark_db_mark_add(struct bnxt_ulp_context *ctxt,\n+\t\t     bool is_gfid,\n+\t\t     uint32_t gfid,\n+\t\t     uint32_t mark);\n+\n #endif /* _ULP_MARK_MGR_H_ */\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.c b/drivers/net/bnxt/tf_ulp/ulp_template_db.c\nindex 75bf967..ba06493 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db.c\n@@ -108,6 +108,902 @@ struct bnxt_ulp_device_params ulp_device_params[] = {\n \t}\n };\n \n+struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = {\n+\t[((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) | BNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n+\t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n+\t.num_tbls = 3,\n+\t.start_tbl_idx = 0\n+\t}\n+};\n+\n+struct bnxt_ulp_mapper_class_tbl_info ulp_class_tbl_list[] = {\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n+\t.table_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,\n+\t.direction = TF_DIR_RX,\n+\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.key_start_idx = 0,\n+\t.blob_key_bit_size = 167,\n+\t.key_bit_size = 167,\n+\t.key_num_fields = 13,\n+\t.result_start_idx = 0,\n+\t.result_bit_size = 64,\n+\t.result_num_fields = 13,\n+\t.ident_start_idx = 0,\n+\t.ident_nums = 1,\n+\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n+\t.critical_resource = 0,\n+\t.regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n+\t.table_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n+\t.direction = TF_DIR_RX,\n+\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.key_start_idx = 13,\n+\t.blob_key_bit_size = 81,\n+\t.key_bit_size = 81,\n+\t.key_num_fields = 42,\n+\t.result_start_idx = 13,\n+\t.result_bit_size = 38,\n+\t.result_num_fields = 8,\n+\t.ident_start_idx = 1,\n+\t.ident_nums = 1,\n+\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n+\t.critical_resource = 0,\n+\t.regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,\n+\t.table_type = TF_MEM_EXTERNAL,\n+\t.direction = TF_DIR_RX,\n+\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.key_start_idx = 55,\n+\t.blob_key_bit_size = 448,\n+\t.key_bit_size = 197,\n+\t.key_num_fields = 11,\n+\t.result_start_idx = 21,\n+\t.result_bit_size = 64,\n+\t.result_num_fields = 9,\n+\t.ident_start_idx = 2,\n+\t.ident_nums = 0,\n+\t.mark_enable = BNXT_ULP_MARK_ENABLE_YES,\n+\t.critical_resource = 1,\n+\t.regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n+\t}\n+};\n+\n+struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {(BNXT_ULP_HF0_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF0_O_ETH_DMAC & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD,\n+\t.mask_operand = {(BNXT_ULP_HF0_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF0_SVIF_INDEX & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {(BNXT_ULP_HF0_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF0_SVIF_INDEX & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {BNXT_ULP_SYM_L3_HDR_TYPE_IPV4,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {BNXT_ULP_SYM_L2_HDR_TYPE_DIX,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 9,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 7,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x40, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {BNXT_ULP_SYM_PKT_TYPE_L2,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 251,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_ADD_PAD,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {(BNXT_ULP_HF0_O_UDP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF0_O_UDP_DST_PORT & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {(BNXT_ULP_HF0_O_UDP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF0_O_UDP_SRC_PORT & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {BNXT_ULP_SYM_IP_PROTO_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 32,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {(BNXT_ULP_HF0_O_IPV4_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF0_O_IPV4_DST_ADDR & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 32,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {(BNXT_ULP_HF0_O_IPV4_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF0_O_IPV4_SRC_ADDR & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {(BNXT_ULP_HF0_O_ETH_SMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF0_O_ETH_SMAC & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 24,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n+\t.spec_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t}\n+};\n+\n+struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 7,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x40, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 6,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {(0x00fd >> 8) & 0xff,\n+\t\t0x00fd & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 5,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 33,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {(BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 5,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 9,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {(0x00c5 >> 8) & 0xff,\n+\t\t0x00c5 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 11,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t}\n+};\n+\n+struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = {\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n+\t.ident_type = TF_IDENT_TYPE_L2_CTXT,\n+\t.regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,\n+\t.ident_bit_size = 10,\n+\t.ident_bit_pos = 54\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n+\t.ident_type = TF_IDENT_TYPE_EM_PROF,\n+\t.regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,\n+\t.ident_bit_size = 8,\n+\t.ident_bit_pos = 2\n+\t}\n+};\n+\n struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = {\n \t{\n \t.field_bit_size = 14,\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.h b/drivers/net/bnxt/tf_ulp/ulp_template_db.h\nindex e52cc3f..733836a 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db.h\n@@ -13,6 +13,37 @@\n \n #define BNXT_ULP_MAX_NUM_DEVICES 4\n \n+enum bnxt_ulp_action_bit {\n+\tBNXT_ULP_ACTION_BIT_MARK             = 0x0000000000000001,\n+\tBNXT_ULP_ACTION_BIT_DROP             = 0x0000000000000002,\n+\tBNXT_ULP_ACTION_BIT_COUNT            = 0x0000000000000004,\n+\tBNXT_ULP_ACTION_BIT_RSS              = 0x0000000000000008,\n+\tBNXT_ULP_ACTION_BIT_METER            = 0x0000000000000010,\n+\tBNXT_ULP_ACTION_BIT_VNIC             = 0x0000000000000020,\n+\tBNXT_ULP_ACTION_BIT_VPORT            = 0x0000000000000040,\n+\tBNXT_ULP_ACTION_BIT_VXLAN_DECAP      = 0x0000000000000080,\n+\tBNXT_ULP_ACTION_BIT_NVGRE_DECAP      = 0x0000000000000100,\n+\tBNXT_ULP_ACTION_BIT_OF_POP_MPLS      = 0x0000000000000200,\n+\tBNXT_ULP_ACTION_BIT_OF_PUSH_MPLS     = 0x0000000000000400,\n+\tBNXT_ULP_ACTION_BIT_MAC_SWAP         = 0x0000000000000800,\n+\tBNXT_ULP_ACTION_BIT_SET_MAC_SRC      = 0x0000000000001000,\n+\tBNXT_ULP_ACTION_BIT_SET_MAC_DST      = 0x0000000000002000,\n+\tBNXT_ULP_ACTION_BIT_OF_POP_VLAN      = 0x0000000000004000,\n+\tBNXT_ULP_ACTION_BIT_OF_PUSH_VLAN     = 0x0000000000008000,\n+\tBNXT_ULP_ACTION_BIT_OF_SET_VLAN_PCP  = 0x0000000000010000,\n+\tBNXT_ULP_ACTION_BIT_OF_SET_VLAN_VID  = 0x0000000000020000,\n+\tBNXT_ULP_ACTION_BIT_SET_IPV4_SRC     = 0x0000000000040000,\n+\tBNXT_ULP_ACTION_BIT_SET_IPV4_DST     = 0x0000000000080000,\n+\tBNXT_ULP_ACTION_BIT_SET_IPV6_SRC     = 0x0000000000100000,\n+\tBNXT_ULP_ACTION_BIT_SET_IPV6_DST     = 0x0000000000200000,\n+\tBNXT_ULP_ACTION_BIT_DEC_TTL          = 0x0000000000400000,\n+\tBNXT_ULP_ACTION_BIT_SET_TP_SRC       = 0x0000000000800000,\n+\tBNXT_ULP_ACTION_BIT_SET_TP_DST       = 0x0000000001000000,\n+\tBNXT_ULP_ACTION_BIT_VXLAN_ENCAP      = 0x0000000002000000,\n+\tBNXT_ULP_ACTION_BIT_NVGRE_ENCAP      = 0x0000000004000000,\n+\tBNXT_ULP_ACTION_BIT_LAST             = 0x0000000008000000\n+};\n+\n enum bnxt_ulp_byte_order {\n \tBNXT_ULP_BYTE_ORDER_BE,\n \tBNXT_ULP_BYTE_ORDER_LE,\n@@ -35,8 +66,48 @@ enum bnxt_ulp_fmf_mask {\n \tBNXT_ULP_FMF_MASK_LAST\n };\n \n+enum bnxt_ulp_mark_enable {\n+\tBNXT_ULP_MARK_ENABLE_NO = 0,\n+\tBNXT_ULP_MARK_ENABLE_YES = 1,\n+\tBNXT_ULP_MARK_ENABLE_LAST = 2\n+};\n+\n+enum bnxt_ulp_mask_opc {\n+\tBNXT_ULP_MASK_OPC_SET_TO_CONSTANT = 0,\n+\tBNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD = 1,\n+\tBNXT_ULP_MASK_OPC_SET_TO_REGFILE = 2,\n+\tBNXT_ULP_MASK_OPC_ADD_PAD = 3,\n+\tBNXT_ULP_MASK_OPC_LAST = 4\n+};\n+\n+enum bnxt_ulp_priority {\n+\tBNXT_ULP_PRIORITY_LEVEL_0 = 0,\n+\tBNXT_ULP_PRIORITY_LEVEL_1 = 1,\n+\tBNXT_ULP_PRIORITY_LEVEL_2 = 2,\n+\tBNXT_ULP_PRIORITY_LEVEL_3 = 3,\n+\tBNXT_ULP_PRIORITY_LEVEL_4 = 4,\n+\tBNXT_ULP_PRIORITY_LEVEL_5 = 5,\n+\tBNXT_ULP_PRIORITY_LEVEL_6 = 6,\n+\tBNXT_ULP_PRIORITY_LEVEL_7 = 7,\n+\tBNXT_ULP_PRIORITY_NOT_USED = 8,\n+\tBNXT_ULP_PRIORITY_LAST = 9\n+};\n+\n enum bnxt_ulp_regfile_index {\n-\tBNXT_ULP_REGFILE_INDEX_LAST\n+\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 = 0,\n+\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_1 = 1,\n+\tBNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 = 2,\n+\tBNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_1 = 3,\n+\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 = 4,\n+\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_1 = 5,\n+\tBNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 = 6,\n+\tBNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_1 = 7,\n+\tBNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN = 8,\n+\tBNXT_ULP_REGFILE_INDEX_ACTION_PTR_0 = 9,\n+\tBNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 = 10,\n+\tBNXT_ULP_REGFILE_INDEX_ENCAP_PTR_1 = 11,\n+\tBNXT_ULP_REGFILE_INDEX_NOT_USED = 12,\n+\tBNXT_ULP_REGFILE_INDEX_LAST = 13\n };\n \n enum bnxt_ulp_resource_func {\n@@ -56,9 +127,78 @@ enum bnxt_ulp_result_opc {\n \tBNXT_ULP_RESULT_OPC_LAST = 4\n };\n \n+enum bnxt_ulp_spec_opc {\n+\tBNXT_ULP_SPEC_OPC_SET_TO_CONSTANT = 0,\n+\tBNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD = 1,\n+\tBNXT_ULP_SPEC_OPC_SET_TO_REGFILE = 2,\n+\tBNXT_ULP_SPEC_OPC_ADD_PAD = 3,\n+\tBNXT_ULP_SPEC_OPC_LAST = 4\n+};\n+\n enum bnxt_ulp_sym {\n+\tBNXT_ULP_SYM_BIG_ENDIAN = 0,\n \tBNXT_ULP_SYM_DECAP_FUNC_NONE = 0,\n+\tBNXT_ULP_SYM_DECAP_FUNC_THRU_L2 = 11,\n+\tBNXT_ULP_SYM_DECAP_FUNC_THRU_L3 = 12,\n+\tBNXT_ULP_SYM_DECAP_FUNC_THRU_L4 = 13,\n+\tBNXT_ULP_SYM_DECAP_FUNC_THRU_TL2 = 3,\n+\tBNXT_ULP_SYM_DECAP_FUNC_THRU_TL3 = 8,\n+\tBNXT_ULP_SYM_DECAP_FUNC_THRU_TL4 = 9,\n+\tBNXT_ULP_SYM_DECAP_FUNC_THRU_TUN = 10,\n+\tBNXT_ULP_SYM_ECV_L3_TYPE_IPV4 = 4,\n+\tBNXT_ULP_SYM_ECV_L3_TYPE_IPV6 = 5,\n+\tBNXT_ULP_SYM_ECV_L3_TYPE_MPLS_8847 = 6,\n+\tBNXT_ULP_SYM_ECV_L3_TYPE_MPLS_8848 = 7,\n+\tBNXT_ULP_SYM_ECV_L3_TYPE_NONE = 0,\n+\tBNXT_ULP_SYM_ECV_L4_TYPE_NONE = 0,\n+\tBNXT_ULP_SYM_ECV_L4_TYPE_UDP = 4,\n+\tBNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM = 5,\n+\tBNXT_ULP_SYM_ECV_L4_TYPE_UDP_ENTROPY = 6,\n+\tBNXT_ULP_SYM_ECV_L4_TYPE_UDP_ENTROPY_CSUM = 7,\n+\tBNXT_ULP_SYM_ECV_TUN_TYPE_GENERIC = 1,\n+\tBNXT_ULP_SYM_ECV_TUN_TYPE_GRE = 5,\n+\tBNXT_ULP_SYM_ECV_TUN_TYPE_NGE = 3,\n+\tBNXT_ULP_SYM_ECV_TUN_TYPE_NONE = 0,\n+\tBNXT_ULP_SYM_ECV_TUN_TYPE_NVGRE = 4,\n+\tBNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN = 2,\n+\tBNXT_ULP_SYM_IP_PROTO_UDP = 17,\n+\tBNXT_ULP_SYM_L2_HDR_TYPE_DIX = 0,\n+\tBNXT_ULP_SYM_L2_HDR_TYPE_LLC = 2,\n+\tBNXT_ULP_SYM_L2_HDR_TYPE_LLC_SNAP = 1,\n+\tBNXT_ULP_SYM_L3_HDR_TYPE_ARP = 2,\n+\tBNXT_ULP_SYM_L3_HDR_TYPE_EAPOL = 4,\n+\tBNXT_ULP_SYM_L3_HDR_TYPE_FCOE = 6,\n+\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV4 = 0,\n+\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV6 = 1,\n+\tBNXT_ULP_SYM_L3_HDR_TYPE_PTP = 3,\n+\tBNXT_ULP_SYM_L3_HDR_TYPE_ROCE = 5,\n+\tBNXT_ULP_SYM_L3_HDR_TYPE_UPAR1 = 7,\n+\tBNXT_ULP_SYM_L3_HDR_TYPE_UPAR2 = 8,\n+\tBNXT_ULP_SYM_L4_HDR_TYPE_BTH_V1 = 5,\n+\tBNXT_ULP_SYM_L4_HDR_TYPE_ICMP = 2,\n+\tBNXT_ULP_SYM_L4_HDR_TYPE_TCP = 0,\n+\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP = 1,\n+\tBNXT_ULP_SYM_L4_HDR_TYPE_UPAR1 = 3,\n+\tBNXT_ULP_SYM_L4_HDR_TYPE_UPAR2 = 4,\n \tBNXT_ULP_SYM_LITTLE_ENDIAN = 1,\n+\tBNXT_ULP_SYM_NO = 0,\n+\tBNXT_ULP_SYM_PKT_TYPE_L2 = 0,\n+\tBNXT_ULP_SYM_TL2_HDR_TYPE_DIX = 0,\n+\tBNXT_ULP_SYM_TL3_HDR_TYPE_IPV4 = 0,\n+\tBNXT_ULP_SYM_TL3_HDR_TYPE_IPV6 = 1,\n+\tBNXT_ULP_SYM_TL4_HDR_TYPE_TCP = 0,\n+\tBNXT_ULP_SYM_TL4_HDR_TYPE_UDP = 1,\n+\tBNXT_ULP_SYM_TUN_HDR_TYPE_GENEVE = 1,\n+\tBNXT_ULP_SYM_TUN_HDR_TYPE_GRE = 3,\n+\tBNXT_ULP_SYM_TUN_HDR_TYPE_IPV4 = 4,\n+\tBNXT_ULP_SYM_TUN_HDR_TYPE_IPV6 = 5,\n+\tBNXT_ULP_SYM_TUN_HDR_TYPE_MPLS = 7,\n+\tBNXT_ULP_SYM_TUN_HDR_TYPE_NONE = 15,\n+\tBNXT_ULP_SYM_TUN_HDR_TYPE_NVGRE = 2,\n+\tBNXT_ULP_SYM_TUN_HDR_TYPE_PPPOE = 6,\n+\tBNXT_ULP_SYM_TUN_HDR_TYPE_UPAR1 = 8,\n+\tBNXT_ULP_SYM_TUN_HDR_TYPE_UPAR2 = 9,\n+\tBNXT_ULP_SYM_TUN_HDR_TYPE_VXLAN = 0,\n \tBNXT_ULP_SYM_YES = 1\n };\n \ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h b/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h\nnew file mode 100644\nindex 0000000..1f58ace\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h\n@@ -0,0 +1,133 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2014-2020 Broadcom\n+ * All rights reserved_\n+ */\n+\n+/* date: Mon Mar  9 02:37:53 2020\n+ * version: 0_0\n+ */\n+\n+#ifndef _ULP_HDR_FIELD_ENUMS_H_\n+#define _ULP_HDR_FIELD_ENUMS_H_\n+\n+/* class_template_id = 0: ingress flow */\n+enum bnxt_ulp_hf0 {\n+\tBNXT_ULP_HF0_MPLS_TAG_NUM = 0,\n+\tBNXT_ULP_HF0_O_VTAG_NUM = 1,\n+\tBNXT_ULP_HF0_I_VTAG_NUM = 2,\n+\tBNXT_ULP_HF0_SVIF_INDEX = 3,\n+\tBNXT_ULP_HF0_O_ETH_DMAC = 4,\n+\tBNXT_ULP_HF0_O_ETH_SMAC = 5,\n+\tBNXT_ULP_HF0_O_ETH_TYPE = 6,\n+\tBNXT_ULP_HF0_OO_VLAN_CFI_PRI = 7,\n+\tBNXT_ULP_HF0_OO_VLAN_VID = 8,\n+\tBNXT_ULP_HF0_OO_VLAN_TYPE = 9,\n+\tBNXT_ULP_HF0_OI_VLAN_CFI_PRI = 10,\n+\tBNXT_ULP_HF0_OI_VLAN_VID = 11,\n+\tBNXT_ULP_HF0_OI_VLAN_TYPE = 12,\n+\tBNXT_ULP_HF0_O_IPV4_VER = 13,\n+\tBNXT_ULP_HF0_O_IPV4_TOS = 14,\n+\tBNXT_ULP_HF0_O_IPV4_LEN = 15,\n+\tBNXT_ULP_HF0_O_IPV4_FRAG_ID = 16,\n+\tBNXT_ULP_HF0_O_IPV4_FRAG_OFF = 17,\n+\tBNXT_ULP_HF0_O_IPV4_TTL = 18,\n+\tBNXT_ULP_HF0_O_IPV4_NEXT_PID = 19,\n+\tBNXT_ULP_HF0_O_IPV4_CSUM = 20,\n+\tBNXT_ULP_HF0_O_IPV4_SRC_ADDR = 21,\n+\tBNXT_ULP_HF0_O_IPV4_DST_ADDR = 22,\n+\tBNXT_ULP_HF0_O_UDP_SRC_PORT = 23,\n+\tBNXT_ULP_HF0_O_UDP_DST_PORT = 24,\n+\tBNXT_ULP_HF0_O_UDP_LENGTH = 25,\n+\tBNXT_ULP_HF0_O_UDP_CSUM = 26,\n+\tBNXT_ULP_HF0_T_VXLAN_FLAGS = 27,\n+\tBNXT_ULP_HF0_T_VXLAN_RSVD0 = 28,\n+\tBNXT_ULP_HF0_T_VXLAN_VNI = 29,\n+\tBNXT_ULP_HF0_T_VXLAN_RSVD1 = 30,\n+\tBNXT_ULP_HF0_I_ETH_DMAC = 31,\n+\tBNXT_ULP_HF0_I_ETH_SMAC = 32,\n+\tBNXT_ULP_HF0_I_ETH_TYPE = 33,\n+\tBNXT_ULP_HF0_IO_VLAN_CFI_PRI = 34,\n+\tBNXT_ULP_HF0_IO_VLAN_VID = 35,\n+\tBNXT_ULP_HF0_IO_VLAN_TYPE = 36,\n+\tBNXT_ULP_HF0_II_VLAN_CFI_PRI = 37,\n+\tBNXT_ULP_HF0_II_VLAN_VID = 38,\n+\tBNXT_ULP_HF0_II_VLAN_TYPE = 39,\n+\tBNXT_ULP_HF0_I_IPV4_VER = 40,\n+\tBNXT_ULP_HF0_I_IPV4_TOS = 41,\n+\tBNXT_ULP_HF0_I_IPV4_LEN = 42,\n+\tBNXT_ULP_HF0_I_IPV4_FRAG_ID = 43,\n+\tBNXT_ULP_HF0_I_IPV4_FRAG_OFF = 44,\n+\tBNXT_ULP_HF0_I_IPV4_TTL = 45,\n+\tBNXT_ULP_HF0_I_IPV4_NEXT_PID = 46,\n+\tBNXT_ULP_HF0_I_IPV4_CSUM = 47,\n+\tBNXT_ULP_HF0_I_IPV4_SRC_ADDR = 48,\n+\tBNXT_ULP_HF0_I_IPV4_DST_ADDR = 49,\n+\tBNXT_ULP_HF0_I_UDP_SRC_PORT = 50,\n+\tBNXT_ULP_HF0_I_UDP_DST_PORT = 51,\n+\tBNXT_ULP_HF0_I_UDP_LENGTH = 52,\n+\tBNXT_ULP_HF0_I_UDP_CSUM = 53\n+};\n+\n+/* class_template_id = 1: egress flow */\n+enum bnxt_ulp_hf1 {\n+\tBNXT_ULP_HF1_MPLS_TAG_NUM = 0,\n+\tBNXT_ULP_HF1_O_VTAG_NUM = 1,\n+\tBNXT_ULP_HF1_I_VTAG_NUM = 2,\n+\tBNXT_ULP_HF1_SVIF_INDEX = 3,\n+\tBNXT_ULP_HF1_O_ETH_DMAC = 4,\n+\tBNXT_ULP_HF1_O_ETH_SMAC = 5,\n+\tBNXT_ULP_HF1_O_ETH_TYPE = 6,\n+\tBNXT_ULP_HF1_OO_VLAN_CFI_PRI = 7,\n+\tBNXT_ULP_HF1_OO_VLAN_VID = 8,\n+\tBNXT_ULP_HF1_OO_VLAN_TYPE = 9,\n+\tBNXT_ULP_HF1_OI_VLAN_CFI_PRI = 10,\n+\tBNXT_ULP_HF1_OI_VLAN_VID = 11,\n+\tBNXT_ULP_HF1_OI_VLAN_TYPE = 12,\n+\tBNXT_ULP_HF1_O_IPV4_VER = 13,\n+\tBNXT_ULP_HF1_O_IPV4_TOS = 14,\n+\tBNXT_ULP_HF1_O_IPV4_LEN = 15,\n+\tBNXT_ULP_HF1_O_IPV4_FRAG_ID = 16,\n+\tBNXT_ULP_HF1_O_IPV4_FRAG_OFF = 17,\n+\tBNXT_ULP_HF1_O_IPV4_TTL = 18,\n+\tBNXT_ULP_HF1_O_IPV4_NEXT_PID = 19,\n+\tBNXT_ULP_HF1_O_IPV4_CSUM = 20,\n+\tBNXT_ULP_HF1_O_IPV4_SRC_ADDR = 21,\n+\tBNXT_ULP_HF1_O_IPV4_DST_ADDR = 22,\n+\tBNXT_ULP_HF1_O_UDP_SRC_PORT = 23,\n+\tBNXT_ULP_HF1_O_UDP_DST_PORT = 24,\n+\tBNXT_ULP_HF1_O_UDP_LENGTH = 25,\n+\tBNXT_ULP_HF1_O_UDP_CSUM = 26\n+};\n+\n+/* class_template_id = 2: ingress flow */\n+enum bnxt_ulp_hf2 {\n+\tBNXT_ULP_HF2_MPLS_TAG_NUM = 0,\n+\tBNXT_ULP_HF2_O_VTAG_NUM = 1,\n+\tBNXT_ULP_HF2_I_VTAG_NUM = 2,\n+\tBNXT_ULP_HF2_SVIF_INDEX = 3,\n+\tBNXT_ULP_HF2_O_ETH_DMAC = 4,\n+\tBNXT_ULP_HF2_O_ETH_SMAC = 5,\n+\tBNXT_ULP_HF2_O_ETH_TYPE = 6,\n+\tBNXT_ULP_HF2_OO_VLAN_CFI_PRI = 7,\n+\tBNXT_ULP_HF2_OO_VLAN_VID = 8,\n+\tBNXT_ULP_HF2_OO_VLAN_TYPE = 9,\n+\tBNXT_ULP_HF2_OI_VLAN_CFI_PRI = 10,\n+\tBNXT_ULP_HF2_OI_VLAN_VID = 11,\n+\tBNXT_ULP_HF2_OI_VLAN_TYPE = 12,\n+\tBNXT_ULP_HF2_O_IPV4_VER = 13,\n+\tBNXT_ULP_HF2_O_IPV4_TOS = 14,\n+\tBNXT_ULP_HF2_O_IPV4_LEN = 15,\n+\tBNXT_ULP_HF2_O_IPV4_FRAG_ID = 16,\n+\tBNXT_ULP_HF2_O_IPV4_FRAG_OFF = 17,\n+\tBNXT_ULP_HF2_O_IPV4_TTL = 18,\n+\tBNXT_ULP_HF2_O_IPV4_NEXT_PID = 19,\n+\tBNXT_ULP_HF2_O_IPV4_CSUM = 20,\n+\tBNXT_ULP_HF2_O_IPV4_SRC_ADDR = 21,\n+\tBNXT_ULP_HF2_O_IPV4_DST_ADDR = 22,\n+\tBNXT_ULP_HF2_O_UDP_SRC_PORT = 23,\n+\tBNXT_ULP_HF2_O_UDP_DST_PORT = 24,\n+\tBNXT_ULP_HF2_O_UDP_LENGTH = 25,\n+\tBNXT_ULP_HF2_O_UDP_CSUM = 26\n+};\n+\n+#endif /* _ULP_HDR_FIELD_ENUMS_H_ */\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h\nindex 2b0a3d7..e28d049 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h\n@@ -17,9 +17,21 @@\n #include \"rte_flow.h\"\n #include \"tf_core.h\"\n \n+/* Structure to store the protocol fields */\n+#define RTE_PARSER_FLOW_HDR_FIELD_SIZE\t\t16\n+struct ulp_rte_hdr_field {\n+\tuint8_t\t\tspec[RTE_PARSER_FLOW_HDR_FIELD_SIZE];\n+\tuint8_t\t\tmask[RTE_PARSER_FLOW_HDR_FIELD_SIZE];\n+\tuint32_t\tsize;\n+};\n+\n+struct ulp_rte_act_bitmap {\n+\tuint64_t\tbits;\n+};\n+\n /*\n- * structure to hold the action property details\n- * It is a array of 128 bytes\n+ * Structure to hold the action property details.\n+ * It is a array of 128 bytes.\n  */\n struct ulp_rte_act_prop {\n \tuint8_t\tact_details[BNXT_ULP_ACT_PROP_IDX_LAST];\n@@ -39,6 +51,35 @@ struct bnxt_ulp_device_params {\n \tuint32_t\t\t\tnum_resources_per_flow;\n };\n \n+struct bnxt_ulp_mapper_class_tbl_info {\n+\tenum bnxt_ulp_resource_func\tresource_func;\n+\tuint32_t\ttable_type;\n+\tuint8_t\t\tdirection;\n+\tuint8_t\t\tmem;\n+\tuint32_t\tpriority;\n+\tuint8_t\t\tsrch_b4_alloc;\n+\tuint32_t\tcritical_resource;\n+\n+\t/* Information for accessing the ulp_key_field_list */\n+\tuint32_t\tkey_start_idx;\n+\tuint16_t\tkey_bit_size;\n+\tuint16_t\tkey_num_fields;\n+\t/* Size of the blob that holds the key */\n+\tuint16_t\tblob_key_bit_size;\n+\n+\t/* Information for accessing the ulp_class_result_field_list */\n+\tuint32_t\tresult_start_idx;\n+\tuint16_t\tresult_bit_size;\n+\tuint16_t\tresult_num_fields;\n+\n+\t/* Information for accessing the ulp_ident_list */\n+\tuint32_t\tident_start_idx;\n+\tuint16_t\tident_nums;\n+\n+\tuint8_t\t\tmark_enable;\n+\tenum bnxt_ulp_regfile_index\tregfile_wr_idx;\n+};\n+\n struct bnxt_ulp_mapper_act_tbl_info {\n \tenum bnxt_ulp_resource_func\tresource_func;\n \tenum tf_tbl_type table_type;\n@@ -52,6 +93,15 @@ struct bnxt_ulp_mapper_act_tbl_info {\n \tenum bnxt_ulp_regfile_index\tregfile_wr_idx;\n };\n \n+struct bnxt_ulp_mapper_class_key_field_info {\n+\tuint8_t\t\t\tname[64];\n+\tenum bnxt_ulp_mask_opc\tmask_opcode;\n+\tenum bnxt_ulp_spec_opc\tspec_opcode;\n+\tuint16_t\t\tfield_bit_size;\n+\tuint8_t\t\t\tmask_operand[16];\n+\tuint8_t\t\t\tspec_operand[16];\n+};\n+\n struct bnxt_ulp_mapper_result_field_info {\n \tuint8_t\t\t\t\tname[64];\n \tenum bnxt_ulp_result_opc\tresult_opcode;\n@@ -59,14 +109,36 @@ struct bnxt_ulp_mapper_result_field_info {\n \tuint8_t\t\t\t\tresult_operand[16];\n };\n \n+struct bnxt_ulp_mapper_ident_info {\n+\tuint8_t\t\tname[64];\n+\tuint32_t\tresource_func;\n+\n+\tuint16_t\tident_type;\n+\tuint16_t\tident_bit_size;\n+\tuint16_t\tident_bit_pos;\n+\tenum bnxt_ulp_regfile_index\tregfile_wr_idx;\n+};\n+\n+/*\n+ * Flow Mapper Static Data Externs:\n+ * Access to the below static data should be done through access functions and\n+ * directly throughout the code.\n+ */\n+\n /*\n- * The ulp_device_params is indexed by the dev_id\n- * This table maintains the device specific parameters\n+ * The ulp_device_params is indexed by the dev_id.\n+ * This table maintains the device specific parameters.\n  */\n extern struct bnxt_ulp_device_params ulp_device_params[];\n \n /*\n  * The ulp_data_field_list provides the instructions for creating an action\n+ * records such as tcam/em results.\n+ */\n+extern struct bnxt_ulp_mapper_result_field_info\tulp_class_result_field_list[];\n+\n+/*\n+ * The ulp_data_field_list provides the instructions for creating an action\n  * record.  It uses the same structure as the result list, but is only used for\n  * actions.\n  */\n@@ -75,6 +147,19 @@ struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[];\n \n /*\n  * The ulp_act_prop_map_table provides the mapping to index and size of action\n+ * tcam and em tables.\n+ */\n+extern\n+struct bnxt_ulp_mapper_class_key_field_info\tulp_class_key_field_list[];\n+\n+/*\n+ * The ulp_ident_list provides the instructions for creating identifiers such\n+ * as profile ids.\n+ */\n+extern struct bnxt_ulp_mapper_ident_info\tulp_ident_list[];\n+\n+/*\n+ * The ulp_act_prop_map_table provides the mapping to index and size of action\n  * properties.\n  */\n extern uint32_t ulp_act_prop_map_table[];\n",
    "prefixes": [
        "19/33"
    ]
}