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GET /api/patches/66788/?format=api
{ "id": 66788, "url": "http://patches.dpdk.org/api/patches/66788/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1584459511-5353-5-git-send-email-venkatkumar.duvvuru@broadcom.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1584459511-5353-5-git-send-email-venkatkumar.duvvuru@broadcom.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1584459511-5353-5-git-send-email-venkatkumar.duvvuru@broadcom.com", "date": "2020-03-17T15:38:02", "name": "[04/33] net/bnxt: add initial tf core session open", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "709f578ed6ecf6257fe6fa00126dbc408d4a6417", "submitter": { "id": 1635, "url": "http://patches.dpdk.org/api/people/1635/?format=api", "name": "Venkat Duvvuru", "email": "venkatkumar.duvvuru@broadcom.com" }, "delegate": { "id": 1766, "url": "http://patches.dpdk.org/api/users/1766/?format=api", "username": "ajitkhaparde", "first_name": "Ajit", "last_name": "Khaparde", "email": "ajit.khaparde@broadcom.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1584459511-5353-5-git-send-email-venkatkumar.duvvuru@broadcom.com/mbox/", "series": [ { "id": 8955, "url": "http://patches.dpdk.org/api/series/8955/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8955", "date": "2020-03-17T15:37:58", "name": "add support for host based flow table management", "version": 1, "mbox": "http://patches.dpdk.org/series/8955/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/66788/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/66788/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1BACDA0565;\n\tTue, 17 Mar 2020 16:40:01 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 92B9C1C06D;\n\tTue, 17 Mar 2020 16:39:10 +0100 (CET)", "from mail-wr1-f68.google.com (mail-wr1-f68.google.com\n [209.85.221.68]) by dpdk.org (Postfix) with ESMTP id D09221C06D\n for <dev@dpdk.org>; Tue, 17 Mar 2020 16:39:09 +0100 (CET)", "by mail-wr1-f68.google.com with SMTP id z15so26259389wrl.1\n for <dev@dpdk.org>; Tue, 17 Mar 2020 08:39:09 -0700 (PDT)", "from S60.dhcp.broadcom.net ([192.19.234.250])\n by smtp.gmail.com with ESMTPSA id q4sm5052142wro.56.2020.03.17.08.39.05\n (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n Tue, 17 Mar 2020 08:39:06 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com;\n s=google;\n h=from:to:cc:subject:date:message-id:in-reply-to:references;\n bh=iIAJ0orGrAimSFN5ycFr9i8LKsaz5pLwfcvhor/FSd0=;\n b=OBcUhI2CcidzCnQWWrvn2YrCZOCQ2jo9XWWGhRdcsKS9lclLgCQRVXrIuFvRJI98qp\n 5NDw2oh7mPWTUcA/1f8OKwXR/HUcQaGOy9P4EADbvhtY678DkEPCzupbD0g7qebZIZS9\n nhZ+ljhcdD0n6UvZJOFrFBm5cxGLqvkHCG7hM=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references;\n bh=iIAJ0orGrAimSFN5ycFr9i8LKsaz5pLwfcvhor/FSd0=;\n b=Yhn1M/liBFlTdUMhZJLwz6VIE/xbkUHZYbySqA+P3ZL+WR/Hhx62OhcZPaT09e/Llu\n 7yGBab8wJZnNMIKe1I6rj9ZxSLrRS5h6v/dMG1bH288JKgjWOtVMmId4RiXkeUJkjd4T\n 72Io2k9KMkx5v7fLLIlb8b9ihneoZHByYXSwiXH5oQdLppcdLh2LCLFoyNt3G1JaRXKd\n WXpV8xACyPoVLjh/2THty5tkIlzcPyvHjLGHqn36S2axlJCWcDFM9lfuePqn1McdFgIc\n JJUENh5NMLcQNCGqWndJTi9m5EvjmsKGBzid4Czbd0krjlfAOqYsiNCg+MkjFU0MbTrF\n pn0A==", "X-Gm-Message-State": "ANhLgQ07P8FJHnMjy1ghdMDiLjK6zdUaDj7ElimzGkZ0KIm/ao/tJFxd\n ryLTlAYujMAi1q+hcr+V33U65wyLJSbgrR7jE1WTys8I2PTNTN7iSAuXmAg0H99Jnk+YpHMQM5p\n c/T2IjoKNL5Hx1RiMea7oQwtEnGveQqpy//ZeX6SaF4J45L045p+9BgRuV9czExnMCrn1", "X-Google-Smtp-Source": "\n ADFU+vvmvUr++Qs/fnLY51MzBICP4zFKNw2NQ7TdPudfmvQYiMcpVVRrb3pE0bakqWbwfQmPmc11Qg==", "X-Received": "by 2002:adf:904a:: with SMTP id h68mr6226618wrh.291.1584459547498;\n Tue, 17 Mar 2020 08:39:07 -0700 (PDT)", "From": "Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>", "To": "dev@dpdk.org", "Cc": "Michael Wildt <michael.wildt@broadcom.com>", "Date": "Tue, 17 Mar 2020 21:08:02 +0530", "Message-Id": "\n <1584459511-5353-5-git-send-email-venkatkumar.duvvuru@broadcom.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "\n <1584459511-5353-1-git-send-email-venkatkumar.duvvuru@broadcom.com>", "References": "\n <1584459511-5353-1-git-send-email-venkatkumar.duvvuru@broadcom.com>", "Subject": "[dpdk-dev] [PATCH 04/33] net/bnxt: add initial tf core session open", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Michael Wildt <michael.wildt@broadcom.com>\n\n- Add infrastructure support\n- Add tf_core open session support\n\nSigned-off-by: Michael Wildt <michael.wildt@broadcom.com>\nReviewed-by: Randy Schacher <stuart.schacher@broadcom.com>\nReviewed-by: Ajit Kumar Khaparde <ajit.khaparde@broadcom.com>\n---\n drivers/net/bnxt/Makefile | 8 +\n drivers/net/bnxt/bnxt.h | 7 +\n drivers/net/bnxt/tf_core/hwrm_tf.h | 971 +++++++++++++++++++++++++++++++\n drivers/net/bnxt/tf_core/tf_core.c | 145 +++++\n drivers/net/bnxt/tf_core/tf_core.h | 347 +++++++++++\n drivers/net/bnxt/tf_core/tf_msg.c | 79 +++\n drivers/net/bnxt/tf_core/tf_msg.h | 44 ++\n drivers/net/bnxt/tf_core/tf_msg_common.h | 47 ++\n drivers/net/bnxt/tf_core/tf_project.h | 24 +\n drivers/net/bnxt/tf_core/tf_resources.h | 46 ++\n drivers/net/bnxt/tf_core/tf_rm.h | 33 ++\n drivers/net/bnxt/tf_core/tf_session.h | 85 +++\n drivers/net/bnxt/tf_core/tfp.c | 163 ++++++\n drivers/net/bnxt/tf_core/tfp.h | 188 ++++++\n 14 files changed, 2187 insertions(+)\n create mode 100644 drivers/net/bnxt/tf_core/hwrm_tf.h\n create mode 100644 drivers/net/bnxt/tf_core/tf_core.c\n create mode 100644 drivers/net/bnxt/tf_core/tf_core.h\n create mode 100644 drivers/net/bnxt/tf_core/tf_msg.c\n create mode 100644 drivers/net/bnxt/tf_core/tf_msg.h\n create mode 100644 drivers/net/bnxt/tf_core/tf_msg_common.h\n create mode 100644 drivers/net/bnxt/tf_core/tf_project.h\n create mode 100644 drivers/net/bnxt/tf_core/tf_resources.h\n create mode 100644 drivers/net/bnxt/tf_core/tf_rm.h\n create mode 100644 drivers/net/bnxt/tf_core/tf_session.h\n create mode 100644 drivers/net/bnxt/tf_core/tfp.c\n create mode 100644 drivers/net/bnxt/tf_core/tfp.h", "diff": "diff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile\nindex b77532b..0686988 100644\n--- a/drivers/net/bnxt/Makefile\n+++ b/drivers/net/bnxt/Makefile\n@@ -43,6 +43,14 @@ ifeq ($(CONFIG_RTE_ARCH_X86), y)\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_rxtx_vec_sse.c\n endif\n \n+ifeq ($(CONFIG_RTE_LIBRTE_BNXT_TRUFLOW), y)\n+CFLAGS += -I$(SRCDIR) -I$(SRCDIR)/tf_core\n+endif\n+\n+SRCS-$(CONFIG_RTE_LIBRTE_BNXT_TRUFLOW) += tf_core/tf_core.c\n+SRCS-$(CONFIG_RTE_LIBRTE_BNXT_TRUFLOW) += tf_core/tf_msg.c\n+SRCS-$(CONFIG_RTE_LIBRTE_BNXT_TRUFLOW) += tf_core/tfp.c\n+\n #\n # Export include files\n #\ndiff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h\nindex 07fb4df..0142acb 100644\n--- a/drivers/net/bnxt/bnxt.h\n+++ b/drivers/net/bnxt/bnxt.h\n@@ -21,6 +21,10 @@\n #include \"bnxt_cpr.h\"\n #include \"bnxt_util.h\"\n \n+#ifdef RTE_LIBRTE_BNXT_TRUFLOW\n+#include \"tf_core.h\"\n+#endif\n+\n /* Vendor ID */\n #define PCI_VENDOR_ID_BROADCOM\t\t0x14E4\n \n@@ -680,6 +684,9 @@ struct bnxt {\n /* TCAM and EM should be 16-bit only. Other modes not supported. */\n #define BNXT_FLOW_ID_MASK\t0x0000ffff\n \tstruct bnxt_mark_info\t*mark_table;\n+#ifdef RTE_LIBRTE_BNXT_TRUFLOW\n+\tstruct tf tfp;\n+#endif\n };\n \n int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu);\ndiff --git a/drivers/net/bnxt/tf_core/hwrm_tf.h b/drivers/net/bnxt/tf_core/hwrm_tf.h\nnew file mode 100644\nindex 0000000..a8a5547\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_core/hwrm_tf.h\n@@ -0,0 +1,971 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019-2020 Broadcom\n+ * All rights reserved.\n+ */\n+#ifndef _HWRM_TF_H_\n+#define _HWRM_TF_H_\n+\n+#include \"tf_core.h\"\n+\n+typedef enum tf_type {\n+\tTF_TYPE_TRUFLOW,\n+\tTF_TYPE_LAST = TF_TYPE_TRUFLOW,\n+} tf_type_t;\n+\n+typedef enum tf_subtype {\n+\tHWRM_TFT_SESSION_ATTACH = 712,\n+\tHWRM_TFT_SESSION_HW_RESC_QCAPS = 721,\n+\tHWRM_TFT_SESSION_HW_RESC_ALLOC = 722,\n+\tHWRM_TFT_SESSION_HW_RESC_FREE = 723,\n+\tHWRM_TFT_SESSION_HW_RESC_FLUSH = 724,\n+\tHWRM_TFT_SESSION_SRAM_RESC_QCAPS = 725,\n+\tHWRM_TFT_SESSION_SRAM_RESC_ALLOC = 726,\n+\tHWRM_TFT_SESSION_SRAM_RESC_FREE = 727,\n+\tHWRM_TFT_SESSION_SRAM_RESC_FLUSH = 728,\n+\tHWRM_TFT_TBL_SCOPE_CFG = 731,\n+\tHWRM_TFT_EM_RULE_INSERT = 739,\n+\tHWRM_TFT_EM_RULE_DELETE = 740,\n+\tHWRM_TFT_REG_GET = 821,\n+\tHWRM_TFT_REG_SET = 822,\n+\tHWRM_TFT_TBL_TYPE_SET = 823,\n+\tHWRM_TFT_TBL_TYPE_GET = 824,\n+\tTF_SUBTYPE_LAST = HWRM_TFT_TBL_TYPE_GET,\n+} tf_subtype_t;\n+\n+/* Request and Response compile time checking */\n+/* u32_t\ttlv_req_value[26]; */\n+#define TF_MAX_REQ_SIZE 104\n+/* u32_t\ttlv_resp_value[170]; */\n+#define TF_MAX_RESP_SIZE 680\n+#define BUILD_BUG_ON(condition) typedef char p__LINE__[(condition) ? 1 : -1]\n+\n+/* Use this to allocate/free any kind of\n+ * indexes over HWRM and fill the parms pointer\n+ */\n+#define TF_BULK_RECV\t 128\n+#define TF_BULK_SEND\t 16\n+\n+/* EM Key value */\n+#define TF_DEV_DATA_TYPE_TF_EM_RULE_INSERT_KEY_DATA 0x2e30UL\n+/* EM Key value */\n+#define TF_DEV_DATA_TYPE_TF_EM_RULE_DELETE_KEY_DATA 0x2e40UL\n+/* L2 Context DMA Address Type */\n+#define TF_DEV_DATA_TYPE_TF_L2_CTX_DMA_ADDR\t\t0x2fe0UL\n+/* L2 Context Entry */\n+#define TF_DEV_DATA_TYPE_TF_L2_CTX_ENTRY\t\t0x2fe1UL\n+/* Prof tcam DMA Address Type */\n+#define TF_DEV_DATA_TYPE_TF_PROF_TCAM_DMA_ADDR\t\t0x3030UL\n+/* Prof tcam Entry */\n+#define TF_DEV_DATA_TYPE_TF_PROF_TCAM_ENTRY\t\t0x3031UL\n+/* WC DMA Address Type */\n+#define TF_DEV_DATA_TYPE_TF_WC_DMA_ADDR\t\t\t0x30d0UL\n+/* WC Entry */\n+#define TF_DEV_DATA_TYPE_TF_WC_ENTRY\t\t\t0x30d1UL\n+/* Action Data */\n+#define TF_DEV_DATA_TYPE_TF_ACTION_DATA\t\t\t0x3170UL\n+#define TF_DEV_DATA_TYPE_LAST TF_DEV_DATA_TYPE_TF_ACTION_DATA\n+\n+#define TF_BITS2BYTES(x) (((x) + 7) >> 3)\n+#define TF_BITS2BYTES_WORD_ALIGN(x) ((((x) + 31) >> 5) * 4)\n+\n+struct tf_session_attach_input;\n+struct tf_session_hw_resc_qcaps_input;\n+struct tf_session_hw_resc_qcaps_output;\n+struct tf_session_hw_resc_alloc_input;\n+struct tf_session_hw_resc_alloc_output;\n+struct tf_session_hw_resc_free_input;\n+struct tf_session_hw_resc_flush_input;\n+struct tf_session_sram_resc_qcaps_input;\n+struct tf_session_sram_resc_qcaps_output;\n+struct tf_session_sram_resc_alloc_input;\n+struct tf_session_sram_resc_alloc_output;\n+struct tf_session_sram_resc_free_input;\n+struct tf_session_sram_resc_flush_input;\n+struct tf_tbl_type_set_input;\n+struct tf_tbl_type_get_input;\n+struct tf_tbl_type_get_output;\n+struct tf_em_internal_insert_input;\n+struct tf_em_internal_insert_output;\n+struct tf_em_internal_delete_input;\n+/* Input params for session attach */\n+typedef struct tf_session_attach_input {\n+\t/* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */\n+\tuint32_t\t\t\t fw_session_id;\n+\t/* Session Name */\n+\tchar\t\t\t\t session_name[TF_SESSION_NAME_MAX];\n+} tf_session_attach_input_t, *ptf_session_attach_input_t;\n+BUILD_BUG_ON(sizeof(tf_session_attach_input_t) <= TF_MAX_REQ_SIZE);\n+\n+/* Input params for session resource HW qcaps */\n+typedef struct tf_session_hw_resc_qcaps_input {\n+\t/* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */\n+\tuint32_t\t\t\t fw_session_id;\n+\t/* flags */\n+\tuint16_t\t\t\t flags;\n+\t/* When set to 0, indicates the query apply to RX */\n+#define TF_SESSION_HW_RESC_QCAPS_INPUT_FLAGS_DIR_RX\t (0x0)\n+\t/* When set to 1, indicates the query apply to TX */\n+#define TF_SESSION_HW_RESC_QCAPS_INPUT_FLAGS_DIR_TX\t (0x1)\n+} tf_session_hw_resc_qcaps_input_t, *ptf_session_hw_resc_qcaps_input_t;\n+BUILD_BUG_ON(sizeof(tf_session_hw_resc_qcaps_input_t) <= TF_MAX_REQ_SIZE);\n+\n+/* Output params for session resource HW qcaps */\n+typedef struct tf_session_hw_resc_qcaps_output {\n+\t/* Control Flags */\n+\tuint32_t\t\t\t flags;\n+\t/* When set to 0, indicates Static partitioning */\n+#define TF_SESSION_HW_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_STATIC\t (0x0)\n+\t/* When set to 1, indicates Strategy 1 */\n+#define TF_SESSION_HW_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_1\t (0x1)\n+\t/* When set to 1, indicates Strategy 2 */\n+#define TF_SESSION_HW_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_2\t (0x2)\n+\t/* When set to 1, indicates Strategy 3 */\n+#define TF_SESSION_HW_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_3\t (0x3)\n+\t/* Unused */\n+\tuint8_t\t\t\t unused[4];\n+\t/* Minimum guaranteed number of L2 Ctx */\n+\tuint16_t\t\t\t l2_ctx_tcam_entries_min;\n+\t/* Maximum non-guaranteed number of L2 Ctx */\n+\tuint16_t\t\t\t l2_ctx_tcam_entries_max;\n+\t/* Minimum guaranteed number of profile functions */\n+\tuint16_t\t\t\t prof_func_min;\n+\t/* Maximum non-guaranteed number of profile functions */\n+\tuint16_t\t\t\t prof_func_max;\n+\t/* Minimum guaranteed number of profile TCAM entries */\n+\tuint16_t\t\t\t prof_tcam_entries_min;\n+\t/* Maximum non-guaranteed number of profile TCAM entries */\n+\tuint16_t\t\t\t prof_tcam_entries_max;\n+\t/* Minimum guaranteed number of EM profile ID */\n+\tuint16_t\t\t\t em_prof_id_min;\n+\t/* Maximum non-guaranteed number of EM profile ID */\n+\tuint16_t\t\t\t em_prof_id_max;\n+\t/* Minimum guaranteed number of EM records entries */\n+\tuint16_t\t\t\t em_record_entries_min;\n+\t/* Maximum non-guaranteed number of EM record entries */\n+\tuint16_t\t\t\t em_record_entries_max;\n+\t/* Minimum guaranteed number of WC TCAM profile ID */\n+\tuint16_t\t\t\t wc_tcam_prof_id_min;\n+\t/* Maximum non-guaranteed number of WC TCAM profile ID */\n+\tuint16_t\t\t\t wc_tcam_prof_id_max;\n+\t/* Minimum guaranteed number of WC TCAM entries */\n+\tuint16_t\t\t\t wc_tcam_entries_min;\n+\t/* Maximum non-guaranteed number of WC TCAM entries */\n+\tuint16_t\t\t\t wc_tcam_entries_max;\n+\t/* Minimum guaranteed number of meter profiles */\n+\tuint16_t\t\t\t meter_profiles_min;\n+\t/* Maximum non-guaranteed number of meter profiles */\n+\tuint16_t\t\t\t meter_profiles_max;\n+\t/* Minimum guaranteed number of meter instances */\n+\tuint16_t\t\t\t meter_inst_min;\n+\t/* Maximum non-guaranteed number of meter instances */\n+\tuint16_t\t\t\t meter_inst_max;\n+\t/* Minimum guaranteed number of mirrors */\n+\tuint16_t\t\t\t mirrors_min;\n+\t/* Maximum non-guaranteed number of mirrors */\n+\tuint16_t\t\t\t mirrors_max;\n+\t/* Minimum guaranteed number of UPAR */\n+\tuint16_t\t\t\t upar_min;\n+\t/* Maximum non-guaranteed number of UPAR */\n+\tuint16_t\t\t\t upar_max;\n+\t/* Minimum guaranteed number of SP TCAM entries */\n+\tuint16_t\t\t\t sp_tcam_entries_min;\n+\t/* Maximum non-guaranteed number of SP TCAM entries */\n+\tuint16_t\t\t\t sp_tcam_entries_max;\n+\t/* Minimum guaranteed number of L2 Functions */\n+\tuint16_t\t\t\t l2_func_min;\n+\t/* Maximum non-guaranteed number of L2 Functions */\n+\tuint16_t\t\t\t l2_func_max;\n+\t/* Minimum guaranteed number of flexible key templates */\n+\tuint16_t\t\t\t flex_key_templ_min;\n+\t/* Maximum non-guaranteed number of flexible key templates */\n+\tuint16_t\t\t\t flex_key_templ_max;\n+\t/* Minimum guaranteed number of table Scopes */\n+\tuint16_t\t\t\t tbl_scope_min;\n+\t/* Maximum non-guaranteed number of table Scopes */\n+\tuint16_t\t\t\t tbl_scope_max;\n+\t/* Minimum guaranteed number of epoch0 entries */\n+\tuint16_t\t\t\t epoch0_entries_min;\n+\t/* Maximum non-guaranteed number of epoch0 entries */\n+\tuint16_t\t\t\t epoch0_entries_max;\n+\t/* Minimum guaranteed number of epoch1 entries */\n+\tuint16_t\t\t\t epoch1_entries_min;\n+\t/* Maximum non-guaranteed number of epoch1 entries */\n+\tuint16_t\t\t\t epoch1_entries_max;\n+\t/* Minimum guaranteed number of metadata */\n+\tuint16_t\t\t\t metadata_min;\n+\t/* Maximum non-guaranteed number of metadata */\n+\tuint16_t\t\t\t metadata_max;\n+\t/* Minimum guaranteed number of CT states */\n+\tuint16_t\t\t\t ct_state_min;\n+\t/* Maximum non-guaranteed number of CT states */\n+\tuint16_t\t\t\t ct_state_max;\n+\t/* Minimum guaranteed number of range profiles */\n+\tuint16_t\t\t\t range_prof_min;\n+\t/* Maximum non-guaranteed number range profiles */\n+\tuint16_t\t\t\t range_prof_max;\n+\t/* Minimum guaranteed number of range entries */\n+\tuint16_t\t\t\t range_entries_min;\n+\t/* Maximum non-guaranteed number of range entries */\n+\tuint16_t\t\t\t range_entries_max;\n+\t/* Minimum guaranteed number of LAG table entries */\n+\tuint16_t\t\t\t lag_tbl_entries_min;\n+\t/* Maximum non-guaranteed number of LAG table entries */\n+\tuint16_t\t\t\t lag_tbl_entries_max;\n+} tf_session_hw_resc_qcaps_output_t, *ptf_session_hw_resc_qcaps_output_t;\n+BUILD_BUG_ON(sizeof(tf_session_hw_resc_qcaps_output_t) <= TF_MAX_RESP_SIZE);\n+\n+/* Input params for session resource HW alloc */\n+typedef struct tf_session_hw_resc_alloc_input {\n+\t/* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */\n+\tuint32_t\t\t\t fw_session_id;\n+\t/* flags */\n+\tuint16_t\t\t\t flags;\n+\t/* When set to 0, indicates the query apply to RX */\n+#define TF_SESSION_HW_RESC_ALLOC_INPUT_FLAGS_DIR_RX\t (0x0)\n+\t/* When set to 1, indicates the query apply to TX */\n+#define TF_SESSION_HW_RESC_ALLOC_INPUT_FLAGS_DIR_TX\t (0x1)\n+\t/* Unused */\n+\tuint8_t\t\t\t unused[2];\n+\t/* Number of L2 CTX TCAM entries to be allocated */\n+\tuint16_t\t\t\t num_l2_ctx_tcam_entries;\n+\t/* Number of profile functions to be allocated */\n+\tuint16_t\t\t\t num_prof_func_entries;\n+\t/* Number of profile TCAM entries to be allocated */\n+\tuint16_t\t\t\t num_prof_tcam_entries;\n+\t/* Number of EM profile ids to be allocated */\n+\tuint16_t\t\t\t num_em_prof_id;\n+\t/* Number of EM records entries to be allocated */\n+\tuint16_t\t\t\t num_em_record_entries;\n+\t/* Number of WC profiles ids to be allocated */\n+\tuint16_t\t\t\t num_wc_tcam_prof_id;\n+\t/* Number of WC TCAM entries to be allocated */\n+\tuint16_t\t\t\t num_wc_tcam_entries;\n+\t/* Number of meter profiles to be allocated */\n+\tuint16_t\t\t\t num_meter_profiles;\n+\t/* Number of meter instances to be allocated */\n+\tuint16_t\t\t\t num_meter_inst;\n+\t/* Number of mirrors to be allocated */\n+\tuint16_t\t\t\t num_mirrors;\n+\t/* Number of UPAR to be allocated */\n+\tuint16_t\t\t\t num_upar;\n+\t/* Number of SP TCAM entries to be allocated */\n+\tuint16_t\t\t\t num_sp_tcam_entries;\n+\t/* Number of L2 functions to be allocated */\n+\tuint16_t\t\t\t num_l2_func;\n+\t/* Number of flexible key templates to be allocated */\n+\tuint16_t\t\t\t num_flex_key_templ;\n+\t/* Number of table scopes to be allocated */\n+\tuint16_t\t\t\t num_tbl_scope;\n+\t/* Number of epoch0 entries to be allocated */\n+\tuint16_t\t\t\t num_epoch0_entries;\n+\t/* Number of epoch1 entries to be allocated */\n+\tuint16_t\t\t\t num_epoch1_entries;\n+\t/* Number of metadata to be allocated */\n+\tuint16_t\t\t\t num_metadata;\n+\t/* Number of CT states to be allocated */\n+\tuint16_t\t\t\t num_ct_state;\n+\t/* Number of range profiles to be allocated */\n+\tuint16_t\t\t\t num_range_prof;\n+\t/* Number of range Entries to be allocated */\n+\tuint16_t\t\t\t num_range_entries;\n+\t/* Number of LAG table entries to be allocated */\n+\tuint16_t\t\t\t num_lag_tbl_entries;\n+} tf_session_hw_resc_alloc_input_t, *ptf_session_hw_resc_alloc_input_t;\n+BUILD_BUG_ON(sizeof(tf_session_hw_resc_alloc_input_t) <= TF_MAX_REQ_SIZE);\n+\n+/* Output params for session resource HW alloc */\n+typedef struct tf_session_hw_resc_alloc_output {\n+\t/* Starting index of L2 CTX TCAM entries allocated to the session */\n+\tuint16_t\t\t\t l2_ctx_tcam_entries_start;\n+\t/* Number of L2 CTX TCAM entries allocated */\n+\tuint16_t\t\t\t l2_ctx_tcam_entries_stride;\n+\t/* Starting index of profile functions allocated to the session */\n+\tuint16_t\t\t\t prof_func_start;\n+\t/* Number of profile functions allocated */\n+\tuint16_t\t\t\t prof_func_stride;\n+\t/* Starting index of profile TCAM entries allocated to the session */\n+\tuint16_t\t\t\t prof_tcam_entries_start;\n+\t/* Number of profile TCAM entries allocated */\n+\tuint16_t\t\t\t prof_tcam_entries_stride;\n+\t/* Starting index of EM profile ids allocated to the session */\n+\tuint16_t\t\t\t em_prof_id_start;\n+\t/* Number of EM profile ids allocated */\n+\tuint16_t\t\t\t em_prof_id_stride;\n+\t/* Starting index of EM record entries allocated to the session */\n+\tuint16_t\t\t\t em_record_entries_start;\n+\t/* Number of EM record entries allocated */\n+\tuint16_t\t\t\t em_record_entries_stride;\n+\t/* Starting index of WC TCAM profiles ids allocated to the session */\n+\tuint16_t\t\t\t wc_tcam_prof_id_start;\n+\t/* Number of WC TCAM profile ids allocated */\n+\tuint16_t\t\t\t wc_tcam_prof_id_stride;\n+\t/* Starting index of WC TCAM entries allocated to the session */\n+\tuint16_t\t\t\t wc_tcam_entries_start;\n+\t/* Number of WC TCAM allocated */\n+\tuint16_t\t\t\t wc_tcam_entries_stride;\n+\t/* Starting index of meter profiles allocated to the session */\n+\tuint16_t\t\t\t meter_profiles_start;\n+\t/* Number of meter profiles allocated */\n+\tuint16_t\t\t\t meter_profiles_stride;\n+\t/* Starting index of meter instance allocated to the session */\n+\tuint16_t\t\t\t meter_inst_start;\n+\t/* Number of meter instance allocated */\n+\tuint16_t\t\t\t meter_inst_stride;\n+\t/* Starting index of mirrors allocated to the session */\n+\tuint16_t\t\t\t mirrors_start;\n+\t/* Number of mirrors allocated */\n+\tuint16_t\t\t\t mirrors_stride;\n+\t/* Starting index of UPAR allocated to the session */\n+\tuint16_t\t\t\t upar_start;\n+\t/* Number of UPAR allocated */\n+\tuint16_t\t\t\t upar_stride;\n+\t/* Starting index of SP TCAM entries allocated to the session */\n+\tuint16_t\t\t\t sp_tcam_entries_start;\n+\t/* Number of SP TCAM entries allocated */\n+\tuint16_t\t\t\t sp_tcam_entries_stride;\n+\t/* Starting index of L2 functions allocated to the session */\n+\tuint16_t\t\t\t l2_func_start;\n+\t/* Number of L2 functions allocated */\n+\tuint16_t\t\t\t l2_func_stride;\n+\t/* Starting index of flexible key templates allocated to the session */\n+\tuint16_t\t\t\t flex_key_templ_start;\n+\t/* Number of flexible key templates allocated */\n+\tuint16_t\t\t\t flex_key_templ_stride;\n+\t/* Starting index of table scopes allocated to the session */\n+\tuint16_t\t\t\t tbl_scope_start;\n+\t/* Number of table scopes allocated */\n+\tuint16_t\t\t\t tbl_scope_stride;\n+\t/* Starting index of epoch0 entries allocated to the session */\n+\tuint16_t\t\t\t epoch0_entries_start;\n+\t/* Number of epoch0 entries allocated */\n+\tuint16_t\t\t\t epoch0_entries_stride;\n+\t/* Starting index of epoch1 entries allocated to the session */\n+\tuint16_t\t\t\t epoch1_entries_start;\n+\t/* Number of epoch1 entries allocated */\n+\tuint16_t\t\t\t epoch1_entries_stride;\n+\t/* Starting index of metadata allocated to the session */\n+\tuint16_t\t\t\t metadata_start;\n+\t/* Number of metadata allocated */\n+\tuint16_t\t\t\t metadata_stride;\n+\t/* Starting index of CT states allocated to the session */\n+\tuint16_t\t\t\t ct_state_start;\n+\t/* Number of CT states allocated */\n+\tuint16_t\t\t\t ct_state_stride;\n+\t/* Starting index of range profiles allocated to the session */\n+\tuint16_t\t\t\t range_prof_start;\n+\t/* Number range profiles allocated */\n+\tuint16_t\t\t\t range_prof_stride;\n+\t/* Starting index of range enntries allocated to the session */\n+\tuint16_t\t\t\t range_entries_start;\n+\t/* Number of range entries allocated */\n+\tuint16_t\t\t\t range_entries_stride;\n+\t/* Starting index of LAG table entries allocated to the session */\n+\tuint16_t\t\t\t lag_tbl_entries_start;\n+\t/* Number of LAG table entries allocated */\n+\tuint16_t\t\t\t lag_tbl_entries_stride;\n+} tf_session_hw_resc_alloc_output_t, *ptf_session_hw_resc_alloc_output_t;\n+BUILD_BUG_ON(sizeof(tf_session_hw_resc_alloc_output_t) <= TF_MAX_RESP_SIZE);\n+\n+/* Input params for session resource HW free */\n+typedef struct tf_session_hw_resc_free_input {\n+\t/* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */\n+\tuint32_t\t\t\t fw_session_id;\n+\t/* flags */\n+\tuint16_t\t\t\t flags;\n+\t/* When set to 0, indicates the query apply to RX */\n+#define TF_SESSION_HW_RESC_FREE_INPUT_FLAGS_DIR_RX\t (0x0)\n+\t/* When set to 1, indicates the query apply to TX */\n+#define TF_SESSION_HW_RESC_FREE_INPUT_FLAGS_DIR_TX\t (0x1)\n+\t/* Unused */\n+\tuint8_t\t\t\t unused[2];\n+\t/* Starting index of L2 CTX TCAM entries allocated to the session */\n+\tuint16_t\t\t\t l2_ctx_tcam_entries_start;\n+\t/* Number of L2 CTX TCAM entries allocated */\n+\tuint16_t\t\t\t l2_ctx_tcam_entries_stride;\n+\t/* Starting index of profile functions allocated to the session */\n+\tuint16_t\t\t\t prof_func_start;\n+\t/* Number of profile functions allocated */\n+\tuint16_t\t\t\t prof_func_stride;\n+\t/* Starting index of profile TCAM entries allocated to the session */\n+\tuint16_t\t\t\t prof_tcam_entries_start;\n+\t/* Number of profile TCAM entries allocated */\n+\tuint16_t\t\t\t prof_tcam_entries_stride;\n+\t/* Starting index of EM profile ids allocated to the session */\n+\tuint16_t\t\t\t em_prof_id_start;\n+\t/* Number of EM profile ids allocated */\n+\tuint16_t\t\t\t em_prof_id_stride;\n+\t/* Starting index of EM record entries allocated to the session */\n+\tuint16_t\t\t\t em_record_entries_start;\n+\t/* Number of EM record entries allocated */\n+\tuint16_t\t\t\t em_record_entries_stride;\n+\t/* Starting index of WC TCAM profiles ids allocated to the session */\n+\tuint16_t\t\t\t wc_tcam_prof_id_start;\n+\t/* Number of WC TCAM profile ids allocated */\n+\tuint16_t\t\t\t wc_tcam_prof_id_stride;\n+\t/* Starting index of WC TCAM entries allocated to the session */\n+\tuint16_t\t\t\t wc_tcam_entries_start;\n+\t/* Number of WC TCAM allocated */\n+\tuint16_t\t\t\t wc_tcam_entries_stride;\n+\t/* Starting index of meter profiles allocated to the session */\n+\tuint16_t\t\t\t meter_profiles_start;\n+\t/* Number of meter profiles allocated */\n+\tuint16_t\t\t\t meter_profiles_stride;\n+\t/* Starting index of meter instance allocated to the session */\n+\tuint16_t\t\t\t meter_inst_start;\n+\t/* Number of meter instance allocated */\n+\tuint16_t\t\t\t meter_inst_stride;\n+\t/* Starting index of mirrors allocated to the session */\n+\tuint16_t\t\t\t mirrors_start;\n+\t/* Number of mirrors allocated */\n+\tuint16_t\t\t\t mirrors_stride;\n+\t/* Starting index of UPAR allocated to the session */\n+\tuint16_t\t\t\t upar_start;\n+\t/* Number of UPAR allocated */\n+\tuint16_t\t\t\t upar_stride;\n+\t/* Starting index of SP TCAM entries allocated to the session */\n+\tuint16_t\t\t\t sp_tcam_entries_start;\n+\t/* Number of SP TCAM entries allocated */\n+\tuint16_t\t\t\t sp_tcam_entries_stride;\n+\t/* Starting index of L2 functions allocated to the session */\n+\tuint16_t\t\t\t l2_func_start;\n+\t/* Number of L2 functions allocated */\n+\tuint16_t\t\t\t l2_func_stride;\n+\t/* Starting index of flexible key templates allocated to the session */\n+\tuint16_t\t\t\t flex_key_templ_start;\n+\t/* Number of flexible key templates allocated */\n+\tuint16_t\t\t\t flex_key_templ_stride;\n+\t/* Starting index of table scopes allocated to the session */\n+\tuint16_t\t\t\t tbl_scope_start;\n+\t/* Number of table scopes allocated */\n+\tuint16_t\t\t\t tbl_scope_stride;\n+\t/* Starting index of epoch0 entries allocated to the session */\n+\tuint16_t\t\t\t epoch0_entries_start;\n+\t/* Number of epoch0 entries allocated */\n+\tuint16_t\t\t\t epoch0_entries_stride;\n+\t/* Starting index of epoch1 entries allocated to the session */\n+\tuint16_t\t\t\t epoch1_entries_start;\n+\t/* Number of epoch1 entries allocated */\n+\tuint16_t\t\t\t epoch1_entries_stride;\n+\t/* Starting index of metadata allocated to the session */\n+\tuint16_t\t\t\t metadata_start;\n+\t/* Number of metadata allocated */\n+\tuint16_t\t\t\t metadata_stride;\n+\t/* Starting index of CT states allocated to the session */\n+\tuint16_t\t\t\t ct_state_start;\n+\t/* Number of CT states allocated */\n+\tuint16_t\t\t\t ct_state_stride;\n+\t/* Starting index of range profiles allocated to the session */\n+\tuint16_t\t\t\t range_prof_start;\n+\t/* Number range profiles allocated */\n+\tuint16_t\t\t\t range_prof_stride;\n+\t/* Starting index of range enntries allocated to the session */\n+\tuint16_t\t\t\t range_entries_start;\n+\t/* Number of range entries allocated */\n+\tuint16_t\t\t\t range_entries_stride;\n+\t/* Starting index of LAG table entries allocated to the session */\n+\tuint16_t\t\t\t lag_tbl_entries_start;\n+\t/* Number of LAG table entries allocated */\n+\tuint16_t\t\t\t lag_tbl_entries_stride;\n+} tf_session_hw_resc_free_input_t, *ptf_session_hw_resc_free_input_t;\n+BUILD_BUG_ON(sizeof(tf_session_hw_resc_free_input_t) <= TF_MAX_REQ_SIZE);\n+\n+/* Input params for session resource HW flush */\n+typedef struct tf_session_hw_resc_flush_input {\n+\t/* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */\n+\tuint32_t\t\t\t fw_session_id;\n+\t/* flags */\n+\tuint16_t\t\t\t flags;\n+\t/* When set to 0, indicates the flush apply to RX */\n+#define TF_SESSION_HW_RESC_FLUSH_INPUT_FLAGS_DIR_RX\t (0x0)\n+\t/* When set to 1, indicates the flush apply to TX */\n+#define TF_SESSION_HW_RESC_FLUSH_INPUT_FLAGS_DIR_TX\t (0x1)\n+\t/* Unused */\n+\tuint8_t\t\t\t unused[2];\n+\t/* Starting index of L2 CTX TCAM entries allocated to the session */\n+\tuint16_t\t\t\t l2_ctx_tcam_entries_start;\n+\t/* Number of L2 CTX TCAM entries allocated */\n+\tuint16_t\t\t\t l2_ctx_tcam_entries_stride;\n+\t/* Starting index of profile functions allocated to the session */\n+\tuint16_t\t\t\t prof_func_start;\n+\t/* Number of profile functions allocated */\n+\tuint16_t\t\t\t prof_func_stride;\n+\t/* Starting index of profile TCAM entries allocated to the session */\n+\tuint16_t\t\t\t prof_tcam_entries_start;\n+\t/* Number of profile TCAM entries allocated */\n+\tuint16_t\t\t\t prof_tcam_entries_stride;\n+\t/* Starting index of EM profile ids allocated to the session */\n+\tuint16_t\t\t\t em_prof_id_start;\n+\t/* Number of EM profile ids allocated */\n+\tuint16_t\t\t\t em_prof_id_stride;\n+\t/* Starting index of EM record entries allocated to the session */\n+\tuint16_t\t\t\t em_record_entries_start;\n+\t/* Number of EM record entries allocated */\n+\tuint16_t\t\t\t em_record_entries_stride;\n+\t/* Starting index of WC TCAM profiles ids allocated to the session */\n+\tuint16_t\t\t\t wc_tcam_prof_id_start;\n+\t/* Number of WC TCAM profile ids allocated */\n+\tuint16_t\t\t\t wc_tcam_prof_id_stride;\n+\t/* Starting index of WC TCAM entries allocated to the session */\n+\tuint16_t\t\t\t wc_tcam_entries_start;\n+\t/* Number of WC TCAM allocated */\n+\tuint16_t\t\t\t wc_tcam_entries_stride;\n+\t/* Starting index of meter profiles allocated to the session */\n+\tuint16_t\t\t\t meter_profiles_start;\n+\t/* Number of meter profiles allocated */\n+\tuint16_t\t\t\t meter_profiles_stride;\n+\t/* Starting index of meter instance allocated to the session */\n+\tuint16_t\t\t\t meter_inst_start;\n+\t/* Number of meter instance allocated */\n+\tuint16_t\t\t\t meter_inst_stride;\n+\t/* Starting index of mirrors allocated to the session */\n+\tuint16_t\t\t\t mirrors_start;\n+\t/* Number of mirrors allocated */\n+\tuint16_t\t\t\t mirrors_stride;\n+\t/* Starting index of UPAR allocated to the session */\n+\tuint16_t\t\t\t upar_start;\n+\t/* Number of UPAR allocated */\n+\tuint16_t\t\t\t upar_stride;\n+\t/* Starting index of SP TCAM entries allocated to the session */\n+\tuint16_t\t\t\t sp_tcam_entries_start;\n+\t/* Number of SP TCAM entries allocated */\n+\tuint16_t\t\t\t sp_tcam_entries_stride;\n+\t/* Starting index of L2 functions allocated to the session */\n+\tuint16_t\t\t\t l2_func_start;\n+\t/* Number of L2 functions allocated */\n+\tuint16_t\t\t\t l2_func_stride;\n+\t/* Starting index of flexible key templates allocated to the session */\n+\tuint16_t\t\t\t flex_key_templ_start;\n+\t/* Number of flexible key templates allocated */\n+\tuint16_t\t\t\t flex_key_templ_stride;\n+\t/* Starting index of table scopes allocated to the session */\n+\tuint16_t\t\t\t tbl_scope_start;\n+\t/* Number of table scopes allocated */\n+\tuint16_t\t\t\t tbl_scope_stride;\n+\t/* Starting index of epoch0 entries allocated to the session */\n+\tuint16_t\t\t\t epoch0_entries_start;\n+\t/* Number of epoch0 entries allocated */\n+\tuint16_t\t\t\t epoch0_entries_stride;\n+\t/* Starting index of epoch1 entries allocated to the session */\n+\tuint16_t\t\t\t epoch1_entries_start;\n+\t/* Number of epoch1 entries allocated */\n+\tuint16_t\t\t\t epoch1_entries_stride;\n+\t/* Starting index of metadata allocated to the session */\n+\tuint16_t\t\t\t metadata_start;\n+\t/* Number of metadata allocated */\n+\tuint16_t\t\t\t metadata_stride;\n+\t/* Starting index of CT states allocated to the session */\n+\tuint16_t\t\t\t ct_state_start;\n+\t/* Number of CT states allocated */\n+\tuint16_t\t\t\t ct_state_stride;\n+\t/* Starting index of range profiles allocated to the session */\n+\tuint16_t\t\t\t range_prof_start;\n+\t/* Number range profiles allocated */\n+\tuint16_t\t\t\t range_prof_stride;\n+\t/* Starting index of range enntries allocated to the session */\n+\tuint16_t\t\t\t range_entries_start;\n+\t/* Number of range entries allocated */\n+\tuint16_t\t\t\t range_entries_stride;\n+\t/* Starting index of LAG table entries allocated to the session */\n+\tuint16_t\t\t\t lag_tbl_entries_start;\n+\t/* Number of LAG table entries allocated */\n+\tuint16_t\t\t\t lag_tbl_entries_stride;\n+} tf_session_hw_resc_flush_input_t, *ptf_session_hw_resc_flush_input_t;\n+BUILD_BUG_ON(sizeof(tf_session_hw_resc_flush_input_t) <= TF_MAX_REQ_SIZE);\n+\n+/* Input params for session resource SRAM qcaps */\n+typedef struct tf_session_sram_resc_qcaps_input {\n+\t/* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */\n+\tuint32_t\t\t\t fw_session_id;\n+\t/* flags */\n+\tuint16_t\t\t\t flags;\n+\t/* When set to 0, indicates the query apply to RX */\n+#define TF_SESSION_SRAM_RESC_QCAPS_INPUT_FLAGS_DIR_RX\t (0x0)\n+\t/* When set to 1, indicates the query apply to TX */\n+#define TF_SESSION_SRAM_RESC_QCAPS_INPUT_FLAGS_DIR_TX\t (0x1)\n+} tf_session_sram_resc_qcaps_input_t, *ptf_session_sram_resc_qcaps_input_t;\n+BUILD_BUG_ON(sizeof(tf_session_sram_resc_qcaps_input_t) <= TF_MAX_REQ_SIZE);\n+\n+/* Output params for session resource SRAM qcaps */\n+typedef struct tf_session_sram_resc_qcaps_output {\n+\t/* Flags */\n+\tuint32_t\t\t\t flags;\n+\t/* When set to 0, indicates Static partitioning */\n+#define TF_SESSION_SRAM_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_STATIC\t (0x0)\n+\t/* When set to 1, indicates Strategy 1 */\n+#define TF_SESSION_SRAM_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_1\t (0x1)\n+\t/* When set to 1, indicates Strategy 2 */\n+#define TF_SESSION_SRAM_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_2\t (0x2)\n+\t/* When set to 1, indicates Strategy 3 */\n+#define TF_SESSION_SRAM_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_3\t (0x3)\n+\t/* Minimum guaranteed number of Full Action */\n+\tuint16_t\t\t\t full_action_min;\n+\t/* Maximum non-guaranteed number of Full Action */\n+\tuint16_t\t\t\t full_action_max;\n+\t/* Minimum guaranteed number of MCG */\n+\tuint16_t\t\t\t mcg_min;\n+\t/* Maximum non-guaranteed number of MCG */\n+\tuint16_t\t\t\t mcg_max;\n+\t/* Minimum guaranteed number of Encap 8B */\n+\tuint16_t\t\t\t encap_8b_min;\n+\t/* Maximum non-guaranteed number of Encap 8B */\n+\tuint16_t\t\t\t encap_8b_max;\n+\t/* Minimum guaranteed number of Encap 16B */\n+\tuint16_t\t\t\t encap_16b_min;\n+\t/* Maximum non-guaranteed number of Encap 16B */\n+\tuint16_t\t\t\t encap_16b_max;\n+\t/* Minimum guaranteed number of Encap 64B */\n+\tuint16_t\t\t\t encap_64b_min;\n+\t/* Maximum non-guaranteed number of Encap 64B */\n+\tuint16_t\t\t\t encap_64b_max;\n+\t/* Minimum guaranteed number of SP SMAC */\n+\tuint16_t\t\t\t sp_smac_min;\n+\t/* Maximum non-guaranteed number of SP SMAC */\n+\tuint16_t\t\t\t sp_smac_max;\n+\t/* Minimum guaranteed number of SP SMAC IPv4 */\n+\tuint16_t\t\t\t sp_smac_ipv4_min;\n+\t/* Maximum non-guaranteed number of SP SMAC IPv4 */\n+\tuint16_t\t\t\t sp_smac_ipv4_max;\n+\t/* Minimum guaranteed number of SP SMAC IPv6 */\n+\tuint16_t\t\t\t sp_smac_ipv6_min;\n+\t/* Maximum non-guaranteed number of SP SMAC IPv6 */\n+\tuint16_t\t\t\t sp_smac_ipv6_max;\n+\t/* Minimum guaranteed number of Counter 64B */\n+\tuint16_t\t\t\t counter_64b_min;\n+\t/* Maximum non-guaranteed number of Counter 64B */\n+\tuint16_t\t\t\t counter_64b_max;\n+\t/* Minimum guaranteed number of NAT SPORT */\n+\tuint16_t\t\t\t nat_sport_min;\n+\t/* Maximum non-guaranteed number of NAT SPORT */\n+\tuint16_t\t\t\t nat_sport_max;\n+\t/* Minimum guaranteed number of NAT DPORT */\n+\tuint16_t\t\t\t nat_dport_min;\n+\t/* Maximum non-guaranteed number of NAT DPORT */\n+\tuint16_t\t\t\t nat_dport_max;\n+\t/* Minimum guaranteed number of NAT S_IPV4 */\n+\tuint16_t\t\t\t nat_s_ipv4_min;\n+\t/* Maximum non-guaranteed number of NAT S_IPV4 */\n+\tuint16_t\t\t\t nat_s_ipv4_max;\n+\t/* Minimum guaranteed number of NAT D_IPV4 */\n+\tuint16_t\t\t\t nat_d_ipv4_min;\n+\t/* Maximum non-guaranteed number of NAT D_IPV4 */\n+\tuint16_t\t\t\t nat_d_ipv4_max;\n+} tf_session_sram_resc_qcaps_output_t, *ptf_session_sram_resc_qcaps_output_t;\n+BUILD_BUG_ON(sizeof(tf_session_sram_resc_qcaps_output_t) <= TF_MAX_RESP_SIZE);\n+\n+/* Input params for session resource SRAM alloc */\n+typedef struct tf_session_sram_resc_alloc_input {\n+\t/* FW Session Id */\n+\tuint32_t\t\t\t fw_session_id;\n+\t/* flags */\n+\tuint16_t\t\t\t flags;\n+\t/* When set to 0, indicates the query apply to RX */\n+#define TF_SESSION_SRAM_RESC_ALLOC_INPUT_FLAGS_DIR_RX\t (0x0)\n+\t/* When set to 1, indicates the query apply to TX */\n+#define TF_SESSION_SRAM_RESC_ALLOC_INPUT_FLAGS_DIR_TX\t (0x1)\n+\t/* Unused */\n+\tuint8_t\t\t\t unused[2];\n+\t/* Number of full action SRAM entries to be allocated */\n+\tuint16_t\t\t\t num_full_action;\n+\t/* Number of multicast groups to be allocated */\n+\tuint16_t\t\t\t num_mcg;\n+\t/* Number of Encap 8B entries to be allocated */\n+\tuint16_t\t\t\t num_encap_8b;\n+\t/* Number of Encap 16B entries to be allocated */\n+\tuint16_t\t\t\t num_encap_16b;\n+\t/* Number of Encap 64B entries to be allocated */\n+\tuint16_t\t\t\t num_encap_64b;\n+\t/* Number of SP SMAC entries to be allocated */\n+\tuint16_t\t\t\t num_sp_smac;\n+\t/* Number of SP SMAC IPv4 entries to be allocated */\n+\tuint16_t\t\t\t num_sp_smac_ipv4;\n+\t/* Number of SP SMAC IPv6 entries to be allocated */\n+\tuint16_t\t\t\t num_sp_smac_ipv6;\n+\t/* Number of Counter 64B entries to be allocated */\n+\tuint16_t\t\t\t num_counter_64b;\n+\t/* Number of NAT source ports to be allocated */\n+\tuint16_t\t\t\t num_nat_sport;\n+\t/* Number of NAT destination ports to be allocated */\n+\tuint16_t\t\t\t num_nat_dport;\n+\t/* Number of NAT source iPV4 addresses to be allocated */\n+\tuint16_t\t\t\t num_nat_s_ipv4;\n+\t/* Number of NAT destination IPV4 addresses to be allocated */\n+\tuint16_t\t\t\t num_nat_d_ipv4;\n+} tf_session_sram_resc_alloc_input_t, *ptf_session_sram_resc_alloc_input_t;\n+BUILD_BUG_ON(sizeof(tf_session_sram_resc_alloc_input_t) <= TF_MAX_REQ_SIZE);\n+\n+/* Output params for session resource SRAM alloc */\n+typedef struct tf_session_sram_resc_alloc_output {\n+\t/* Unused */\n+\tuint8_t\t\t\t unused[2];\n+\t/* Starting index of full action SRAM entries allocated to the session */\n+\tuint16_t\t\t\t full_action_start;\n+\t/* Number of full action SRAM entries allocated */\n+\tuint16_t\t\t\t full_action_stride;\n+\t/* Starting index of multicast groups allocated to this session */\n+\tuint16_t\t\t\t mcg_start;\n+\t/* Number of multicast groups allocated */\n+\tuint16_t\t\t\t mcg_stride;\n+\t/* Starting index of encap 8B entries allocated to the session */\n+\tuint16_t\t\t\t encap_8b_start;\n+\t/* Number of encap 8B entries allocated */\n+\tuint16_t\t\t\t encap_8b_stride;\n+\t/* Starting index of encap 16B entries allocated to the session */\n+\tuint16_t\t\t\t encap_16b_start;\n+\t/* Number of encap 16B entries allocated */\n+\tuint16_t\t\t\t encap_16b_stride;\n+\t/* Starting index of encap 64B entries allocated to the session */\n+\tuint16_t\t\t\t encap_64b_start;\n+\t/* Number of encap 64B entries allocated */\n+\tuint16_t\t\t\t encap_64b_stride;\n+\t/* Starting index of SP SMAC entries allocated to the session */\n+\tuint16_t\t\t\t sp_smac_start;\n+\t/* Number of SP SMAC entries allocated */\n+\tuint16_t\t\t\t sp_smac_stride;\n+\t/* Starting index of SP SMAC IPv4 entries allocated to the session */\n+\tuint16_t\t\t\t sp_smac_ipv4_start;\n+\t/* Number of SP SMAC IPv4 entries allocated */\n+\tuint16_t\t\t\t sp_smac_ipv4_stride;\n+\t/* Starting index of SP SMAC IPv6 entries allocated to the session */\n+\tuint16_t\t\t\t sp_smac_ipv6_start;\n+\t/* Number of SP SMAC IPv6 entries allocated */\n+\tuint16_t\t\t\t sp_smac_ipv6_stride;\n+\t/* Starting index of Counter 64B entries allocated to the session */\n+\tuint16_t\t\t\t counter_64b_start;\n+\t/* Number of Counter 64B entries allocated */\n+\tuint16_t\t\t\t counter_64b_stride;\n+\t/* Starting index of NAT source ports allocated to the session */\n+\tuint16_t\t\t\t nat_sport_start;\n+\t/* Number of NAT source ports allocated */\n+\tuint16_t\t\t\t nat_sport_stride;\n+\t/* Starting index of NAT destination ports allocated to the session */\n+\tuint16_t\t\t\t nat_dport_start;\n+\t/* Number of NAT destination ports allocated */\n+\tuint16_t\t\t\t nat_dport_stride;\n+\t/* Starting index of NAT source IPV4 addresses allocated to the session */\n+\tuint16_t\t\t\t nat_s_ipv4_start;\n+\t/* Number of NAT source IPV4 addresses allocated */\n+\tuint16_t\t\t\t nat_s_ipv4_stride;\n+\t/*\n+\t * Starting index of NAT destination IPV4 addresses allocated to the\n+\t * session\n+\t */\n+\tuint16_t\t\t\t nat_d_ipv4_start;\n+\t/* Number of NAT destination IPV4 addresses allocated */\n+\tuint16_t\t\t\t nat_d_ipv4_stride;\n+} tf_session_sram_resc_alloc_output_t, *ptf_session_sram_resc_alloc_output_t;\n+BUILD_BUG_ON(sizeof(tf_session_sram_resc_alloc_output_t) <= TF_MAX_RESP_SIZE);\n+\n+/* Input params for session resource SRAM free */\n+typedef struct tf_session_sram_resc_free_input {\n+\t/* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */\n+\tuint32_t\t\t\t fw_session_id;\n+\t/* flags */\n+\tuint16_t\t\t\t flags;\n+\t/* When set to 0, indicates the query apply to RX */\n+#define TF_SESSION_SRAM_RESC_FREE_INPUT_FLAGS_DIR_RX\t (0x0)\n+\t/* When set to 1, indicates the query apply to TX */\n+#define TF_SESSION_SRAM_RESC_FREE_INPUT_FLAGS_DIR_TX\t (0x1)\n+\t/* Starting index of full action SRAM entries allocated to the session */\n+\tuint16_t\t\t\t full_action_start;\n+\t/* Number of full action SRAM entries allocated */\n+\tuint16_t\t\t\t full_action_stride;\n+\t/* Starting index of multicast groups allocated to this session */\n+\tuint16_t\t\t\t mcg_start;\n+\t/* Number of multicast groups allocated */\n+\tuint16_t\t\t\t mcg_stride;\n+\t/* Starting index of encap 8B entries allocated to the session */\n+\tuint16_t\t\t\t encap_8b_start;\n+\t/* Number of encap 8B entries allocated */\n+\tuint16_t\t\t\t encap_8b_stride;\n+\t/* Starting index of encap 16B entries allocated to the session */\n+\tuint16_t\t\t\t encap_16b_start;\n+\t/* Number of encap 16B entries allocated */\n+\tuint16_t\t\t\t encap_16b_stride;\n+\t/* Starting index of encap 64B entries allocated to the session */\n+\tuint16_t\t\t\t encap_64b_start;\n+\t/* Number of encap 64B entries allocated */\n+\tuint16_t\t\t\t encap_64b_stride;\n+\t/* Starting index of SP SMAC entries allocated to the session */\n+\tuint16_t\t\t\t sp_smac_start;\n+\t/* Number of SP SMAC entries allocated */\n+\tuint16_t\t\t\t sp_smac_stride;\n+\t/* Starting index of SP SMAC IPv4 entries allocated to the session */\n+\tuint16_t\t\t\t sp_smac_ipv4_start;\n+\t/* Number of SP SMAC IPv4 entries allocated */\n+\tuint16_t\t\t\t sp_smac_ipv4_stride;\n+\t/* Starting index of SP SMAC IPv6 entries allocated to the session */\n+\tuint16_t\t\t\t sp_smac_ipv6_start;\n+\t/* Number of SP SMAC IPv6 entries allocated */\n+\tuint16_t\t\t\t sp_smac_ipv6_stride;\n+\t/* Starting index of Counter 64B entries allocated to the session */\n+\tuint16_t\t\t\t counter_64b_start;\n+\t/* Number of Counter 64B entries allocated */\n+\tuint16_t\t\t\t counter_64b_stride;\n+\t/* Starting index of NAT source ports allocated to the session */\n+\tuint16_t\t\t\t nat_sport_start;\n+\t/* Number of NAT source ports allocated */\n+\tuint16_t\t\t\t nat_sport_stride;\n+\t/* Starting index of NAT destination ports allocated to the session */\n+\tuint16_t\t\t\t nat_dport_start;\n+\t/* Number of NAT destination ports allocated */\n+\tuint16_t\t\t\t nat_dport_stride;\n+\t/* Starting index of NAT source IPV4 addresses allocated to the session */\n+\tuint16_t\t\t\t nat_s_ipv4_start;\n+\t/* Number of NAT source IPV4 addresses allocated */\n+\tuint16_t\t\t\t nat_s_ipv4_stride;\n+\t/*\n+\t * Starting index of NAT destination IPV4 addresses allocated to the\n+\t * session\n+\t */\n+\tuint16_t\t\t\t nat_d_ipv4_start;\n+\t/* Number of NAT destination IPV4 addresses allocated */\n+\tuint16_t\t\t\t nat_d_ipv4_stride;\n+} tf_session_sram_resc_free_input_t, *ptf_session_sram_resc_free_input_t;\n+BUILD_BUG_ON(sizeof(tf_session_sram_resc_free_input_t) <= TF_MAX_REQ_SIZE);\n+\n+/* Input params for session resource SRAM flush */\n+typedef struct tf_session_sram_resc_flush_input {\n+\t/* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */\n+\tuint32_t\t\t\t fw_session_id;\n+\t/* flags */\n+\tuint16_t\t\t\t flags;\n+\t/* When set to 0, indicates the flush apply to RX */\n+#define TF_SESSION_SRAM_RESC_FLUSH_INPUT_FLAGS_DIR_RX\t (0x0)\n+\t/* When set to 1, indicates the flush apply to TX */\n+#define TF_SESSION_SRAM_RESC_FLUSH_INPUT_FLAGS_DIR_TX\t (0x1)\n+\t/* Starting index of full action SRAM entries allocated to the session */\n+\tuint16_t\t\t\t full_action_start;\n+\t/* Number of full action SRAM entries allocated */\n+\tuint16_t\t\t\t full_action_stride;\n+\t/* Starting index of multicast groups allocated to this session */\n+\tuint16_t\t\t\t mcg_start;\n+\t/* Number of multicast groups allocated */\n+\tuint16_t\t\t\t mcg_stride;\n+\t/* Starting index of encap 8B entries allocated to the session */\n+\tuint16_t\t\t\t encap_8b_start;\n+\t/* Number of encap 8B entries allocated */\n+\tuint16_t\t\t\t encap_8b_stride;\n+\t/* Starting index of encap 16B entries allocated to the session */\n+\tuint16_t\t\t\t encap_16b_start;\n+\t/* Number of encap 16B entries allocated */\n+\tuint16_t\t\t\t encap_16b_stride;\n+\t/* Starting index of encap 64B entries allocated to the session */\n+\tuint16_t\t\t\t encap_64b_start;\n+\t/* Number of encap 64B entries allocated */\n+\tuint16_t\t\t\t encap_64b_stride;\n+\t/* Starting index of SP SMAC entries allocated to the session */\n+\tuint16_t\t\t\t sp_smac_start;\n+\t/* Number of SP SMAC entries allocated */\n+\tuint16_t\t\t\t sp_smac_stride;\n+\t/* Starting index of SP SMAC IPv4 entries allocated to the session */\n+\tuint16_t\t\t\t sp_smac_ipv4_start;\n+\t/* Number of SP SMAC IPv4 entries allocated */\n+\tuint16_t\t\t\t sp_smac_ipv4_stride;\n+\t/* Starting index of SP SMAC IPv6 entries allocated to the session */\n+\tuint16_t\t\t\t sp_smac_ipv6_start;\n+\t/* Number of SP SMAC IPv6 entries allocated */\n+\tuint16_t\t\t\t sp_smac_ipv6_stride;\n+\t/* Starting index of Counter 64B entries allocated to the session */\n+\tuint16_t\t\t\t counter_64b_start;\n+\t/* Number of Counter 64B entries allocated */\n+\tuint16_t\t\t\t counter_64b_stride;\n+\t/* Starting index of NAT source ports allocated to the session */\n+\tuint16_t\t\t\t nat_sport_start;\n+\t/* Number of NAT source ports allocated */\n+\tuint16_t\t\t\t nat_sport_stride;\n+\t/* Starting index of NAT destination ports allocated to the session */\n+\tuint16_t\t\t\t nat_dport_start;\n+\t/* Number of NAT destination ports allocated */\n+\tuint16_t\t\t\t nat_dport_stride;\n+\t/* Starting index of NAT source IPV4 addresses allocated to the session */\n+\tuint16_t\t\t\t nat_s_ipv4_start;\n+\t/* Number of NAT source IPV4 addresses allocated */\n+\tuint16_t\t\t\t nat_s_ipv4_stride;\n+\t/*\n+\t * Starting index of NAT destination IPV4 addresses allocated to the\n+\t * session\n+\t */\n+\tuint16_t\t\t\t nat_d_ipv4_start;\n+\t/* Number of NAT destination IPV4 addresses allocated */\n+\tuint16_t\t\t\t nat_d_ipv4_stride;\n+} tf_session_sram_resc_flush_input_t, *ptf_session_sram_resc_flush_input_t;\n+BUILD_BUG_ON(sizeof(tf_session_sram_resc_flush_input_t) <= TF_MAX_REQ_SIZE);\n+\n+/* Input params for table type get */\n+typedef struct tf_tbl_type_get_input {\n+\t/* Session Id */\n+\tuint32_t\t\t\t fw_session_id;\n+\t/* flags */\n+\tuint16_t\t\t\t flags;\n+\t/* When set to 0, indicates the get apply to RX */\n+#define TF_TBL_TYPE_GET_INPUT_FLAGS_DIR_RX\t\t\t(0x0)\n+\t/* When set to 1, indicates the get apply to TX */\n+#define TF_TBL_TYPE_GET_INPUT_FLAGS_DIR_TX\t\t\t(0x1)\n+\t/* Type of the object to set */\n+\tuint32_t\t\t\t type;\n+\t/* Index to get */\n+\tuint32_t\t\t\t index;\n+} tf_tbl_type_get_input_t, *ptf_tbl_type_get_input_t;\n+BUILD_BUG_ON(sizeof(tf_tbl_type_get_input_t) <= TF_MAX_REQ_SIZE);\n+\n+/* Output params for table type get */\n+typedef struct tf_tbl_type_get_output {\n+\t/* Size of the data read in bytes */\n+\tuint16_t\t\t\t size;\n+\t/* Data read */\n+\tuint8_t\t\t\t data[TF_BULK_RECV];\n+} tf_tbl_type_get_output_t, *ptf_tbl_type_get_output_t;\n+BUILD_BUG_ON(sizeof(tf_tbl_type_get_output_t) <= TF_MAX_RESP_SIZE);\n+\n+/* Input params for EM internal rule insert */\n+typedef struct tf_em_internal_insert_input {\n+\t/* Firmware Session Id */\n+\tuint32_t\t\t\t fw_session_id;\n+\t/* flags */\n+\tuint16_t\t\t\t flags;\n+\t/* When set to 0, indicates the get apply to RX */\n+#define TF_EM_INTERNAL_INSERT_INPUT_FLAGS_DIR_RX\t (0x0)\n+\t/* When set to 1, indicates the get apply to TX */\n+#define TF_EM_INTERNAL_INSERT_INPUT_FLAGS_DIR_TX\t (0x1)\n+\t/* strength */\n+\tuint16_t\t\t\t strength;\n+\t/* index to action */\n+\tuint32_t\t\t\t action_ptr;\n+\t/* index of em record */\n+\tuint32_t\t\t\t em_record_idx;\n+\t/* EM Key value */\n+\tuint64_t\t\t\t em_key[8];\n+\t/* number of bits in em_key */\n+\tuint16_t\t\t\t em_key_bitlen;\n+} tf_em_internal_insert_input_t, *ptf_em_internal_insert_input_t;\n+BUILD_BUG_ON(sizeof(tf_em_internal_insert_input_t) <= TF_MAX_REQ_SIZE);\n+\n+/* Output params for EM internal rule insert */\n+typedef struct tf_em_internal_insert_output {\n+\t/* EM record pointer index */\n+\tuint16_t\t\t\t rptr_index;\n+\t/* EM record offset 0~3 */\n+\tuint8_t\t\t\t rptr_entry;\n+} tf_em_internal_insert_output_t, *ptf_em_internal_insert_output_t;\n+BUILD_BUG_ON(sizeof(tf_em_internal_insert_output_t) <= TF_MAX_RESP_SIZE);\n+\n+/* Input params for EM INTERNAL rule delete */\n+typedef struct tf_em_internal_delete_input {\n+\t/* Session Id */\n+\tuint32_t\t\t\t tf_session_id;\n+\t/* flags */\n+\tuint16_t\t\t\t flags;\n+\t/* When set to 0, indicates the get apply to RX */\n+#define TF_EM_INTERNAL_DELETE_INPUT_FLAGS_DIR_RX\t (0x0)\n+\t/* When set to 1, indicates the get apply to TX */\n+#define TF_EM_INTERNAL_DELETE_INPUT_FLAGS_DIR_TX\t (0x1)\n+\t/* EM internal flow hanndle */\n+\tuint64_t\t\t\t flow_handle;\n+\t/* EM Key value */\n+\tuint64_t\t\t\t em_key[8];\n+\t/* number of bits in em_key */\n+\tuint16_t\t\t\t em_key_bitlen;\n+} tf_em_internal_delete_input_t, *ptf_em_internal_delete_input_t;\n+BUILD_BUG_ON(sizeof(tf_em_internal_delete_input_t) <= TF_MAX_REQ_SIZE);\n+\n+#endif /* _HWRM_TF_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c\nnew file mode 100644\nindex 0000000..6bafae5\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_core/tf_core.c\n@@ -0,0 +1,145 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019-2020 Broadcom\n+ * All rights reserved.\n+ */\n+\n+#include <stdio.h>\n+\n+#include \"tf_core.h\"\n+#include \"tf_session.h\"\n+#include \"tf_msg.h\"\n+#include \"tfp.h\"\n+#include \"bnxt.h\"\n+\n+int\n+tf_open_session(struct tf *tfp,\n+\t\tstruct tf_open_session_parms *parms)\n+{\n+\tint rc;\n+\tstruct tf_session *session;\n+\tstruct tfp_calloc_parms alloc_parms;\n+\tunsigned int domain, bus, slot, device;\n+\tuint8_t fw_session_id;\n+\n+\tif (tfp == NULL || parms == NULL)\n+\t\treturn -EINVAL;\n+\n+\t/* Filter out any non-supported device types on the Core\n+\t * side. It is assumed that the Firmware will be supported if\n+\t * firmware open session succeeds.\n+\t */\n+\tif (parms->device_type != TF_DEVICE_TYPE_WH)\n+\t\treturn -ENOTSUP;\n+\n+\t/* Build the beginning of session_id */\n+\trc = sscanf(parms->ctrl_chan_name,\n+\t\t \"%x:%x:%x.%d\",\n+\t\t &domain,\n+\t\t &bus,\n+\t\t &slot,\n+\t\t &device);\n+\tif (rc != 4) {\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t \"Failed to scan device ctrl_chan_name\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* open FW session and get a new session_id */\n+\trc = tf_msg_session_open(tfp,\n+\t\t\t\t parms->ctrl_chan_name,\n+\t\t\t\t &fw_session_id);\n+\tif (rc) {\n+\t\t/* Log error */\n+\t\tif (rc == -EEXIST)\n+\t\t\tPMD_DRV_LOG(ERR,\n+\t\t\t\t \"Session is already open, rc:%d\\n\",\n+\t\t\t\t rc);\n+\t\telse\n+\t\t\tPMD_DRV_LOG(ERR,\n+\t\t\t\t \"Open message send failed, rc:%d\\n\",\n+\t\t\t\t rc);\n+\n+\t\tparms->session_id.id = TF_FW_SESSION_ID_INVALID;\n+\t\treturn rc;\n+\t}\n+\n+\t/* Allocate session */\n+\talloc_parms.nitems = 1;\n+\talloc_parms.size = sizeof(struct tf_session_info);\n+\talloc_parms.alignment = 0;\n+\trc = tfp_calloc(&alloc_parms);\n+\tif (rc) {\n+\t\t/* Log error */\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t \"Failed to allocate session info, rc:%d\\n\",\n+\t\t\t rc);\n+\t\tgoto cleanup;\n+\t}\n+\n+\ttfp->session = (struct tf_session_info *)alloc_parms.mem_va;\n+\n+\t/* Allocate core data for the session */\n+\talloc_parms.nitems = 1;\n+\talloc_parms.size = sizeof(struct tf_session);\n+\talloc_parms.alignment = 0;\n+\trc = tfp_calloc(&alloc_parms);\n+\tif (rc) {\n+\t\t/* Log error */\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t \"Failed to allocate session data, rc:%d\\n\",\n+\t\t\t rc);\n+\t\tgoto cleanup;\n+\t}\n+\n+\ttfp->session->core_data = alloc_parms.mem_va;\n+\n+\tsession = (struct tf_session *)tfp->session->core_data;\n+\ttfp_memcpy(session->ctrl_chan_name,\n+\t\t parms->ctrl_chan_name,\n+\t\t TF_SESSION_NAME_MAX);\n+\n+\t/* Initialize Session */\n+\tsession->device_type = parms->device_type;\n+\n+\t/* Construct the Session ID */\n+\tsession->session_id.internal.domain = domain;\n+\tsession->session_id.internal.bus = bus;\n+\tsession->session_id.internal.device = device;\n+\tsession->session_id.internal.fw_session_id = fw_session_id;\n+\n+\trc = tf_msg_session_qcfg(tfp);\n+\tif (rc) {\n+\t\t/* Log error */\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t \"Query config message send failed, rc:%d\\n\",\n+\t\t\t rc);\n+\t\tgoto cleanup_close;\n+\t}\n+\n+\tsession->ref_count++;\n+\n+\t/* Return session ID */\n+\tparms->session_id = session->session_id;\n+\n+\tPMD_DRV_LOG(INFO,\n+\t\t \"Session created, session_id:%d\\n\",\n+\t\t parms->session_id.id);\n+\n+\tPMD_DRV_LOG(INFO,\n+\t\t \"domain:%d, bus:%d, device:%d, fw_session_id:%d\\n\",\n+\t\t parms->session_id.internal.domain,\n+\t\t parms->session_id.internal.bus,\n+\t\t parms->session_id.internal.device,\n+\t\t parms->session_id.internal.fw_session_id);\n+\n+\treturn 0;\n+\n+ cleanup:\n+\ttfp_free(tfp->session->core_data);\n+\ttfp_free(tfp->session);\n+\ttfp->session = NULL;\n+\treturn rc;\n+\n+ cleanup_close:\n+\treturn -EINVAL;\n+}\ndiff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h\nnew file mode 100644\nindex 0000000..69433ac\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_core/tf_core.h\n@@ -0,0 +1,347 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019-2020 Broadcom\n+ * All rights reserved.\n+ */\n+\n+#ifndef _TF_CORE_H_\n+#define _TF_CORE_H_\n+\n+#include <stdint.h>\n+#include <stdlib.h>\n+#include <stdbool.h>\n+#include <stdio.h>\n+\n+#include \"tf_project.h\"\n+\n+/**\n+ * @file\n+ *\n+ * Truflow Core API Header File\n+ */\n+\n+/********** BEGIN Truflow Core DEFINITIONS **********/\n+\n+/**\n+ * direction\n+ */\n+enum tf_dir {\n+\tTF_DIR_RX, /**< Receive */\n+\tTF_DIR_TX, /**< Transmit */\n+\tTF_DIR_MAX\n+};\n+\n+/********** BEGIN API FUNCTION PROTOTYPES/PARAMETERS **********/\n+\n+/**\n+ * @page general General\n+ *\n+ * @ref tf_open_session\n+ *\n+ * @ref tf_attach_session\n+ *\n+ * @ref tf_close_session\n+ */\n+\n+\n+/** Session Version defines\n+ *\n+ * The version controls the format of the tf_session and\n+ * tf_session_info structure. This is to assure upgrade between\n+ * versions can be supported.\n+ */\n+#define TF_SESSION_VER_MAJOR 1 /**< Major Version */\n+#define TF_SESSION_VER_MINOR 0 /**< Minor Version */\n+#define TF_SESSION_VER_UPDATE 0 /**< Update Version */\n+\n+/** Session Name\n+ *\n+ * Name of the TruFlow control channel interface. Expects\n+ * format to be RTE Name specific, i.e. rte_eth_dev_get_name_by_port()\n+ */\n+#define TF_SESSION_NAME_MAX 64\n+\n+#define TF_FW_SESSION_ID_INVALID 0xFF /**< Invalid FW Sesssion ID define */\n+\n+/** Session Identifier\n+ *\n+ * Unique session identifier which includes PCIe bus info to\n+ * distinguish the PF and session info to identify the associated\n+ * TruFlow session. Session ID is constructed from the passed in\n+ * ctrl_chan_name in tf_open_session() together with an allocated\n+ * fw_session_id. Done by TruFlow on tf_open_session().\n+ */\n+union tf_session_id {\n+\tuint32_t id;\n+\tstruct {\n+\t\tuint8_t domain;\n+\t\tuint8_t bus;\n+\t\tuint8_t device;\n+\t\tuint8_t fw_session_id;\n+\t} internal;\n+};\n+\n+/** Session Version\n+ *\n+ * The version controls the format of the tf_session and\n+ * tf_session_info structure. This is to assure upgrade between\n+ * versions can be supported.\n+ *\n+ * Please see the TF_VER_MAJOR/MINOR and UPDATE defines.\n+ */\n+struct tf_session_version {\n+\tuint8_t major;\n+\tuint8_t minor;\n+\tuint8_t update;\n+};\n+\n+/** Session supported device types\n+ *\n+ */\n+enum tf_device_type {\n+\tTF_DEVICE_TYPE_WH = 0, /**< Whitney+ */\n+\tTF_DEVICE_TYPE_BRD2, /**< TBD */\n+\tTF_DEVICE_TYPE_BRD3, /**< TBD */\n+\tTF_DEVICE_TYPE_BRD4, /**< TBD */\n+\tTF_DEVICE_TYPE_MAX /**< Maximum */\n+};\n+\n+/** TruFlow Session Information\n+ *\n+ * Structure defining a TruFlow Session, also known as a Management\n+ * session. This structure is initialized at time of\n+ * tf_open_session(). It is passed to all of the TruFlow APIs as way\n+ * to prescribe and isolate resources between different TruFlow ULP\n+ * Applications.\n+ */\n+struct tf_session_info {\n+\t/**\n+\t * TrueFlow Version. Used to control the structure layout when\n+\t * sharing sessions. No guarantee that a secondary process\n+\t * would come from the same version of an executable.\n+\t * TruFlow initializes this variable on tf_open_session().\n+\t *\n+\t * Owner: TruFlow\n+\t * Access: TruFlow\n+\t */\n+\tstruct tf_session_version ver;\n+\t/**\n+\t * will be STAILQ_ENTRY(tf_session_info) next\n+\t *\n+\t * Owner: ULP\n+\t * Access: ULP\n+\t */\n+\tvoid *next;\n+\t/**\n+\t * Session ID is a unique identifier for the session. TruFlow\n+\t * initializes this variable during tf_open_session()\n+\t * processing.\n+\t *\n+\t * Owner: TruFlow\n+\t * Access: Truflow & ULP\n+\t */\n+\tunion tf_session_id session_id;\n+\t/**\n+\t * Protects access to core_data. Lock is initialized and owned\n+\t * by ULP. TruFlow can access the core_data without checking\n+\t * the lock.\n+\t *\n+\t * Owner: ULP\n+\t * Access: ULP\n+\t */\n+\tuint8_t spin_lock;\n+\t/**\n+\t * The core_data holds the TruFlow tf_session data\n+\t * structure. This memory is allocated and owned by TruFlow on\n+\t * tf_open_session().\n+\t *\n+\t * TruFlow uses this memory for session management control\n+\t * until the session is closed by ULP. Access control is done\n+\t * by the spin_lock which ULP controls ahead of TruFlow API\n+\t * calls.\n+\t *\n+\t * Please see tf_open_session_parms for specification details\n+\t * on this variable.\n+\t *\n+\t * Owner: TruFlow\n+\t * Access: TruFlow\n+\t */\n+\tvoid *core_data;\n+\t/**\n+\t * The core_data_sz_bytes specifies the size of core_data in\n+\t * bytes.\n+\t *\n+\t * The size is set by TruFlow on tf_open_session().\n+\t *\n+\t * Please see tf_open_session_parms for specification details\n+\t * on this variable.\n+\t *\n+\t * Owner: TruFlow\n+\t * Access: TruFlow\n+\t */\n+\tuint32_t core_data_sz_bytes;\n+};\n+\n+/** TruFlow handle\n+ *\n+ * Contains a pointer to the session info. Allocated by ULP and passed\n+ * to TruFlow using tf_open_session(). TruFlow will populate the\n+ * session info at that time. Additional 'opens' can be done using\n+ * same session_info by using tf_attach_session().\n+ *\n+ * It is expected that ULP allocates this memory as shared memory.\n+ *\n+ * NOTE: This struct must be within the BNXT PMD struct bnxt\n+ * (bp). This allows use of container_of() to get access to the PMD.\n+ */\n+struct tf {\n+\tstruct tf_session_info *session;\n+};\n+\n+\n+/**\n+ * tf_open_session parameters definition.\n+ */\n+struct tf_open_session_parms {\n+\t/** [in] ctrl_chan_name\n+\t *\n+\t * String containing name of control channel interface to be\n+\t * used for this session to communicate with firmware.\n+\t *\n+\t * The ctrl_chan_name can be looked up by using\n+\t * rte_eth_dev_get_name_by_port() within the ULP.\n+\t *\n+\t * ctrl_chan_name will be used as part of a name for any\n+\t * shared memory allocation.\n+\t */\n+\tchar ctrl_chan_name[TF_SESSION_NAME_MAX];\n+\t/** [in] shadow_copy\n+\t *\n+\t * Boolean controlling the use and availability of shadow\n+\t * copy. Shadow copy will allow the TruFlow to keep track of\n+\t * resource content on the firmware side without having to\n+\t * query firmware. Additional private session core_data will\n+\t * be allocated if this boolean is set to 'true', default\n+\t * 'false'.\n+\t *\n+\t * Size of memory depends on the NVM Resource settings for the\n+\t * control channel.\n+\t */\n+\tbool shadow_copy;\n+\t/** [in/out] session_id\n+\t *\n+\t * Session_id is unique per session.\n+\t *\n+\t * Session_id is composed of domain, bus, device and\n+\t * fw_session_id. The construction is done by parsing the\n+\t * ctrl_chan_name together with allocation of a fw_session_id.\n+\t *\n+\t * The session_id allows a session to be shared between devices.\n+\t */\n+\tunion tf_session_id session_id;\n+\t/** [in] device type\n+\t *\n+\t * Device type is passed, one of Wh+, Brd2, Brd3, Brd4\n+\t */\n+\tenum tf_device_type device_type;\n+};\n+\n+/**\n+ * Opens a new TruFlow management session.\n+ *\n+ * TruFlow will allocate session specific memory, shared memory, to\n+ * hold its session data. This data is private to TruFlow.\n+ *\n+ * Multiple PFs can share the same session. An association, refcount,\n+ * between session and PFs is maintained within TruFlow. Thus, a PF\n+ * can attach to an existing session, see tf_attach_session().\n+ *\n+ * No other TruFlow APIs will succeed unless this API is first called and\n+ * succeeds.\n+ *\n+ * tf_open_session() returns a session id that can be used on attach.\n+ *\n+ * [in] tfp\n+ * Pointer to TF handle\n+ * [in] parms\n+ * Pointer to open parameters\n+ *\n+ * Returns\n+ * - (0) if successful.\n+ * - (-EINVAL) on failure.\n+ */\n+int tf_open_session(struct tf *tfp,\n+\t\t struct tf_open_session_parms *parms);\n+\n+struct tf_attach_session_parms {\n+\t/** [in] ctrl_chan_name\n+\t *\n+\t * String containing name of control channel interface to be\n+\t * used for this session to communicate with firmware.\n+\t *\n+\t * The ctrl_chan_name can be looked up by using\n+\t * rte_eth_dev_get_name_by_port() within the ULP.\n+\t *\n+\t * ctrl_chan_name will be used as part of a name for any\n+\t * shared memory allocation.\n+\t */\n+\tchar ctrl_chan_name[TF_SESSION_NAME_MAX];\n+\n+\t/** [in] attach_chan_name\n+\t *\n+\t * String containing name of attach channel interface to be\n+\t * used for this session.\n+\t *\n+\t * The attach_chan_name must be given to a 2nd process after\n+\t * the primary process has been created. This is the\n+\t * ctrl_chan_name of the primary process and is used to find\n+\t * the shared memory for the session that the attach is going\n+\t * to use.\n+\t */\n+\tchar attach_chan_name[TF_SESSION_NAME_MAX];\n+\n+\t/** [in] session_id\n+\t *\n+\t * Session_id is unique per session. For Attach the session_id\n+\t * should be the session_id that was returned on the first\n+\t * open.\n+\t *\n+\t * Session_id is composed of domain, bus, device and\n+\t * fw_session_id. The construction is done by parsing the\n+\t * ctrl_chan_name together with allocation of a fw_session_id\n+\t * during tf_open_session().\n+\t *\n+\t * A reference count will be incremented on attach. A session\n+\t * is first fully closed when reference count is zero by\n+\t * calling tf_close_session().\n+\t */\n+\tunion tf_session_id session_id;\n+};\n+\n+/**\n+ * Attaches to an existing session. Used when more than one PF wants\n+ * to share a single session. In that case all TruFlow management\n+ * traffic will be sent to the TruFlow firmware using the 'PF' that\n+ * did the attach not the session ctrl channel.\n+ *\n+ * Attach will increment a ref count as to manage the shared session data.\n+ *\n+ * [in] tfp, pointer to TF handle\n+ * [in] parms, pointer to attach parameters\n+ *\n+ * Returns\n+ * - (0) if successful.\n+ * - (-EINVAL) on failure.\n+ */\n+int tf_attach_session(struct tf *tfp,\n+\t\t struct tf_attach_session_parms *parms);\n+\n+/**\n+ * Closes an existing session. Cleans up all hardware and firmware\n+ * state associated with the TruFlow application session when the last\n+ * PF associated with the session results in refcount to be zero.\n+ *\n+ * Returns success or failure code.\n+ */\n+int tf_close_session(struct tf *tfp);\n+\n+#endif /* _TF_CORE_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c\nnew file mode 100644\nindex 0000000..2b68681\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_core/tf_msg.c\n@@ -0,0 +1,79 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019-2020 Broadcom\n+ * All rights reserved.\n+ */\n+\n+#include <inttypes.h>\n+#include <stdbool.h>\n+#include <stdlib.h>\n+\n+#include \"bnxt.h\"\n+#include \"tf_core.h\"\n+#include \"tf_session.h\"\n+#include \"tfp.h\"\n+\n+#include \"tf_msg_common.h\"\n+#include \"tf_msg.h\"\n+#include \"hsi_struct_def_dpdk.h\"\n+#include \"hwrm_tf.h\"\n+\n+/**\n+ * Sends session open request to TF Firmware\n+ */\n+int\n+tf_msg_session_open(struct tf *tfp,\n+\t\t char *ctrl_chan_name,\n+\t\t uint8_t *fw_session_id)\n+{\n+\tint rc;\n+\tstruct hwrm_tf_session_open_input req = { 0 };\n+\tstruct hwrm_tf_session_open_output resp = { 0 };\n+\tstruct tfp_send_msg_parms parms = { 0 };\n+\n+\t/* Populate the request */\n+\tmemcpy(&req.session_name, ctrl_chan_name, TF_SESSION_NAME_MAX);\n+\n+\tparms.tf_type = HWRM_TF_SESSION_OPEN;\n+\tparms.req_data = (uint32_t *)&req;\n+\tparms.req_size = sizeof(req);\n+\tparms.resp_data = (uint32_t *)&resp;\n+\tparms.resp_size = sizeof(resp);\n+\tparms.mailbox = TF_KONG_MB;\n+\n+\trc = tfp_send_msg_direct(tfp,\n+\t\t\t\t &parms);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t*fw_session_id = resp.fw_session_id;\n+\n+\treturn rc;\n+}\n+\n+/**\n+ * Sends session query config request to TF Firmware\n+ */\n+int\n+tf_msg_session_qcfg(struct tf *tfp)\n+{\n+\tint rc;\n+\tstruct hwrm_tf_session_qcfg_input req = { 0 };\n+\tstruct hwrm_tf_session_qcfg_output resp = { 0 };\n+\tstruct tf_session *tfs = (struct tf_session *)(tfp->session->core_data);\n+\tstruct tfp_send_msg_parms parms = { 0 };\n+\n+\t/* Populate the request */\n+\treq.fw_session_id =\n+\t\ttfp_cpu_to_le_32(tfs->session_id.internal.fw_session_id);\n+\n+\tparms.tf_type = HWRM_TF_SESSION_QCFG,\n+\tparms.req_data = (uint32_t *)&req;\n+\tparms.req_size = sizeof(req);\n+\tparms.resp_data = (uint32_t *)&resp;\n+\tparms.resp_size = sizeof(resp);\n+\tparms.mailbox = TF_KONG_MB;\n+\n+\trc = tfp_send_msg_direct(tfp,\n+\t\t\t\t &parms);\n+\treturn rc;\n+}\ndiff --git a/drivers/net/bnxt/tf_core/tf_msg.h b/drivers/net/bnxt/tf_core/tf_msg.h\nnew file mode 100644\nindex 0000000..20ebf2e\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_core/tf_msg.h\n@@ -0,0 +1,44 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019-2020 Broadcom\n+ * All rights reserved.\n+ */\n+\n+#ifndef _TF_MSG_H_\n+#define _TF_MSG_H_\n+\n+#include \"tf_rm.h\"\n+\n+struct tf;\n+\n+/**\n+ * Sends session open request to Firmware\n+ *\n+ * [in] session\n+ * Pointer to session handle\n+ *\n+ * [in] ctrl_chan_name\n+ * PCI name of the control channel\n+ *\n+ * [in/out] fw_session_id\n+ * Pointer to the fw_session_id that is allocated on firmware side\n+ *\n+ * Returns:\n+ *\n+ */\n+int tf_msg_session_open(struct tf *tfp,\n+\t\t\tchar *ctrl_chan_name,\n+\t\t\tuint8_t *fw_session_id);\n+\n+/**\n+ * Sends session query config request to TF Firmware\n+ */\n+int tf_msg_session_qcfg(struct tf *tfp);\n+\n+/**\n+ * Sends session HW resource query capability request to TF Firmware\n+ */\n+int tf_msg_session_hw_resc_qcaps(struct tf *tfp,\n+\t\t\t\t enum tf_dir dir,\n+\t\t\t\t struct tf_rm_hw_query *hw_query);\n+\n+#endif /* _TF_MSG_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_msg_common.h b/drivers/net/bnxt/tf_core/tf_msg_common.h\nnew file mode 100644\nindex 0000000..7a4e825\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_core/tf_msg_common.h\n@@ -0,0 +1,47 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019-2020 Broadcom\n+ * All rights reserved.\n+ */\n+\n+#ifndef _TF_MSG_COMMON_H_\n+#define _TF_MSG_COMMON_H_\n+\n+/* Communication Mailboxes */\n+#define TF_CHIMP_MB 0\n+#define TF_KONG_MB 1\n+\n+/* Helper to fill in the parms structure */\n+#define MSG_PREP(parms, mb, type, subtype, req, resp) do {\t\\\n+\t\tparms.mailbox = mb;\t\t\t\t\\\n+\t\tparms.tf_type = type;\t\t\t\t\\\n+\t\tparms.tf_subtype = subtype;\t\t\t\\\n+\t\tparms.tf_resp_code = 0;\t\t\t\t\\\n+\t\tparms.req_size = sizeof(req);\t\t\t\\\n+\t\tparms.req_data = (uint32_t *)&(req);\t\t\\\n+\t\tparms.resp_size = sizeof(resp);\t\t\t\\\n+\t\tparms.resp_data = (uint32_t *)&(resp);\t\t\\\n+\t} while (0)\n+\n+#define MSG_PREP_NO_REQ(parms, mb, type, subtype, resp) do {\t\\\n+\t\tparms.mailbox = mb;\t\t\t\t\\\n+\t\tparms.tf_type = type;\t\t\t\t\\\n+\t\tparms.tf_subtype = subtype;\t\t\t\\\n+\t\tparms.tf_resp_code = 0;\t\t\t\t\\\n+\t\tparms.req_size = 0;\t\t\t\t\\\n+\t\tparms.req_data = NULL;\t\t\t\t\\\n+\t\tparms.resp_size = sizeof(resp);\t\t\t\\\n+\t\tparms.resp_data = (uint32_t *)&(resp);\t\t\\\n+\t} while (0)\n+\n+#define MSG_PREP_NO_RESP(parms, mb, type, subtype, req) do {\t\\\n+\t\tparms.mailbox = mb;\t\t\t\t\\\n+\t\tparms.tf_type = type;\t\t\t\t\\\n+\t\tparms.tf_subtype = subtype;\t\t\t\\\n+\t\tparms.tf_resp_code = 0;\t\t\t\t\\\n+\t\tparms.req_size = sizeof(req);\t\t\t\\\n+\t\tparms.req_data = (uint32_t *)&(req);\t\t\\\n+\t\tparms.resp_size = 0;\t\t\t\t\\\n+\t\tparms.resp_data = NULL;\t\t\t\t\\\n+\t} while (0)\n+\n+#endif /* _TF_MSG_COMMON_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_project.h b/drivers/net/bnxt/tf_core/tf_project.h\nnew file mode 100644\nindex 0000000..ab5f113\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_core/tf_project.h\n@@ -0,0 +1,24 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019-2020 Broadcom\n+ * All rights reserved.\n+ */\n+\n+#ifndef _TF_PROJECT_H_\n+#define _TF_PROJECT_H_\n+\n+/* Wh+ support enabled */\n+#ifndef TF_SUPPORT_P4\n+#define TF_SUPPORT_P4 1\n+#endif\n+\n+/* Shadow DB Support */\n+#ifndef TF_SHADOW\n+#define TF_SHADOW 0\n+#endif\n+\n+/* Shared memory for session */\n+#ifndef TF_SHARED\n+#define TF_SHARED 0\n+#endif\n+\n+#endif /* _TF_PROJECT_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_resources.h b/drivers/net/bnxt/tf_core/tf_resources.h\nnew file mode 100644\nindex 0000000..160abac\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_core/tf_resources.h\n@@ -0,0 +1,46 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019-2020 Broadcom\n+ * All rights reserved.\n+ */\n+\n+#ifndef _TF_RESOURCES_H_\n+#define _TF_RESOURCES_H_\n+\n+/*\n+ * Hardware specific MAX values\n+ * NOTE: Should really come from the chip_cfg.h in some MAX form or HCAPI\n+ */\n+\n+/** HW Resource types\n+ */\n+enum tf_resource_type_hw {\n+\t/* Common HW resources for all chip variants */\n+\tTF_RESC_TYPE_HW_L2_CTXT_TCAM,\n+\tTF_RESC_TYPE_HW_PROF_FUNC,\n+\tTF_RESC_TYPE_HW_PROF_TCAM,\n+\tTF_RESC_TYPE_HW_EM_PROF_ID,\n+\tTF_RESC_TYPE_HW_EM_REC,\n+\tTF_RESC_TYPE_HW_WC_TCAM_PROF_ID,\n+\tTF_RESC_TYPE_HW_WC_TCAM,\n+\tTF_RESC_TYPE_HW_METER_PROF,\n+\tTF_RESC_TYPE_HW_METER_INST,\n+\tTF_RESC_TYPE_HW_MIRROR,\n+\tTF_RESC_TYPE_HW_UPAR,\n+\t/* Wh+/Brd2 specific HW resources */\n+\tTF_RESC_TYPE_HW_SP_TCAM,\n+\t/* Brd2/Brd4 specific HW resources */\n+\tTF_RESC_TYPE_HW_L2_FUNC,\n+\t/* Brd3, Brd4 common HW resources */\n+\tTF_RESC_TYPE_HW_FKB,\n+\t/* Brd4 specific HW resources */\n+\tTF_RESC_TYPE_HW_TBL_SCOPE,\n+\tTF_RESC_TYPE_HW_EPOCH0,\n+\tTF_RESC_TYPE_HW_EPOCH1,\n+\tTF_RESC_TYPE_HW_METADATA,\n+\tTF_RESC_TYPE_HW_CT_STATE,\n+\tTF_RESC_TYPE_HW_RANGE_PROF,\n+\tTF_RESC_TYPE_HW_RANGE_ENTRY,\n+\tTF_RESC_TYPE_HW_LAG_ENTRY,\n+\tTF_RESC_TYPE_HW_MAX\n+};\n+#endif /* _TF_RESOURCES_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_rm.h b/drivers/net/bnxt/tf_core/tf_rm.h\nnew file mode 100644\nindex 0000000..5164d6b\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_core/tf_rm.h\n@@ -0,0 +1,33 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019-2020 Broadcom\n+ * All rights reserved.\n+ */\n+\n+#ifndef TF_RM_H_\n+#define TF_RM_H_\n+\n+#include \"tf_resources.h\"\n+#include \"tf_core.h\"\n+\n+struct tf;\n+struct tf_session;\n+\n+/**\n+ * Resource query single entry\n+ */\n+struct tf_rm_query_entry {\n+\t/** Minimum guaranteed number of elements */\n+\tuint16_t min;\n+\t/** Maximum non-guaranteed number of elements */\n+\tuint16_t max;\n+};\n+\n+/**\n+ * Resource query array of HW entities\n+ */\n+struct tf_rm_hw_query {\n+\t/** array of HW resource entries */\n+\tstruct tf_rm_query_entry hw_query[TF_RESC_TYPE_HW_MAX];\n+};\n+\n+#endif /* TF_RM_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_session.h b/drivers/net/bnxt/tf_core/tf_session.h\nnew file mode 100644\nindex 0000000..c30ebbe\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_core/tf_session.h\n@@ -0,0 +1,85 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019-2020 Broadcom\n+ * All rights reserved.\n+ */\n+\n+#ifndef _TF_SESSION_H_\n+#define _TF_SESSION_H_\n+\n+#include <stdint.h>\n+#include <stdlib.h>\n+\n+#include \"tf_core.h\"\n+#include \"tf_rm.h\"\n+\n+/** Session defines\n+ */\n+#define TF_SESSIONS_MAX\t 1 /** max # sessions */\n+#define TF_SESSION_ID_INVALID 0xFFFFFFFF /** Invalid Session ID define */\n+\n+/** Session\n+ *\n+ * Shared memory containing private TruFlow session information.\n+ * Through this structure the session can keep track of resource\n+ * allocations and (if so configured) any shadow copy of flow\n+ * information.\n+ *\n+ * Memory is assigned to the Truflow instance by way of\n+ * tf_open_session. Memory is allocated and owned by i.e. ULP.\n+ *\n+ * Access control to this shared memory is handled by the spin_lock in\n+ * tf_session_info.\n+ */\n+struct tf_session {\n+\t/** TrueFlow Version. Used to control the structure layout\n+\t * when sharing sessions. No guarantee that a secondary\n+\t * process would come from the same version of an executable.\n+\t */\n+\tstruct tf_session_version ver;\n+\n+\t/** Device type, provided by tf_open_session().\n+\t */\n+\tenum tf_device_type device_type;\n+\n+\t/** Session ID, allocated by FW on tf_open_session().\n+\t */\n+\tunion tf_session_id session_id;\n+\n+\t/**\n+\t * String containing name of control channel interface to be\n+\t * used for this session to communicate with firmware.\n+\t *\n+\t * ctrl_chan_name will be used as part of a name for any\n+\t * shared memory allocation.\n+\t */\n+\tchar ctrl_chan_name[TF_SESSION_NAME_MAX];\n+\n+\t/**\n+\t * Boolean controlling the use and availability of shadow\n+\t * copy. Shadow copy will allow the TruFlow Core to keep track\n+\t * of resource content on the firmware side without having to\n+\t * query firmware. Additional private session core_data will\n+\t * be allocated if this boolean is set to 'true', default\n+\t * 'false'.\n+\t *\n+\t * Size of memory depends on the NVM Resource settings for the\n+\t * control channel.\n+\t */\n+\tbool shadow_copy;\n+\n+\t/** \n+\t * Session Reference Count. To keep track of functions per\n+\t * session the ref_count is incremented. There is also a\n+\t * parallel TruFlow Firmware ref_count in case the TruFlow\n+\t * Core goes away without informing the Firmware.\n+\t */\n+\tuint8_t ref_count;\n+\n+\t/** CRC32 seed table */\n+#define TF_LKUP_SEED_MEM_SIZE 512\n+\tuint32_t lkup_em_seed_mem[TF_DIR_MAX][TF_LKUP_SEED_MEM_SIZE];\n+\t/** Lookup3 init values */\n+\tuint32_t lkup_lkup3_init_cfg[TF_DIR_MAX];\n+\n+};\n+#endif /* _TF_SESSION_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tfp.c b/drivers/net/bnxt/tf_core/tfp.c\nnew file mode 100644\nindex 0000000..fb5c297\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_core/tfp.c\n@@ -0,0 +1,163 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * see the individual elements.\n+ * Copyright(c) 2019-2020 Broadcom\n+ * All rights reserved.\n+ */\n+\n+#include <rte_memcpy.h>\n+#include <rte_byteorder.h>\n+#include <rte_config.h>\n+#include <rte_mbuf.h>\n+#include <rte_ethdev.h>\n+#include <rte_lcore.h>\n+#include <rte_log.h>\n+#include <rte_errno.h>\n+#include <rte_malloc.h>\n+#include <rte_spinlock.h>\n+\n+#include \"tf_core.h\"\n+#include \"tfp.h\"\n+#include \"bnxt.h\"\n+#include \"bnxt_hwrm.h\"\n+#include \"tf_msg_common.h\"\n+\n+/**\n+ * Sends TruFlow msg to the TruFlow Firmware using\n+ * a message specific HWRM message type.\n+ *\n+ * Returns success or failure code.\n+ */\n+int\n+tfp_send_msg_direct(struct tf *tfp,\n+\t\t struct tfp_send_msg_parms *parms)\n+{\n+\tint rc = 0;\n+\tuint8_t use_kong_mb = 1;\n+\n+\tif (parms == NULL)\n+\t\treturn -EINVAL;\n+\n+\tif (parms->mailbox == TF_CHIMP_MB)\n+\t\tuse_kong_mb = 0;\n+\n+\trc = bnxt_hwrm_tf_message_direct(container_of(tfp,\n+\t\t\t\t\t struct bnxt,\n+\t\t\t\t\t tfp),\n+\t\t\t\t\t use_kong_mb,\n+\t\t\t\t\t parms->tf_type,\n+\t\t\t\t\t parms->req_data,\n+\t\t\t\t\t parms->req_size,\n+\t\t\t\t\t parms->resp_data,\n+\t\t\t\t\t parms->resp_size);\n+\n+\treturn rc;\n+}\n+\n+/**\n+ * Sends preformatted TruFlow msg to the TruFlow Firmware using\n+ * the Truflow tunnel HWRM message type.\n+ *\n+ * Returns success or failure code.\n+ */\n+int\n+tfp_send_msg_tunneled(struct tf *tfp,\n+\t\t struct tfp_send_msg_parms *parms)\n+{\n+\tint rc = 0;\n+\tuint8_t use_kong_mb = 1;\n+\n+\tif (parms == NULL)\n+\t\treturn -EINVAL;\n+\n+\tif (parms->mailbox == TF_CHIMP_MB)\n+\t\tuse_kong_mb = 0;\n+\n+\trc = bnxt_hwrm_tf_message_tunneled(container_of(tfp,\n+\t\t\t\t\t\t struct bnxt,\n+\t\t\t\t\t\t tfp),\n+\t\t\t\t\t use_kong_mb,\n+\t\t\t\t\t parms->tf_type,\n+\t\t\t\t\t parms->tf_subtype,\n+\t\t\t\t\t &parms->tf_resp_code,\n+\t\t\t\t\t parms->req_data,\n+\t\t\t\t\t parms->req_size,\n+\t\t\t\t\t parms->resp_data,\n+\t\t\t\t\t parms->resp_size);\n+\n+\treturn rc;\n+}\n+\n+/**\n+ * Allocates zero'ed memory from the heap.\n+ *\n+ * Returns success or failure code.\n+ */\n+int\n+tfp_calloc(struct tfp_calloc_parms *parms)\n+{\n+\tif (parms == NULL)\n+\t\treturn -EINVAL;\n+\n+\tparms->mem_va = rte_zmalloc(\"tf\",\n+\t\t\t\t (parms->nitems * parms->size),\n+\t\t\t\t parms->alignment);\n+\tif (parms->mem_va == NULL) {\n+\t\tPMD_DRV_LOG(ERR, \"Allocate failed mem_va\\n\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tparms->mem_pa = (void *)rte_mem_virt2iova(parms->mem_va);\n+\tif (parms->mem_pa == (void *)RTE_BAD_IOVA) {\n+\t\tPMD_DRV_LOG(ERR, \"Allocate failed mem_pa\\n\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * Frees the memory space pointed to by the provided pointer. The\n+ * pointer must have been returned from the tfp_calloc().\n+ */\n+void\n+tfp_free(void *addr)\n+{\n+\trte_free(addr);\n+}\n+\n+/**\n+ * Copies n bytes from src memory to dest memory. The memory areas\n+ * must not overlap.\n+ */\n+void\n+tfp_memcpy(void *dest, void *src, size_t n)\n+{\n+\trte_memcpy(dest, src, n);\n+}\n+\n+/**\n+ * Used to initialize portable spin lock\n+ */\n+void\n+tfp_spinlock_init(struct tfp_spinlock_parms *parms)\n+{\n+\trte_spinlock_init(&parms->slock);\n+}\n+\n+/**\n+ * Used to lock portable spin lock\n+ */\n+void\n+tfp_spinlock_lock(struct tfp_spinlock_parms *parms)\n+{\n+\trte_spinlock_lock(&parms->slock);\n+}\n+\n+/**\n+ * Used to unlock portable spin lock\n+ */\n+void\n+tfp_spinlock_unlock(struct tfp_spinlock_parms *parms)\n+{\n+\trte_spinlock_unlock(&parms->slock);\n+}\ndiff --git a/drivers/net/bnxt/tf_core/tfp.h b/drivers/net/bnxt/tf_core/tfp.h\nnew file mode 100644\nindex 0000000..8d5e94e\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_core/tfp.h\n@@ -0,0 +1,188 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019-2020 Broadcom\n+ * All rights reserved.\n+ */\n+\n+/* This header file defines the Portability structures and APIs for\n+ * TruFlow.\n+ */\n+\n+#ifndef _TFP_H_\n+#define _TFP_H_\n+\n+#include <rte_spinlock.h>\n+\n+/** Spinlock\n+ */\n+struct tfp_spinlock_parms {\n+\trte_spinlock_t slock;\n+};\n+\n+/**\n+ * @file\n+ *\n+ * TrueFlow Portability API Header File\n+ */\n+\n+/** send message parameter definition\n+ */\n+struct tfp_send_msg_parms {\n+\t/**\n+\t * [in] mailbox, specifying the Mailbox to send the command on.\n+\t */\n+\tuint32_t mailbox;\n+\t/**\n+\t * [in] tlv_subtype, specifies the tlv_type.\n+\t */\n+\tuint16_t tf_type;\n+\t/**\n+\t * [in] tlv_subtype, specifies the tlv_subtype.\n+\t */\n+\tuint16_t tf_subtype;\n+\t/**\n+\t * [out] tf_resp_code, response code from the internal tlv\n+\t * message. Only supported on tunneled messages.\n+\t */\n+\tuint32_t tf_resp_code;\n+\t/**\n+\t * [out] size, number specifying the request size of the data in bytes\n+\t */\n+\tuint32_t req_size;\n+\t/**\n+\t * [in] data, pointer to the data to be sent within the HWRM command\n+\t */\n+\tuint32_t *req_data;\n+\t/**\n+\t * [out] size, number specifying the response size of the data in bytes\n+\t */\n+\tuint32_t resp_size;\n+\t/**\n+\t * [out] data, pointer to the data to be sent within the HWRM command\n+\t */\n+\tuint32_t *resp_data;\n+};\n+\n+/** calloc parameter definition\n+ */\n+struct tfp_calloc_parms {\n+\t/**\n+\t * [in] nitems, number specifying number of items to allocate.\n+\t */\n+\tsize_t nitems;\n+\t/**\n+\t * [in] size, number specifying the size of each memory item\n+\t * requested. Size is in bytes.\n+\t */\n+\tsize_t size;\n+\t/**\n+\t * [in] alignment, number indicates byte alignment required. 0\n+\t * - don't care, 16 - 16 byte alignment, 4K - 4K alignment etc\n+\t */\n+\tsize_t alignment;\n+\t/**\n+\t * [out] mem_va, pointer to the allocated memory.\n+\t */\n+\tvoid *mem_va;\n+\t/**\n+\t * [out] mem_pa, physical address of the allocated memory.\n+\t */\n+\tvoid *mem_pa;\n+};\n+\n+/**\n+ * @page Portability\n+ *\n+ * @ref tfp_send_direct\n+ * @ref tfp_send_msg_tunneled\n+ *\n+ * @ref tfp_calloc\n+ * @ref tfp_free\n+ * @ref tfp_memcpy\n+ *\n+ * @ref tfp_spinlock_init\n+ * @ref tfp_spinlock_lock\n+ * @ref tfp_spinlock_unlock\n+ *\n+ * @ref tfp_cpu_to_le_16\n+ * @ref tfp_le_to_cpu_16\n+ * @ref tfp_cpu_to_le_32\n+ * @ref tfp_le_to_cpu_32\n+ * @ref tfp_cpu_to_le_64\n+ * @ref tfp_le_to_cpu_64\n+ * @ref tfp_cpu_to_be_16\n+ * @ref tfp_be_to_cpu_16\n+ * @ref tfp_cpu_to_be_32\n+ * @ref tfp_be_to_cpu_32\n+ * @ref tfp_cpu_to_be_64\n+ * @ref tfp_be_to_cpu_64\n+ */\n+\n+#define tfp_cpu_to_le_16(val) rte_cpu_to_le_16(val)\n+#define tfp_le_to_cpu_16(val) rte_le_to_cpu_16(val)\n+#define tfp_cpu_to_le_32(val) rte_cpu_to_le_32(val)\n+#define tfp_le_to_cpu_32(val) rte_le_to_cpu_32(val)\n+#define tfp_cpu_to_le_64(val) rte_cpu_to_le_64(val)\n+#define tfp_le_to_cpu_64(val) rte_le_to_cpu_64(val)\n+#define tfp_cpu_to_be_16(val) rte_cpu_to_be_16(val)\n+#define tfp_be_to_cpu_16(val) rte_be_to_cpu_16(val)\n+#define tfp_cpu_to_be_32(val) rte_cpu_to_be_32(val)\n+#define tfp_be_to_cpu_32(val) rte_be_to_cpu_32(val)\n+#define tfp_cpu_to_be_64(val) rte_cpu_to_be_64(val)\n+#define tfp_be_to_cpu_64(val) rte_be_to_cpu_64(val)\n+#define tfp_bswap_16(val) rte_bswap16(val)\n+#define tfp_bswap_32(val) rte_bswap32(val)\n+#define tfp_bswap_64(val) rte_bswap64(val)\n+\n+/**\n+ * Provides communication capability from the TrueFlow API layer to\n+ * the TrueFlow firmware. The portability layer internally provides\n+ * the transport to the firmware.\n+ *\n+ * [in] session, pointer to session handle\n+ * [in] parms, parameter structure\n+ *\n+ * Returns:\n+ * 0 - Success\n+ * -1 - Global error like not supported\n+ * -EINVAL - Parameter Error\n+ */\n+int tfp_send_msg_direct(struct tf *tfp,\n+\t\t\tstruct tfp_send_msg_parms *parms);\n+\n+/**\n+ * Provides communication capability from the TrueFlow API layer to\n+ * the TrueFlow firmware. The portability layer internally provides\n+ * the transport to the firmware.\n+ *\n+ * [in] session, pointer to session handle\n+ * [in] parms, parameter structure\n+ *\n+ * Returns:\n+ * 0 - Success\n+ * -1 - Global error like not supported\n+ * -EINVAL - Parameter Error\n+ */\n+int tfp_send_msg_tunneled(struct tf *tfp,\n+\t\t\t struct tfp_send_msg_parms *parms);\n+\n+/**\n+ * Allocates zero'ed memory from the heap.\n+ *\n+ * NOTE: Also performs virt2phy address conversion by default thus is\n+ * can be expensive to invoke.\n+ *\n+ * [in] parms, parameter structure\n+ *\n+ * Returns:\n+ * 0 - Success\n+ * -ENOMEM - No memory available\n+ * -EINVAL - Parameter error\n+ */\n+int tfp_calloc(struct tfp_calloc_parms *parms);\n+\n+void tfp_free(void *addr);\n+void tfp_memcpy(void *dest, void *src, size_t n);\n+void tfp_spinlock_init(struct tfp_spinlock_parms *slock);\n+void tfp_spinlock_lock(struct tfp_spinlock_parms *slock);\n+void tfp_spinlock_unlock(struct tfp_spinlock_parms *slock);\n+#endif /* _TFP_H_ */\n", "prefixes": [ "04/33" ] }