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GET /api/patches/66694/?format=api
{ "id": 66694, "url": "http://patches.dpdk.org/api/patches/66694/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1584351224-23500-5-git-send-email-hkalra@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1584351224-23500-5-git-send-email-hkalra@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1584351224-23500-5-git-send-email-hkalra@marvell.com", "date": "2020-03-16T09:33:40", "name": "[4/8] net/octeontx: add MTU support", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "42f6394720948ce1695b530c2e15e504befcfc60", "submitter": { "id": 1182, "url": "http://patches.dpdk.org/api/people/1182/?format=api", "name": "Harman Kalra", "email": "hkalra@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1584351224-23500-5-git-send-email-hkalra@marvell.com/mbox/", "series": [ { "id": 8923, "url": "http://patches.dpdk.org/api/series/8923/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8923", "date": "2020-03-16T09:33:36", "name": "add new features to octeontx PMD", "version": 1, "mbox": "http://patches.dpdk.org/series/8923/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/66694/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/66694/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": 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"HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n pJLL6X4QumkuzFhGPhio3Lp+fs+xo/r+iqGaEyxN0OLDFr7k/N9BZ1sMFK8A62uP98SqzTmY8EV9VJjDlnJaVA==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MN2PR18MB3117", "X-OriginatorOrg": "marvell.com", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572\n definitions=2020-03-16_02:2020-03-12,\n 2020-03-16 signatures=0", "Subject": "[dpdk-dev] [PATCH 4/8] net/octeontx: add MTU support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Adding support for mtu eth operation which configures mtu based\non max pkt len.\n\nSigned-off-by: Harman Kalra <hkalra@marvell.com>\n---\n doc/guides/nics/features/octeontx.ini | 1 +\n doc/guides/nics/octeontx.rst | 1 +\n drivers/net/octeontx/base/octeontx_bgx.c | 17 +++++\n drivers/net/octeontx/base/octeontx_bgx.h | 1 +\n drivers/net/octeontx/base/octeontx_pkovf.c | 21 +++++++\n drivers/net/octeontx/base/octeontx_pkovf.h | 8 +++\n drivers/net/octeontx/octeontx_ethdev.c | 72 +++++++++++++++++++++-\n drivers/net/octeontx/octeontx_ethdev.h | 25 ++++++++\n drivers/net/octeontx/octeontx_logs.h | 3 +\n 9 files changed, 146 insertions(+), 3 deletions(-)", "diff": "diff --git a/doc/guides/nics/features/octeontx.ini b/doc/guides/nics/features/octeontx.ini\nindex 19caee61b..e3ee79f0f 100644\n--- a/doc/guides/nics/features/octeontx.ini\n+++ b/doc/guides/nics/features/octeontx.ini\n@@ -8,6 +8,7 @@ Speed capabilities = Y\n Link status = Y\n Lock-free Tx queue = Y\n Queue start/stop = P\n+MTU update = Y\n Jumbo frame = Y\n Scattered Rx = Y\n Promiscuous mode = Y\ndiff --git a/doc/guides/nics/octeontx.rst b/doc/guides/nics/octeontx.rst\nindex 0c36e10cb..ddb626bc3 100644\n--- a/doc/guides/nics/octeontx.rst\n+++ b/doc/guides/nics/octeontx.rst\n@@ -22,6 +22,7 @@ Features of the OCTEON TX Ethdev PMD are:\n - Jumbo frames\n - Scatter-Gather IO support\n - Link state information\n+- MTU update\n - SR-IOV VF\n - Multiple queues for TX\n - Lock-free Tx queue\ndiff --git a/drivers/net/octeontx/base/octeontx_bgx.c b/drivers/net/octeontx/base/octeontx_bgx.c\nindex a2d615fb2..cc2bbd104 100644\n--- a/drivers/net/octeontx/base/octeontx_bgx.c\n+++ b/drivers/net/octeontx/base/octeontx_bgx.c\n@@ -226,6 +226,23 @@ octeontx_bgx_port_promisc_set(int port, int en)\n \treturn res;\n }\n \n+int\n+octeontx_bgx_port_mtu_set(int port, int mtu)\n+{\n+\tstruct octeontx_mbox_hdr hdr;\n+\tint res;\n+\n+\thdr.coproc = OCTEONTX_BGX_COPROC;\n+\thdr.msg = MBOX_BGX_PORT_SET_MTU;\n+\thdr.vfid = port;\n+\n+\tres = octeontx_mbox_send(&hdr, &mtu, sizeof(mtu), NULL, 0);\n+\tif (res < 0)\n+\t\treturn -EACCES;\n+\n+\treturn res;\n+}\n+\n int\n octeontx_bgx_port_mac_set(int port, uint8_t *mac_addr)\n {\ndiff --git a/drivers/net/octeontx/base/octeontx_bgx.h b/drivers/net/octeontx/base/octeontx_bgx.h\nindex 11c25db67..e385de42d 100644\n--- a/drivers/net/octeontx/base/octeontx_bgx.h\n+++ b/drivers/net/octeontx/base/octeontx_bgx.h\n@@ -131,6 +131,7 @@ int octeontx_bgx_port_mac_set(int port, uint8_t *mac_addr);\n int octeontx_bgx_port_mac_add(int port, uint8_t *mac_addr, int index);\n int octeontx_bgx_port_mac_del(int port, uint32_t index);\n int octeontx_bgx_port_mac_entries_get(int port);\n+int octeontx_bgx_port_mtu_set(int port, int mtu);\n \n #endif\t/* __OCTEONTX_BGX_H__ */\n \ndiff --git a/drivers/net/octeontx/base/octeontx_pkovf.c b/drivers/net/octeontx/base/octeontx_pkovf.c\nindex dacbdd0b4..bf28bc799 100644\n--- a/drivers/net/octeontx/base/octeontx_pkovf.c\n+++ b/drivers/net/octeontx/base/octeontx_pkovf.c\n@@ -465,6 +465,27 @@ octeontx_pko_get_vfid(void)\n \treturn SIZE_MAX;\n }\n \n+int\n+octeontx_pko_send_mtu(int port, int mtu)\n+{\n+\tstruct octeontx_mbox_hdr hdr;\n+\tint res;\n+\tmbox_pko_mtu_cfg_t cfg;\n+\n+\tcfg.mtu = mtu;\n+\n+\thdr.coproc = OCTEONTX_PKO_COPROC;\n+\thdr.msg = MBOX_PKO_MTU_CONFIG;\n+\thdr.vfid = port;\n+\n+\tres = octeontx_mbox_send(&hdr, &cfg, sizeof(mbox_pko_mtu_cfg_t),\n+\t\t\t\t NULL, 0);\n+\tif (res < 0)\n+\t\treturn -EACCES;\n+\n+\treturn res;\n+}\n+\n int\n octeontx_pko_init_fc(const size_t pko_vf_count)\n {\ndiff --git a/drivers/net/octeontx/base/octeontx_pkovf.h b/drivers/net/octeontx/base/octeontx_pkovf.h\nindex 4e0bb7c2e..7e1aba3e3 100644\n--- a/drivers/net/octeontx/base/octeontx_pkovf.h\n+++ b/drivers/net/octeontx/base/octeontx_pkovf.h\n@@ -43,6 +43,13 @@\n #define PKO_SEND_GATHER_LDTYPE(x)\t((x) << 58)\n #define PKO_SEND_GATHER_GAUAR(x)\t((x) << 24)\n \n+#define OCTEONTX_PKO_COPROC 4\n+#define MBOX_PKO_MTU_CONFIG\t\t\t1\n+\n+typedef struct mbox_pko_mtu_cfg {\n+\tuint32_t mtu;\n+} mbox_pko_mtu_cfg_t;\n+\n typedef struct octeontx_dq_s {\n \tvoid *lmtline_va;\n \tvoid *ioreg_va;\n@@ -71,5 +78,6 @@ int octeontx_pko_vf_count(void);\n size_t octeontx_pko_get_vfid(void);\n int octeontx_pko_init_fc(const size_t pko_vf_count);\n void octeontx_pko_fc_free(void);\n+int octeontx_pko_send_mtu(int port, int mtu);\n \n #endif /* __OCTEONTX_PKO_H__ */\ndiff --git a/drivers/net/octeontx/octeontx_ethdev.c b/drivers/net/octeontx/octeontx_ethdev.c\nindex 97b4298fe..91b9ea645 100644\n--- a/drivers/net/octeontx/octeontx_ethdev.c\n+++ b/drivers/net/octeontx/octeontx_ethdev.c\n@@ -139,7 +139,7 @@ octeontx_port_open(struct octeontx_nic *nic)\n \tnic->base_ochan = bgx_port_conf.base_chan;\n \tnic->num_ichans = bgx_port_conf.num_chans;\n \tnic->num_ochans = bgx_port_conf.num_chans;\n-\tnic->mtu = bgx_port_conf.mtu;\n+\tnic->bgx_mtu = bgx_port_conf.mtu;\n \tnic->bpen = bgx_port_conf.bpen;\n \tnic->fcs_strip = bgx_port_conf.fcs_strip;\n \tnic->bcast_mode = bgx_port_conf.bcast_mode;\n@@ -407,6 +407,55 @@ octeontx_dev_close(struct rte_eth_dev *dev)\n \tdev->rx_pkt_burst = NULL;\n }\n \n+static int\n+octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)\n+{\n+\tuint32_t buffsz, frame_size = mtu + OCCTX_L2_OVERHEAD;\n+\tstruct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);\n+\tstruct rte_eth_dev_data *data = eth_dev->data;\n+\tint rc = 0;\n+\n+\t/* Check if MTU is within the allowed range */\n+\tif (frame_size < OCCTX_MIN_FRS || frame_size > OCCTX_MAX_FRS)\n+\t\treturn -EINVAL;\n+\n+\tbuffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;\n+\n+\t/* Refuse MTU that requires the support of scattered packets\n+\t * when this feature has not been enabled before.\n+\t */\n+\tif (data->dev_started && frame_size > buffsz &&\n+\t !(nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER)) {\n+\t\tocteontx_log_err(\"Scatter mode is disabled\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Check <seg size> * <max_seg> >= max_frame */\n+\tif ((nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER)\t&&\n+\t (frame_size > buffsz * OCCTX_RX_NB_SEG_MAX))\n+\t\treturn -EINVAL;\n+\n+\trc = octeontx_pko_send_mtu(nic->port_id, frame_size);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\trc = octeontx_bgx_port_mtu_set(nic->port_id, frame_size);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tif (frame_size > RTE_ETHER_MAX_LEN)\n+\t\tnic->rx_offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;\n+\telse\n+\t\tnic->rx_offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME;\n+\n+\t/* Update max_rx_pkt_len */\n+\tdata->dev_conf.rxmode.max_rx_pkt_len = frame_size;\n+\tocteontx_log_info(\"Received pkt beyond maxlen %d will be dropped\",\n+\t\t\t frame_size);\n+\n+\treturn rc;\n+}\n+\n static int\n octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq)\n {\n@@ -435,6 +484,9 @@ octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq)\n \tevdev_priv->rx_offload_flags = nic->rx_offload_flags;\n \tevdev_priv->tx_offload_flags = nic->tx_offload_flags;\n \n+\t/* Setup MTU based on max_rx_pkt_len */\n+\tnic->mtu = data->dev_conf.rxmode.max_rx_pkt_len - OCCTX_L2_OVERHEAD;\n+\n \treturn 0;\n }\n \n@@ -445,6 +497,7 @@ octeontx_dev_start(struct rte_eth_dev *dev)\n \tstruct octeontx_rxq *rxq;\n \tint ret = 0, i;\n \n+\tPMD_INIT_FUNC_TRACE();\n \t/* Rechecking if any new offload set to update\n \t * rx/tx burst function pointer accordingly.\n \t */\n@@ -453,7 +506,13 @@ octeontx_dev_start(struct rte_eth_dev *dev)\n \t\tocteontx_recheck_rx_offloads(rxq);\n \t}\n \n-\tPMD_INIT_FUNC_TRACE();\n+\t/* Setting up the mtu based on max_rx_pkt_len */\n+\tret = octeontx_dev_mtu_set(dev, nic->mtu);\n+\tif (ret) {\n+\t\tocteontx_log_err(\"Failed to set default MTU size %d\", ret);\n+\t\tgoto error;\n+\t}\n+\n \t/*\n \t * Tx start\n \t */\n@@ -713,6 +772,12 @@ octeontx_dev_info(struct rte_eth_dev *dev,\n \t\t\tETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |\n \t\t\tETH_LINK_SPEED_40G;\n \n+\t/* Min/Max MTU supported */\n+\tdev_info->min_rx_bufsize = OCCTX_MIN_FRS;\n+\tdev_info->max_rx_pktlen = OCCTX_MAX_FRS;\n+\tdev_info->max_mtu = dev_info->max_rx_pktlen - OCCTX_L2_OVERHEAD;\n+\tdev_info->min_mtu = dev_info->min_rx_bufsize - OCCTX_L2_OVERHEAD;\n+\n \tdev_info->max_mac_addrs =\n \t\t\t\tocteontx_bgx_port_mac_entries_get(nic->port_id);\n \tdev_info->max_rx_pktlen = PKI_MAX_PKTLEN;\n@@ -1127,6 +1192,7 @@ static const struct eth_dev_ops octeontx_dev_ops = {\n \t.rx_queue_setup\t\t = octeontx_dev_rx_queue_setup,\n \t.rx_queue_release\t = octeontx_dev_rx_queue_release,\n \t.dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,\n+\t.mtu_set = octeontx_dev_mtu_set,\n \t.pool_ops_supported = octeontx_pool_ops,\n };\n \n@@ -1256,7 +1322,7 @@ octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,\n \t\t\t\tnic->port_id, nic->port_ena,\n \t\t\t\tnic->base_ochan, nic->num_ochans,\n \t\t\t\tnic->num_tx_queues);\n-\tPMD_INIT_LOG(DEBUG, \"speed %d mtu %d\", nic->speed, nic->mtu);\n+\tPMD_INIT_LOG(DEBUG, \"speed %d mtu %d\", nic->speed, nic->bgx_mtu);\n \n \trte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]\n \t\t[(nic->base_ochan >> 4) & 0xF] = data->port_id;\ndiff --git a/drivers/net/octeontx/octeontx_ethdev.h b/drivers/net/octeontx/octeontx_ethdev.h\nindex 1abe1703b..27f6556dd 100644\n--- a/drivers/net/octeontx/octeontx_ethdev.h\n+++ b/drivers/net/octeontx/octeontx_ethdev.h\n@@ -29,6 +29,30 @@\n #define OCTEONTX_MAX_BGX_PORTS\t\t\t4\n #define OCTEONTX_MAX_LMAC_PER_BGX\t\t4\n \n+#define OCCTX_RX_NB_SEG_MAX\t\t\t6\n+\n+/* VLAN tag inserted by OCCTX_TX_VTAG_ACTION.\n+ * In Tx space is always reserved for this in FRS.\n+ */\n+#define OCCTX_MAX_VTAG_INS\t\t2\n+#define OCCTX_MAX_VTAG_ACT_SIZE\t\t(4 * OCCTX_MAX_VTAG_INS)\n+\n+/* HW config of frame size doesn't include FCS */\n+#define OCCTX_MAX_HW_FRS\t\t9212\n+#define OCCTX_MIN_HW_FRS\t\t60\n+\n+/* ETH_HLEN+ETH_FCS+2*VLAN_HLEN */\n+#define OCCTX_L2_OVERHEAD\t(RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + \\\n+\t\t\t\t OCCTX_MAX_VTAG_ACT_SIZE)\n+\n+/* Since HW FRS includes NPC VTAG insertion space, user has reduced FRS */\n+#define OCCTX_MAX_FRS\t\\\n+\t(OCCTX_MAX_HW_FRS + RTE_ETHER_CRC_LEN - OCCTX_MAX_VTAG_ACT_SIZE)\n+\n+#define OCCTX_MIN_FRS\t\t(OCCTX_MIN_HW_FRS + RTE_ETHER_CRC_LEN)\n+\n+#define OCCTX_MAX_MTU\t\t(OCCTX_MAX_FRS - OCCTX_L2_OVERHEAD)\n+\n #define OCTEONTX_RX_OFFLOADS\t\t(DEV_RX_OFFLOAD_CHECKSUM | \\\n \t\t\t\t\t DEV_RX_OFFLOAD_SCATTER\t | \\\n \t\t\t\t\t DEV_RX_OFFLOAD_JUMBO_FRAME)\n@@ -67,6 +91,7 @@ struct octeontx_nic {\n \tuint8_t link_up;\n \tuint8_t\tduplex;\n \tuint8_t speed;\n+\tuint16_t bgx_mtu;\n \tuint16_t mtu;\n \tuint8_t mac_addr[RTE_ETHER_ADDR_LEN];\n \t/* Rx port parameters */\ndiff --git a/drivers/net/octeontx/octeontx_logs.h b/drivers/net/octeontx/octeontx_logs.h\nindex ccb8a1b0a..dec8042c6 100644\n--- a/drivers/net/octeontx/octeontx_logs.h\n+++ b/drivers/net/octeontx/octeontx_logs.h\n@@ -19,6 +19,9 @@\n \trte_log(RTE_LOG_ ## level, otx_net_logtype_mbox, \\\n \t\t\t\"%s(): \" fmt \"\\n\", __func__, ## args)\n \n+#define octeontx_log_info(fmt, args...)\t\t\t\\\n+\tRTE_LOG(INFO, PMD, fmt \"\\n\", ## args)\n+\n #define octeontx_log_err(s, ...) PMD_INIT_LOG(ERR, s, ##__VA_ARGS__)\n #define octeontx_log_dbg(s, ...) PMD_DRV_LOG(DEBUG, s, ##__VA_ARGS__)\n #define octeontx_mbox_log(s, ...) PMD_MBOX_LOG(DEBUG, s, ##__VA_ARGS__)\n", "prefixes": [ "4/8" ] }