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{
    "id": 66678,
    "url": "http://patches.dpdk.org/api/patches/66678/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200316074603.10998-5-leyi.rong@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200316074603.10998-5-leyi.rong@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200316074603.10998-5-leyi.rong@intel.com",
    "date": "2020-03-16T07:45:55",
    "name": "[04/12] net/iavf: flexible Rx descriptor support in normal path",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "5a443c70bb450168f229ee92d84b403ce942bc23",
    "submitter": {
        "id": 1204,
        "url": "http://patches.dpdk.org/api/people/1204/?format=api",
        "name": "Leyi Rong",
        "email": "leyi.rong@intel.com"
    },
    "delegate": {
        "id": 31221,
        "url": "http://patches.dpdk.org/api/users/31221/?format=api",
        "username": "yexl",
        "first_name": "xiaolong",
        "last_name": "ye",
        "email": "xiaolong.ye@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200316074603.10998-5-leyi.rong@intel.com/mbox/",
    "series": [
        {
            "id": 8918,
            "url": "http://patches.dpdk.org/api/series/8918/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8918",
            "date": "2020-03-16T07:45:51",
            "name": "framework for advanced iAVF PMD",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/8918/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/66678/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/66678/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1E5E7A0559;\n\tMon, 16 Mar 2020 08:58:02 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 06C401C0AF;\n\tMon, 16 Mar 2020 08:57:32 +0100 (CET)",
            "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id 307B21C07E\n for <dev@dpdk.org>; Mon, 16 Mar 2020 08:57:29 +0100 (CET)",
            "from orsmga004.jf.intel.com ([10.7.209.38])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 16 Mar 2020 00:57:28 -0700",
            "from dpdk-lrong-srv-04.sh.intel.com ([10.67.119.221])\n by orsmga004.jf.intel.com with ESMTP; 16 Mar 2020 00:57:27 -0700"
        ],
        "IronPort-SDR": [
            "\n VkyCZfQ0InJEeIB1c8o9Oq5W1Yk0li9jit9yWOOJdhUdj2JH3+cl2qN2iwT7I9auBRf07JQs1k\n MOL6PjLvILIw==",
            "\n mWvgTDQd8HLe/bhLYrTM0N7gFkXUCUn4Vd+Lj0PMuToTOS3WCL7vNjawazW9TsG60fV5Yo6k0Q\n jhol172S2CBA=="
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.70,559,1574150400\"; d=\"scan'208\";a=\"390622507\"",
        "From": "Leyi Rong <leyi.rong@intel.com>",
        "To": "qi.z.zhang@intel.com,\n\txiaolong.ye@intel.com",
        "Cc": "dev@dpdk.org,\n\tLeyi Rong <leyi.rong@intel.com>",
        "Date": "Mon, 16 Mar 2020 15:45:55 +0800",
        "Message-Id": "<20200316074603.10998-5-leyi.rong@intel.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20200316074603.10998-1-leyi.rong@intel.com>",
        "References": "<20200316074603.10998-1-leyi.rong@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 04/12] net/iavf: flexible Rx descriptor support\n\tin normal path",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Support flexible Rx descriptor format in normal\npath of iAVF PMD.\n\nSigned-off-by: Leyi Rong <leyi.rong@intel.com>\n---\n drivers/net/iavf/iavf.h        |   2 +\n drivers/net/iavf/iavf_ethdev.c |   8 +\n drivers/net/iavf/iavf_rxtx.c   | 507 ++++++++++++++++++++++++++++++++-\n drivers/net/iavf/iavf_rxtx.h   |  11 +\n drivers/net/iavf/iavf_vchnl.c  |  43 ++-\n 5 files changed, 567 insertions(+), 4 deletions(-)",
    "diff": "diff --git a/drivers/net/iavf/iavf.h b/drivers/net/iavf/iavf.h\nindex 39c6eeec9..4fe15237a 100644\n--- a/drivers/net/iavf/iavf.h\n+++ b/drivers/net/iavf/iavf.h\n@@ -105,6 +105,7 @@ struct iavf_info {\n \tstruct virtchnl_vf_resource *vf_res; /* VF resource */\n \tstruct virtchnl_vsi_resource *vsi_res; /* LAN VSI */\n \tstruct virtchnl_pkg_info pkg_info; /* package info */\n+\tuint64_t supported_rxdid;\n \n \tvolatile enum virtchnl_ops pend_cmd; /* pending command not finished */\n \tuint32_t cmd_retval; /* return value of the cmd response from PF */\n@@ -233,6 +234,7 @@ int iavf_disable_queues(struct iavf_adapter *adapter);\n int iavf_configure_rss_lut(struct iavf_adapter *adapter);\n int iavf_configure_rss_key(struct iavf_adapter *adapter);\n int iavf_configure_queues(struct iavf_adapter *adapter);\n+int iavf_get_supported_rxdid(struct iavf_adapter *adapter);\n int iavf_query_package_info(struct iavf_adapter *adapter);\n int iavf_config_irq_map(struct iavf_adapter *adapter);\n void iavf_add_del_all_mac_addr(struct iavf_adapter *adapter, bool add);\ndiff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c\nindex 9c8f789da..f7b2562c1 100644\n--- a/drivers/net/iavf/iavf_ethdev.c\n+++ b/drivers/net/iavf/iavf_ethdev.c\n@@ -1243,6 +1243,14 @@ iavf_init_vf(struct rte_eth_dev *dev)\n \t\t\tgoto err_rss;\n \t\t}\n \t}\n+\n+\tif (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC) {\n+\t\tif (iavf_get_supported_rxdid(adapter) != 0) {\n+\t\t\tPMD_INIT_LOG(ERR, \"failed to do get supported rxdid\");\n+\t\t\tgoto err_rss;\n+\t\t}\n+\t}\n+\n \treturn 0;\n err_rss:\n \trte_free(vf->rss_key);\ndiff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c\nindex fbb18a713..b9b35bdbb 100644\n--- a/drivers/net/iavf/iavf_rxtx.c\n+++ b/drivers/net/iavf/iavf_rxtx.c\n@@ -718,6 +718,20 @@ iavf_rxd_to_vlan_tci(struct rte_mbuf *mb, volatile union iavf_rx_desc *rxdp)\n \t}\n }\n \n+static inline void\n+iavf_flex_rxd_to_vlan_tci(struct rte_mbuf *mb,\n+\t\t\t  volatile union iavf_rx_flex_desc *rxdp)\n+{\n+\tif (rte_le_to_cpu_64(rxdp->wb.status_error0) &\n+\t\t(1 << IAVF_RX_FLEX_DESC_STATUS0_L2TAG1P_S)) {\n+\t\tmb->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;\n+\t\tmb->vlan_tci =\n+\t\t\trte_le_to_cpu_16(rxdp->wb.l2tag1);\n+\t} else {\n+\t\tmb->vlan_tci = 0;\n+\t}\n+}\n+\n /* Translate the rx descriptor status and error fields to pkt flags */\n static inline uint64_t\n iavf_rxd_to_pkt_flags(uint64_t qword)\n@@ -752,6 +766,63 @@ iavf_rxd_to_pkt_flags(uint64_t qword)\n \treturn flags;\n }\n \n+/* Translate the rx flex descriptor status to pkt flags */\n+static inline void\n+iavf_rxd_to_pkt_fields(struct rte_mbuf *mb,\n+\t\t       volatile union iavf_rx_flex_desc *rxdp)\n+{\n+\tvolatile struct iavf_32b_rx_flex_desc_comms_ovs *desc =\n+\t\t\t(volatile struct iavf_32b_rx_flex_desc_comms_ovs *)rxdp;\n+\tuint16_t stat_err;\n+\n+#ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC\n+\tstat_err = rte_le_to_cpu_16(desc->status_error0);\n+\tif (likely(stat_err & (1 << IAVF_RX_FLEX_DESC_STATUS0_RSS_VALID_S))) {\n+\t\tmb->ol_flags |= PKT_RX_RSS_HASH;\n+\t\tmb->hash.rss = rte_le_to_cpu_32(desc->rss_hash);\n+\t}\n+#endif\n+}\n+\n+#define IAVF_RX_FLEX_ERR0_BITS\t\\\n+\t((1 << IAVF_RX_FLEX_DESC_STATUS0_HBO_S) |\t\\\n+\t (1 << IAVF_RX_FLEX_DESC_STATUS0_XSUM_IPE_S) |\t\\\n+\t (1 << IAVF_RX_FLEX_DESC_STATUS0_XSUM_L4E_S) |\t\\\n+\t (1 << IAVF_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S) |\t\\\n+\t (1 << IAVF_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S) |\t\\\n+\t (1 << IAVF_RX_FLEX_DESC_STATUS0_RXE_S))\n+\n+/* Rx L3/L4 checksum */\n+static inline uint64_t\n+iavf_flex_rxd_error_to_pkt_flags(uint16_t stat_err0)\n+{\n+\tuint64_t flags = 0;\n+\n+\t/* check if HW has decoded the packet and checksum */\n+\tif (unlikely(!(stat_err0 & (1 << IAVF_RX_FLEX_DESC_STATUS0_L3L4P_S))))\n+\t\treturn 0;\n+\n+\tif (likely(!(stat_err0 & IAVF_RX_FLEX_ERR0_BITS))) {\n+\t\tflags |= (PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_GOOD);\n+\t\treturn flags;\n+\t}\n+\n+\tif (unlikely(stat_err0 & (1 << IAVF_RX_FLEX_DESC_STATUS0_XSUM_IPE_S)))\n+\t\tflags |= PKT_RX_IP_CKSUM_BAD;\n+\telse\n+\t\tflags |= PKT_RX_IP_CKSUM_GOOD;\n+\n+\tif (unlikely(stat_err0 & (1 << IAVF_RX_FLEX_DESC_STATUS0_XSUM_L4E_S)))\n+\t\tflags |= PKT_RX_L4_CKSUM_BAD;\n+\telse\n+\t\tflags |= PKT_RX_L4_CKSUM_GOOD;\n+\n+\tif (unlikely(stat_err0 & (1 << IAVF_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S)))\n+\t\tflags |= PKT_RX_EIP_CKSUM_BAD;\n+\n+\treturn flags;\n+}\n+\n /* implement recv_pkts */\n uint16_t\n iavf_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n@@ -873,6 +944,289 @@ iavf_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n \treturn nb_rx;\n }\n \n+/* implement recv_pkts for flexible Rx descriptor */\n+uint16_t\n+iavf_recv_pkts_flex_rxd(void *rx_queue,\n+\t\t\tstruct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n+{\n+\tvolatile union iavf_rx_desc *rx_ring;\n+\tvolatile union iavf_rx_flex_desc *rxdp;\n+\tstruct iavf_rx_queue *rxq;\n+\tunion iavf_rx_flex_desc rxd;\n+\tstruct rte_mbuf *rxe;\n+\tstruct rte_eth_dev *dev;\n+\tstruct rte_mbuf *rxm;\n+\tstruct rte_mbuf *nmb;\n+\tuint16_t nb_rx;\n+\tuint16_t rx_stat_err0;\n+\tuint16_t rx_packet_len;\n+\tuint16_t rx_id, nb_hold;\n+\tuint64_t dma_addr;\n+\tuint64_t pkt_flags;\n+\tconst uint32_t *ptype_tbl;\n+\n+\tnb_rx = 0;\n+\tnb_hold = 0;\n+\trxq = rx_queue;\n+\trx_id = rxq->rx_tail;\n+\trx_ring = rxq->rx_ring;\n+\tptype_tbl = rxq->vsi->adapter->ptype_tbl;\n+\n+\twhile (nb_rx < nb_pkts) {\n+\t\trxdp = (volatile union iavf_rx_flex_desc *)&rx_ring[rx_id];\n+\t\trx_stat_err0 = rte_le_to_cpu_16(rxdp->wb.status_error0);\n+\n+\t\t/* Check the DD bit first */\n+\t\tif (!(rx_stat_err0 & (1 << IAVF_RX_FLEX_DESC_STATUS0_DD_S)))\n+\t\t\tbreak;\n+\t\tIAVF_DUMP_RX_DESC(rxq, rxdp, rx_id);\n+\n+\t\tnmb = rte_mbuf_raw_alloc(rxq->mp);\n+\t\tif (unlikely(!nmb)) {\n+\t\t\tdev = &rte_eth_devices[rxq->port_id];\n+\t\t\tdev->data->rx_mbuf_alloc_failed++;\n+\t\t\tPMD_RX_LOG(DEBUG, \"RX mbuf alloc failed port_id=%u \"\n+\t\t\t\t   \"queue_id=%u\", rxq->port_id, rxq->queue_id);\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\trxd = *rxdp;\n+\t\tnb_hold++;\n+\t\trxe = rxq->sw_ring[rx_id];\n+\t\trx_id++;\n+\t\tif (unlikely(rx_id == rxq->nb_rx_desc))\n+\t\t\trx_id = 0;\n+\n+\t\t/* Prefetch next mbuf */\n+\t\trte_prefetch0(rxq->sw_ring[rx_id]);\n+\n+\t\t/* When next RX descriptor is on a cache line boundary,\n+\t\t * prefetch the next 4 RX descriptors and next 8 pointers\n+\t\t * to mbufs.\n+\t\t */\n+\t\tif ((rx_id & 0x3) == 0) {\n+\t\t\trte_prefetch0(&rx_ring[rx_id]);\n+\t\t\trte_prefetch0(rxq->sw_ring[rx_id]);\n+\t\t}\n+\t\trxm = rxe;\n+\t\trxe = nmb;\n+\t\tdma_addr =\n+\t\t\trte_cpu_to_le_64(rte_mbuf_data_iova_default(nmb));\n+\t\trxdp->read.hdr_addr = 0;\n+\t\trxdp->read.pkt_addr = dma_addr;\n+\n+\t\trx_packet_len = (rte_le_to_cpu_16(rxd.wb.pkt_len) &\n+\t\t\t\tIAVF_RX_FLX_DESC_PKT_LEN_M) - rxq->crc_len;\n+\n+\t\trxm->data_off = RTE_PKTMBUF_HEADROOM;\n+\t\trte_prefetch0(RTE_PTR_ADD(rxm->buf_addr, RTE_PKTMBUF_HEADROOM));\n+\t\trxm->nb_segs = 1;\n+\t\trxm->next = NULL;\n+\t\trxm->pkt_len = rx_packet_len;\n+\t\trxm->data_len = rx_packet_len;\n+\t\trxm->port = rxq->port_id;\n+\t\trxm->ol_flags = 0;\n+\t\trxm->packet_type = ptype_tbl[IAVF_RX_FLEX_DESC_PTYPE_M &\n+\t\t\trte_le_to_cpu_16(rxd.wb.ptype_flex_flags0)];\n+\t\tiavf_flex_rxd_to_vlan_tci(rxm, &rxd);\n+\t\tiavf_rxd_to_pkt_fields(rxm, &rxd);\n+\t\tpkt_flags = iavf_flex_rxd_error_to_pkt_flags(rx_stat_err0);\n+\t\trxm->ol_flags |= pkt_flags;\n+\n+\t\trx_pkts[nb_rx++] = rxm;\n+\t}\n+\trxq->rx_tail = rx_id;\n+\n+\t/* If the number of free RX descriptors is greater than the RX free\n+\t * threshold of the queue, advance the receive tail register of queue.\n+\t * Update that register with the value of the last processed RX\n+\t * descriptor minus 1.\n+\t */\n+\tnb_hold = (uint16_t)(nb_hold + rxq->nb_rx_hold);\n+\tif (nb_hold > rxq->rx_free_thresh) {\n+\t\tPMD_RX_LOG(DEBUG, \"port_id=%u queue_id=%u rx_tail=%u \"\n+\t\t\t   \"nb_hold=%u nb_rx=%u\",\n+\t\t\t   rxq->port_id, rxq->queue_id,\n+\t\t\t   rx_id, nb_hold, nb_rx);\n+\t\trx_id = (uint16_t)((rx_id == 0) ?\n+\t\t\t(rxq->nb_rx_desc - 1) : (rx_id - 1));\n+\t\tIAVF_PCI_REG_WRITE(rxq->qrx_tail, rx_id);\n+\t\tnb_hold = 0;\n+\t}\n+\trxq->nb_rx_hold = nb_hold;\n+\n+\treturn nb_rx;\n+}\n+\n+/* implement recv_scattered_pkts for flexible Rx descriptor */\n+uint16_t\n+iavf_recv_scattered_pkts_flex_rxd(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\t\t\t\t  uint16_t nb_pkts)\n+{\n+\tstruct iavf_rx_queue *rxq = rx_queue;\n+\tunion iavf_rx_flex_desc rxd;\n+\tstruct rte_mbuf *rxe;\n+\tstruct rte_mbuf *first_seg = rxq->pkt_first_seg;\n+\tstruct rte_mbuf *last_seg = rxq->pkt_last_seg;\n+\tstruct rte_mbuf *nmb, *rxm;\n+\tuint16_t rx_id = rxq->rx_tail;\n+\tuint16_t nb_rx = 0, nb_hold = 0, rx_packet_len;\n+\tstruct rte_eth_dev *dev;\n+\tuint16_t rx_stat_err0;\n+\tuint64_t dma_addr;\n+\tuint64_t pkt_flags;\n+\n+\tvolatile union iavf_rx_desc *rx_ring = rxq->rx_ring;\n+\tvolatile union iavf_rx_flex_desc *rxdp;\n+\tconst uint32_t *ptype_tbl = rxq->vsi->adapter->ptype_tbl;\n+\n+\twhile (nb_rx < nb_pkts) {\n+\t\trxdp = (volatile union iavf_rx_flex_desc *)&rx_ring[rx_id];\n+\t\trx_stat_err0 = rte_le_to_cpu_16(rxdp->wb.status_error0);\n+\n+\t\t/* Check the DD bit */\n+\t\tif (!(rx_stat_err0 & (1 << IAVF_RX_FLEX_DESC_STATUS0_DD_S)))\n+\t\t\tbreak;\n+\t\tIAVF_DUMP_RX_DESC(rxq, rxdp, rx_id);\n+\n+\t\tnmb = rte_mbuf_raw_alloc(rxq->mp);\n+\t\tif (unlikely(!nmb)) {\n+\t\t\tPMD_RX_LOG(DEBUG, \"RX mbuf alloc failed port_id=%u \"\n+\t\t\t\t   \"queue_id=%u\", rxq->port_id, rxq->queue_id);\n+\t\t\tdev = &rte_eth_devices[rxq->port_id];\n+\t\t\tdev->data->rx_mbuf_alloc_failed++;\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\trxd = *rxdp;\n+\t\tnb_hold++;\n+\t\trxe = rxq->sw_ring[rx_id];\n+\t\trx_id++;\n+\t\tif (rx_id == rxq->nb_rx_desc)\n+\t\t\trx_id = 0;\n+\n+\t\t/* Prefetch next mbuf */\n+\t\trte_prefetch0(rxq->sw_ring[rx_id]);\n+\n+\t\t/* When next RX descriptor is on a cache line boundary,\n+\t\t * prefetch the next 4 RX descriptors and next 8 pointers\n+\t\t * to mbufs.\n+\t\t */\n+\t\tif ((rx_id & 0x3) == 0) {\n+\t\t\trte_prefetch0(&rx_ring[rx_id]);\n+\t\t\trte_prefetch0(rxq->sw_ring[rx_id]);\n+\t\t}\n+\n+\t\trxm = rxe;\n+\t\trxe = nmb;\n+\t\tdma_addr =\n+\t\t\trte_cpu_to_le_64(rte_mbuf_data_iova_default(nmb));\n+\n+\t\t/* Set data buffer address and data length of the mbuf */\n+\t\trxdp->read.hdr_addr = 0;\n+\t\trxdp->read.pkt_addr = dma_addr;\n+\t\trx_packet_len = rte_le_to_cpu_16(rxd.wb.pkt_len) &\n+\t\t\t\tIAVF_RX_FLX_DESC_PKT_LEN_M;\n+\t\trxm->data_len = rx_packet_len;\n+\t\trxm->data_off = RTE_PKTMBUF_HEADROOM;\n+\n+\t\t/* If this is the first buffer of the received packet, set the\n+\t\t * pointer to the first mbuf of the packet and initialize its\n+\t\t * context. Otherwise, update the total length and the number\n+\t\t * of segments of the current scattered packet, and update the\n+\t\t * pointer to the last mbuf of the current packet.\n+\t\t */\n+\t\tif (!first_seg) {\n+\t\t\tfirst_seg = rxm;\n+\t\t\tfirst_seg->nb_segs = 1;\n+\t\t\tfirst_seg->pkt_len = rx_packet_len;\n+\t\t} else {\n+\t\t\tfirst_seg->pkt_len =\n+\t\t\t\t(uint16_t)(first_seg->pkt_len +\n+\t\t\t\t\t\trx_packet_len);\n+\t\t\tfirst_seg->nb_segs++;\n+\t\t\tlast_seg->next = rxm;\n+\t\t}\n+\n+\t\t/* If this is not the last buffer of the received packet,\n+\t\t * update the pointer to the last mbuf of the current scattered\n+\t\t * packet and continue to parse the RX ring.\n+\t\t */\n+\t\tif (!(rx_stat_err0 & (1 << IAVF_RX_FLEX_DESC_STATUS0_EOF_S))) {\n+\t\t\tlast_seg = rxm;\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\t/* This is the last buffer of the received packet. If the CRC\n+\t\t * is not stripped by the hardware:\n+\t\t *  - Subtract the CRC length from the total packet length.\n+\t\t *  - If the last buffer only contains the whole CRC or a part\n+\t\t *  of it, free the mbuf associated to the last buffer. If part\n+\t\t *  of the CRC is also contained in the previous mbuf, subtract\n+\t\t *  the length of that CRC part from the data length of the\n+\t\t *  previous mbuf.\n+\t\t */\n+\t\trxm->next = NULL;\n+\t\tif (unlikely(rxq->crc_len > 0)) {\n+\t\t\tfirst_seg->pkt_len -= RTE_ETHER_CRC_LEN;\n+\t\t\tif (rx_packet_len <= RTE_ETHER_CRC_LEN) {\n+\t\t\t\trte_pktmbuf_free_seg(rxm);\n+\t\t\t\tfirst_seg->nb_segs--;\n+\t\t\t\tlast_seg->data_len =\n+\t\t\t\t\t(uint16_t)(last_seg->data_len -\n+\t\t\t\t\t(RTE_ETHER_CRC_LEN - rx_packet_len));\n+\t\t\t\tlast_seg->next = NULL;\n+\t\t\t} else {\n+\t\t\t\trxm->data_len = (uint16_t)(rx_packet_len -\n+\t\t\t\t\t\t\tRTE_ETHER_CRC_LEN);\n+\t\t\t}\n+\t\t}\n+\n+\t\tfirst_seg->port = rxq->port_id;\n+\t\tfirst_seg->ol_flags = 0;\n+\t\tfirst_seg->packet_type = ptype_tbl[IAVF_RX_FLEX_DESC_PTYPE_M &\n+\t\t\trte_le_to_cpu_16(rxd.wb.ptype_flex_flags0)];\n+\t\tiavf_flex_rxd_to_vlan_tci(first_seg, &rxd);\n+\t\tiavf_rxd_to_pkt_fields(first_seg, &rxd);\n+\t\tpkt_flags = iavf_flex_rxd_error_to_pkt_flags(rx_stat_err0);\n+\n+\t\tfirst_seg->ol_flags |= pkt_flags;\n+\n+\t\t/* Prefetch data of first segment, if configured to do so. */\n+\t\trte_prefetch0(RTE_PTR_ADD(first_seg->buf_addr,\n+\t\t\t\t\t  first_seg->data_off));\n+\t\trx_pkts[nb_rx++] = first_seg;\n+\t\tfirst_seg = NULL;\n+\t}\n+\n+\t/* Record index of the next RX descriptor to probe. */\n+\trxq->rx_tail = rx_id;\n+\trxq->pkt_first_seg = first_seg;\n+\trxq->pkt_last_seg = last_seg;\n+\n+\t/* If the number of free RX descriptors is greater than the RX free\n+\t * threshold of the queue, advance the Receive Descriptor Tail (RDT)\n+\t * register. Update the RDT with the value of the last processed RX\n+\t * descriptor minus 1, to guarantee that the RDT register is never\n+\t * equal to the RDH register, which creates a \"full\" ring situtation\n+\t * from the hardware point of view.\n+\t */\n+\tnb_hold = (uint16_t)(nb_hold + rxq->nb_rx_hold);\n+\tif (nb_hold > rxq->rx_free_thresh) {\n+\t\tPMD_RX_LOG(DEBUG, \"port_id=%u queue_id=%u rx_tail=%u \"\n+\t\t\t   \"nb_hold=%u nb_rx=%u\",\n+\t\t\t   rxq->port_id, rxq->queue_id,\n+\t\t\t   rx_id, nb_hold, nb_rx);\n+\t\trx_id = (uint16_t)(rx_id == 0 ?\n+\t\t\t(rxq->nb_rx_desc - 1) : (rx_id - 1));\n+\t\tIAVF_PCI_REG_WRITE(rxq->qrx_tail, rx_id);\n+\t\tnb_hold = 0;\n+\t}\n+\trxq->nb_rx_hold = nb_hold;\n+\n+\treturn nb_rx;\n+}\n+\n /* implement recv_scattered_pkts  */\n uint16_t\n iavf_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n@@ -1049,6 +1403,82 @@ iavf_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n }\n \n #define IAVF_LOOK_AHEAD 8\n+static inline int\n+iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq)\n+{\n+\tvolatile union iavf_rx_flex_desc *rxdp;\n+\tstruct rte_mbuf **rxep;\n+\tstruct rte_mbuf *mb;\n+\tuint16_t stat_err0;\n+\tuint16_t pkt_len;\n+\tint32_t s[IAVF_LOOK_AHEAD], nb_dd;\n+\tint32_t i, j, nb_rx = 0;\n+\tuint64_t pkt_flags;\n+\tconst uint32_t *ptype_tbl = rxq->vsi->adapter->ptype_tbl;\n+\n+\trxdp = (volatile union iavf_rx_flex_desc *)&rxq->rx_ring[rxq->rx_tail];\n+\trxep = &rxq->sw_ring[rxq->rx_tail];\n+\n+\tstat_err0 = rte_le_to_cpu_16(rxdp->wb.status_error0);\n+\n+\t/* Make sure there is at least 1 packet to receive */\n+\tif (!(stat_err0 & (1 << IAVF_RX_FLEX_DESC_STATUS0_DD_S)))\n+\t\treturn 0;\n+\n+\t/* Scan LOOK_AHEAD descriptors at a time to determine which\n+\t * descriptors reference packets that are ready to be received.\n+\t */\n+\tfor (i = 0; i < IAVF_RX_MAX_BURST; i += IAVF_LOOK_AHEAD,\n+\t     rxdp += IAVF_LOOK_AHEAD, rxep += IAVF_LOOK_AHEAD) {\n+\t\t/* Read desc statuses backwards to avoid race condition */\n+\t\tfor (j = IAVF_LOOK_AHEAD - 1; j >= 0; j--)\n+\t\t\ts[j] = rte_le_to_cpu_16(rxdp[j].wb.status_error0);\n+\n+\t\trte_smp_rmb();\n+\n+\t\t/* Compute how many status bits were set */\n+\t\tfor (j = 0, nb_dd = 0; j < IAVF_LOOK_AHEAD; j++)\n+\t\t\tnb_dd += s[j] & (1 << IAVF_RX_FLEX_DESC_STATUS0_DD_S);\n+\n+\t\tnb_rx += nb_dd;\n+\n+\t\t/* Translate descriptor info to mbuf parameters */\n+\t\tfor (j = 0; j < nb_dd; j++) {\n+\t\t\tIAVF_DUMP_RX_DESC(rxq, &rxdp[j],\n+\t\t\t\t\t  rxq->rx_tail +\n+\t\t\t\t\t  i * IAVF_LOOK_AHEAD + j);\n+\n+\t\t\tmb = rxep[j];\n+\t\t\tpkt_len = (rte_le_to_cpu_16(rxdp[j].wb.pkt_len) &\n+\t\t\t\tIAVF_RX_FLX_DESC_PKT_LEN_M) - rxq->crc_len;\n+\t\t\tmb->data_len = pkt_len;\n+\t\t\tmb->pkt_len = pkt_len;\n+\t\t\tmb->ol_flags = 0;\n+\n+\t\t\tmb->packet_type = ptype_tbl[IAVF_RX_FLEX_DESC_PTYPE_M &\n+\t\t\t\trte_le_to_cpu_16(rxdp[j].wb.ptype_flex_flags0)];\n+\t\t\tiavf_flex_rxd_to_vlan_tci(mb, &rxdp[j]);\n+\t\t\tiavf_rxd_to_pkt_fields(mb, &rxdp[j]);\n+\t\t\tstat_err0 = rte_le_to_cpu_16(rxdp[j].wb.status_error0);\n+\t\t\tpkt_flags = iavf_flex_rxd_error_to_pkt_flags(stat_err0);\n+\n+\t\t\tmb->ol_flags |= pkt_flags;\n+\t\t}\n+\n+\t\tfor (j = 0; j < IAVF_LOOK_AHEAD; j++)\n+\t\t\trxq->rx_stage[i + j] = rxep[j];\n+\n+\t\tif (nb_dd != IAVF_LOOK_AHEAD)\n+\t\t\tbreak;\n+\t}\n+\n+\t/* Clear software ring entries */\n+\tfor (i = 0; i < nb_rx; i++)\n+\t\trxq->sw_ring[rxq->rx_tail + i] = NULL;\n+\n+\treturn nb_rx;\n+}\n+\n static inline int\n iavf_rx_scan_hw_ring(struct iavf_rx_queue *rxq)\n {\n@@ -1217,7 +1647,10 @@ rx_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n \tif (rxq->rx_nb_avail)\n \t\treturn iavf_rx_fill_from_stage(rxq, rx_pkts, nb_pkts);\n \n-\tnb_rx = (uint16_t)iavf_rx_scan_hw_ring(rxq);\n+\tif (rxq->rxdid == IAVF_RXDID_COMMS_OVS_1)\n+\t\tnb_rx = (uint16_t)iavf_rx_scan_hw_ring_flex_rxd(rxq);\n+\telse\n+\t\tnb_rx = (uint16_t)iavf_rx_scan_hw_ring(rxq);\n \trxq->rx_next_avail = 0;\n \trxq->rx_nb_avail = nb_rx;\n \trxq->rx_tail = (uint16_t)(rxq->rx_tail + nb_rx);\n@@ -1661,6 +2094,7 @@ iavf_set_rx_function(struct rte_eth_dev *dev)\n {\n \tstruct iavf_adapter *adapter =\n \t\tIAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n+\tstruct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);\n #ifdef RTE_ARCH_X86\n \tstruct iavf_rx_queue *rxq;\n \tint i;\n@@ -1700,7 +2134,10 @@ iavf_set_rx_function(struct rte_eth_dev *dev)\n \tif (dev->data->scattered_rx) {\n \t\tPMD_DRV_LOG(DEBUG, \"Using a Scattered Rx callback (port=%d).\",\n \t\t\t    dev->data->port_id);\n-\t\tdev->rx_pkt_burst = iavf_recv_scattered_pkts;\n+\t\tif (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC)\n+\t\t\tdev->rx_pkt_burst = iavf_recv_scattered_pkts_flex_rxd;\n+\t\telse\n+\t\t\tdev->rx_pkt_burst = iavf_recv_scattered_pkts;\n \t} else if (adapter->rx_bulk_alloc_allowed) {\n \t\tPMD_DRV_LOG(DEBUG, \"Using bulk Rx callback (port=%d).\",\n \t\t\t    dev->data->port_id);\n@@ -1708,7 +2145,10 @@ iavf_set_rx_function(struct rte_eth_dev *dev)\n \t} else {\n \t\tPMD_DRV_LOG(DEBUG, \"Using Basic Rx callback (port=%d).\",\n \t\t\t    dev->data->port_id);\n-\t\tdev->rx_pkt_burst = iavf_recv_pkts;\n+\t\tif (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC)\n+\t\t\tdev->rx_pkt_burst = iavf_recv_pkts_flex_rxd;\n+\t\telse\n+\t\t\tdev->rx_pkt_burst = iavf_recv_pkts;\n \t}\n }\n \n@@ -1784,6 +2224,35 @@ iavf_dev_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n \tqinfo->conf.tx_deferred_start = txq->tx_deferred_start;\n }\n \n+/* Get the number of used descriptors of a rx queue for flexible RXD */\n+uint32_t\n+iavf_dev_rxq_count_flex_rxd(struct rte_eth_dev *dev, uint16_t queue_id)\n+{\n+#define IAVF_RXQ_SCAN_INTERVAL 4\n+\tvolatile union iavf_rx_flex_desc *rxdp;\n+\tstruct iavf_rx_queue *rxq;\n+\tuint16_t desc = 0;\n+\n+\trxq = dev->data->rx_queues[queue_id];\n+\trxdp = (volatile union iavf_rx_flex_desc *)&rxq->rx_ring[rxq->rx_tail];\n+\twhile ((desc < rxq->nb_rx_desc) &&\n+\t       rte_le_to_cpu_16(rxdp->wb.status_error0) &\n+\t       (1 << IAVF_RX_FLEX_DESC_STATUS0_DD_S)) {\n+\t\t/* Check the DD bit of a rx descriptor of each 4 in a group,\n+\t\t * to avoid checking too frequently and downgrading performance\n+\t\t * too much.\n+\t\t */\n+\t\tdesc += IAVF_RXQ_SCAN_INTERVAL;\n+\t\trxdp += IAVF_RXQ_SCAN_INTERVAL;\n+\t\tif (rxq->rx_tail + desc >= rxq->nb_rx_desc)\n+\t\t\trxdp = (volatile union iavf_rx_flex_desc *)\n+\t\t\t\t&(rxq->rx_ring[rxq->rx_tail +\n+\t\t\t\t\tdesc - rxq->nb_rx_desc]);\n+\t}\n+\n+\treturn desc;\n+}\n+\n /* Get the number of used descriptors of a rx queue */\n uint32_t\n iavf_dev_rxq_count(struct rte_eth_dev *dev, uint16_t queue_id)\n@@ -1795,6 +2264,10 @@ iavf_dev_rxq_count(struct rte_eth_dev *dev, uint16_t queue_id)\n \n \trxq = dev->data->rx_queues[queue_id];\n \trxdp = &rxq->rx_ring[rxq->rx_tail];\n+\n+\tif (rxq->rxdid == IAVF_RXDID_COMMS_OVS_1)\n+\t\treturn iavf_dev_rxq_count_flex_rxd(dev, queue_id);\n+\n \twhile ((desc < rxq->nb_rx_desc) &&\n \t       ((rte_le_to_cpu_64(rxdp->wb.qword1.status_error_len) &\n \t\t IAVF_RXD_QW1_STATUS_MASK) >> IAVF_RXD_QW1_STATUS_SHIFT) &\n@@ -1813,6 +2286,31 @@ iavf_dev_rxq_count(struct rte_eth_dev *dev, uint16_t queue_id)\n \treturn desc;\n }\n \n+int\n+iavf_dev_rx_desc_status_flex_rxd(void *rx_queue, uint16_t offset)\n+{\n+\tvolatile union iavf_rx_flex_desc *rxdp;\n+\tstruct iavf_rx_queue *rxq = rx_queue;\n+\tuint32_t desc;\n+\n+\tif (unlikely(offset >= rxq->nb_rx_desc))\n+\t\treturn -EINVAL;\n+\n+\tif (offset >= rxq->nb_rx_desc - rxq->nb_rx_hold)\n+\t\treturn RTE_ETH_RX_DESC_UNAVAIL;\n+\n+\tdesc = rxq->rx_tail + offset;\n+\tif (desc >= rxq->nb_rx_desc)\n+\t\tdesc -= rxq->nb_rx_desc;\n+\n+\trxdp = (volatile union iavf_rx_flex_desc *)&rxq->rx_ring[desc];\n+\tif (rte_le_to_cpu_16(rxdp->wb.status_error0) &\n+\t\t(1 << IAVF_RX_FLEX_DESC_STATUS0_DD_S))\n+\t\treturn RTE_ETH_RX_DESC_DONE;\n+\n+\treturn RTE_ETH_RX_DESC_AVAIL;\n+}\n+\n int\n iavf_dev_rx_desc_status(void *rx_queue, uint16_t offset)\n {\n@@ -1821,6 +2319,9 @@ iavf_dev_rx_desc_status(void *rx_queue, uint16_t offset)\n \tuint64_t mask;\n \tuint32_t desc;\n \n+\tif (rxq->rxdid == IAVF_RXDID_COMMS_OVS_1)\n+\t\treturn iavf_dev_rx_desc_status_flex_rxd(rx_queue, offset);\n+\n \tif (unlikely(offset >= rxq->nb_rx_desc))\n \t\treturn -EINVAL;\n \ndiff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h\nindex 416433504..ee306d400 100644\n--- a/drivers/net/iavf/iavf_rxtx.h\n+++ b/drivers/net/iavf/iavf_rxtx.h\n@@ -59,6 +59,7 @@\n \n /* HW desc structure, only 32-byte type is supported */\n #define iavf_rx_desc iavf_32byte_rx_desc\n+#define iavf_rx_flex_desc iavf_32b_rx_flex_desc\n \n struct iavf_rxq_ops {\n \tvoid (*release_mbufs)(struct iavf_rx_queue *rxq);\n@@ -83,6 +84,7 @@ struct iavf_rx_queue {\n \tstruct rte_mbuf *pkt_first_seg; /* first segment of current packet */\n \tstruct rte_mbuf *pkt_last_seg;  /* last segment of current packet */\n \tstruct rte_mbuf fake_mbuf;      /* dummy mbuf */\n+\tuint8_t rxdid;\n \n \t/* used for VPMD */\n \tuint16_t rxrearm_nb;       /* number of remaining to be re-armed */\n@@ -175,9 +177,15 @@ void iavf_dev_tx_queue_release(void *txq);\n void iavf_stop_queues(struct rte_eth_dev *dev);\n uint16_t iavf_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\t       uint16_t nb_pkts);\n+uint16_t iavf_recv_pkts_flex_rxd(void *rx_queue,\n+\t\t\t\t struct rte_mbuf **rx_pkts,\n+\t\t\t\t uint16_t nb_pkts);\n uint16_t iavf_recv_scattered_pkts(void *rx_queue,\n \t\t\t\t struct rte_mbuf **rx_pkts,\n \t\t\t\t uint16_t nb_pkts);\n+uint16_t iavf_recv_scattered_pkts_flex_rxd(void *rx_queue,\n+\t\t\t\t\t   struct rte_mbuf **rx_pkts,\n+\t\t\t\t\t   uint16_t nb_pkts);\n uint16_t iavf_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t       uint16_t nb_pkts);\n uint16_t iavf_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n@@ -189,7 +197,10 @@ void iavf_dev_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n void iavf_dev_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n \t\t\t  struct rte_eth_txq_info *qinfo);\n uint32_t iavf_dev_rxq_count(struct rte_eth_dev *dev, uint16_t queue_id);\n+uint32_t iavf_dev_rxq_count_flex_rxd(struct rte_eth_dev *dev,\n+\t\t\t\t     uint16_t queue_id);\n int iavf_dev_rx_desc_status(void *rx_queue, uint16_t offset);\n+int iavf_dev_rx_desc_status_flex_rxd(void *rx_queue, uint16_t offset);\n int iavf_dev_tx_desc_status(void *tx_queue, uint16_t offset);\n \n uint16_t iavf_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,\ndiff --git a/drivers/net/iavf/iavf_vchnl.c b/drivers/net/iavf/iavf_vchnl.c\nindex 288d34e8b..f0c283472 100644\n--- a/drivers/net/iavf/iavf_vchnl.c\n+++ b/drivers/net/iavf/iavf_vchnl.c\n@@ -89,6 +89,7 @@ iavf_execute_vf_cmd(struct iavf_adapter *adapter, struct iavf_cmd_info *args)\n \tcase VIRTCHNL_OP_VERSION:\n \tcase VIRTCHNL_OP_GET_VF_RESOURCES:\n \tcase VIRTCHNL_OP_PACKAGE_INFO:\n+\tcase VIRTCHNL_OP_RXDID:\n \t\t/* for init virtchnl ops, need to poll the response */\n \t\tdo {\n \t\t\tret = iavf_read_msg_from_pf(adapter, args->out_size,\n@@ -340,7 +341,8 @@ iavf_get_vf_resource(struct iavf_adapter *adapter)\n \t */\n \n \tcaps = IAVF_BASIC_OFFLOAD_CAPS | VIRTCHNL_VF_CAP_ADV_LINK_SPEED |\n-\t\tVIRTCHNL_VF_OFFLOAD_QUERY_DDP;\n+\t\tVIRTCHNL_VF_OFFLOAD_QUERY_DDP |\n+\t\tVIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC;\n \n \targs.in_args = (uint8_t *)&caps;\n \targs.in_args_size = sizeof(caps);\n@@ -377,6 +379,31 @@ iavf_get_vf_resource(struct iavf_adapter *adapter)\n \treturn 0;\n }\n \n+int\n+iavf_get_supported_rxdid(struct iavf_adapter *adapter)\n+{\n+\tstruct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter);\n+\tstruct iavf_cmd_info args;\n+\tint ret;\n+\n+\targs.ops = VIRTCHNL_OP_RXDID;\n+\targs.in_args = NULL;\n+\targs.in_args_size = 0;\n+\targs.out_buffer = vf->aq_resp;\n+\targs.out_size = IAVF_AQ_BUF_SZ;\n+\n+\tret = iavf_execute_vf_cmd(adapter, &args);\n+\tif (ret) {\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t    \"Failed to execute command of OP_RXDID\");\n+\t\treturn ret;\n+\t}\n+\n+\tvf->supported_rxdid = *(uint64_t *)args.out_buffer;\n+\n+\treturn 0;\n+}\n+\n int\n iavf_enable_queues(struct iavf_adapter *adapter)\n {\n@@ -569,6 +596,20 @@ iavf_configure_queues(struct iavf_adapter *adapter)\n \t\t\tvc_qp->rxq.ring_len = rxq[i]->nb_rx_desc;\n \t\t\tvc_qp->rxq.dma_ring_addr = rxq[i]->rx_ring_phys_addr;\n \t\t\tvc_qp->rxq.databuffer_size = rxq[i]->rx_buf_len;\n+\n+\t\t\tif (vf->vf_res->vf_cap_flags &\n+\t\t\t    VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC &&\n+\t\t\t    vf->supported_rxdid & BIT(IAVF_RXDID_COMMS_OVS_1)) {\n+\t\t\t\tvc_qp->rxq.rxdid = IAVF_RXDID_COMMS_OVS_1;\n+\t\t\t\trxq[i]->rxdid = IAVF_RXDID_COMMS_OVS_1;\n+\t\t\t\tPMD_DRV_LOG(NOTICE, \"request RXDID == %d in \"\n+\t\t\t\t\t    \"Queue[%d]\", vc_qp->rxq.rxdid, i);\n+\t\t\t} else {\n+\t\t\t\tvc_qp->rxq.rxdid = IAVF_RXDID_LEGACY_1;\n+\t\t\t\trxq[i]->rxdid = IAVF_RXDID_LEGACY_1;\n+\t\t\t\tPMD_DRV_LOG(NOTICE, \"request RXDID == %d in \"\n+\t\t\t\t\t    \"Queue[%d]\", vc_qp->rxq.rxdid, i);\n+\t\t\t}\n \t\t}\n \t}\n \n",
    "prefixes": [
        "04/12"
    ]
}