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GET /api/patches/66675/?format=api
{ "id": 66675, "url": "http://patches.dpdk.org/api/patches/66675/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200316074603.10998-2-leyi.rong@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200316074603.10998-2-leyi.rong@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200316074603.10998-2-leyi.rong@intel.com", "date": "2020-03-16T07:45:52", "name": "[01/12] net/iavf: remove 16B Rx descriptor compile option", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "420ce9362b7b6ad7e5625a173b894e06980d26a5", "submitter": { "id": 1204, "url": "http://patches.dpdk.org/api/people/1204/?format=api", "name": "Leyi Rong", "email": "leyi.rong@intel.com" }, "delegate": { "id": 31221, "url": "http://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200316074603.10998-2-leyi.rong@intel.com/mbox/", "series": [ { "id": 8918, "url": "http://patches.dpdk.org/api/series/8918/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8918", "date": "2020-03-16T07:45:51", "name": "framework for advanced iAVF PMD", "version": 1, "mbox": "http://patches.dpdk.org/series/8918/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/66675/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/66675/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2C60EA0559;\n\tMon, 16 Mar 2020 08:57:31 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 63B241C067;\n\tMon, 16 Mar 2020 08:57:26 +0100 (CET)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id E110225D9\n for <dev@dpdk.org>; Mon, 16 Mar 2020 08:57:23 +0100 (CET)", "from orsmga004.jf.intel.com ([10.7.209.38])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 16 Mar 2020 00:57:23 -0700", "from dpdk-lrong-srv-04.sh.intel.com ([10.67.119.221])\n by orsmga004.jf.intel.com with ESMTP; 16 Mar 2020 00:57:22 -0700" ], "IronPort-SDR": [ "\n rPkNDQvrYD9UrYNzWWjID72AsaK3+DmZQb9pqN2ZEwZBYvac47uYIMMcF02sciOMr3nQ+qmkCs\n b/tneK2IXDnA==", "\n IYDWQmRhufZ1XpsFuJTRRw4XaWjQe5Dpfav6v+NI8aBo4CnBvt1pjOFK6x/empSDhnKNUPxIQX\n VAUV5e6BvkMw==" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.70,559,1574150400\"; d=\"scan'208\";a=\"390622485\"", "From": "Leyi Rong <leyi.rong@intel.com>", "To": "qi.z.zhang@intel.com,\n\txiaolong.ye@intel.com", "Cc": "dev@dpdk.org,\n\tLeyi Rong <leyi.rong@intel.com>", "Date": "Mon, 16 Mar 2020 15:45:52 +0800", "Message-Id": "<20200316074603.10998-2-leyi.rong@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200316074603.10998-1-leyi.rong@intel.com>", "References": "<20200316074603.10998-1-leyi.rong@intel.com>", "Subject": "[dpdk-dev] [PATCH 01/12] net/iavf: remove 16B Rx descriptor compile\n\toption", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Remove CONFIG_RTE_LIBRTE_IAVF_16BYTE_RX_DESC as\nit's not supported in ice PF host driver.\n\nSigned-off-by: Leyi Rong <leyi.rong@intel.com>\n---\n config/common_base | 1 -\n drivers/net/iavf/iavf_rxtx.c | 2 -\n drivers/net/iavf/iavf_rxtx.h | 14 +--\n drivers/net/iavf/iavf_rxtx_vec_avx2.c | 148 +++++++-------------------\n 4 files changed, 42 insertions(+), 123 deletions(-)", "diff": "diff --git a/config/common_base b/config/common_base\nindex c31175f9d..eea53cb35 100644\n--- a/config/common_base\n+++ b/config/common_base\n@@ -346,7 +346,6 @@ CONFIG_RTE_LIBRTE_IAVF_DEBUG_TX=n\n CONFIG_RTE_LIBRTE_IAVF_DEBUG_TX_FREE=n\n CONFIG_RTE_LIBRTE_IAVF_DEBUG_RX=n\n CONFIG_RTE_LIBRTE_IAVF_DEBUG_DUMP_DESC=n\n-CONFIG_RTE_LIBRTE_IAVF_16BYTE_RX_DESC=n\n #\n # Compile burst-oriented IPN3KE PMD driver\n #\ndiff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c\nindex 9eccb7c41..fbb18a713 100644\n--- a/drivers/net/iavf/iavf_rxtx.c\n+++ b/drivers/net/iavf/iavf_rxtx.c\n@@ -230,10 +230,8 @@ alloc_rxq_mbufs(struct iavf_rx_queue *rxq)\n \t\trxd = &rxq->rx_ring[i];\n \t\trxd->read.pkt_addr = dma_addr;\n \t\trxd->read.hdr_addr = 0;\n-#ifndef RTE_LIBRTE_IAVF_16BYTE_RX_DESC\n \t\trxd->read.rsvd1 = 0;\n \t\trxd->read.rsvd2 = 0;\n-#endif\n \n \t\trxq->sw_ring[i] = mbuf;\n \t}\ndiff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h\nindex 09b5bd99e..416433504 100644\n--- a/drivers/net/iavf/iavf_rxtx.h\n+++ b/drivers/net/iavf/iavf_rxtx.h\n@@ -57,12 +57,8 @@\n #define IAVF_TX_OFFLOAD_NOTSUP_MASK \\\n \t\t(PKT_TX_OFFLOAD_MASK ^ IAVF_TX_OFFLOAD_MASK)\n \n-/* HW desc structure, both 16-byte and 32-byte types are supported */\n-#ifdef RTE_LIBRTE_IAVF_16BYTE_RX_DESC\n-#define iavf_rx_desc iavf_16byte_rx_desc\n-#else\n+/* HW desc structure, only 32-byte type is supported */\n #define iavf_rx_desc iavf_32byte_rx_desc\n-#endif\n \n struct iavf_rxq_ops {\n \tvoid (*release_mbufs)(struct iavf_rx_queue *rxq);\n@@ -224,20 +220,12 @@ void iavf_dump_rx_descriptor(struct iavf_rx_queue *rxq,\n \t\t\t const volatile void *desc,\n \t\t\t uint16_t rx_id)\n {\n-#ifdef RTE_LIBRTE_IAVF_16BYTE_RX_DESC\n-\tconst volatile union iavf_16byte_rx_desc *rx_desc = desc;\n-\n-\tprintf(\"Queue %d Rx_desc %d: QW0: 0x%016\"PRIx64\" QW1: 0x%016\"PRIx64\"\\n\",\n-\t rxq->queue_id, rx_id, rx_desc->read.pkt_addr,\n-\t rx_desc->read.hdr_addr);\n-#else\n \tconst volatile union iavf_32byte_rx_desc *rx_desc = desc;\n \n \tprintf(\"Queue %d Rx_desc %d: QW0: 0x%016\"PRIx64\" QW1: 0x%016\"PRIx64\n \t \" QW2: 0x%016\"PRIx64\" QW3: 0x%016\"PRIx64\"\\n\", rxq->queue_id,\n \t rx_id, rx_desc->read.pkt_addr, rx_desc->read.hdr_addr,\n \t rx_desc->read.rsvd1, rx_desc->read.rsvd2);\n-#endif\n }\n \n /* All the descriptors are 16 bytes, so just use one of them\ndiff --git a/drivers/net/iavf/iavf_rxtx_vec_avx2.c b/drivers/net/iavf/iavf_rxtx_vec_avx2.c\nindex 2587083d8..4e1231162 100644\n--- a/drivers/net/iavf/iavf_rxtx_vec_avx2.c\n+++ b/drivers/net/iavf/iavf_rxtx_vec_avx2.c\n@@ -40,7 +40,6 @@ iavf_rxq_rearm(struct iavf_rx_queue *rxq)\n \t\treturn;\n \t}\n \n-#ifndef RTE_LIBRTE_IAVF_16BYTE_RX_DESC\n \tstruct rte_mbuf *mb0, *mb1;\n \t__m128i dma_addr0, dma_addr1;\n \t__m128i hdr_room = _mm_set_epi64x(RTE_PKTMBUF_HEADROOM,\n@@ -70,54 +69,6 @@ iavf_rxq_rearm(struct iavf_rx_queue *rxq)\n \t\t_mm_store_si128((__m128i *)&rxdp++->read, dma_addr0);\n \t\t_mm_store_si128((__m128i *)&rxdp++->read, dma_addr1);\n \t}\n-#else\n-\tstruct rte_mbuf *mb0, *mb1, *mb2, *mb3;\n-\t__m256i dma_addr0_1, dma_addr2_3;\n-\t__m256i hdr_room = _mm256_set1_epi64x(RTE_PKTMBUF_HEADROOM);\n-\t/* Initialize the mbufs in vector, process 4 mbufs in one loop */\n-\tfor (i = 0; i < IAVF_RXQ_REARM_THRESH;\n-\t\t\ti += 4, rxp += 4, rxdp += 4) {\n-\t\t__m128i vaddr0, vaddr1, vaddr2, vaddr3;\n-\t\t__m256i vaddr0_1, vaddr2_3;\n-\n-\t\tmb0 = rxp[0];\n-\t\tmb1 = rxp[1];\n-\t\tmb2 = rxp[2];\n-\t\tmb3 = rxp[3];\n-\n-\t\t/* load buf_addr(lo 64bit) and buf_physaddr(hi 64bit) */\n-\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_physaddr) !=\n-\t\t\t\toffsetof(struct rte_mbuf, buf_addr) + 8);\n-\t\tvaddr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);\n-\t\tvaddr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);\n-\t\tvaddr2 = _mm_loadu_si128((__m128i *)&mb2->buf_addr);\n-\t\tvaddr3 = _mm_loadu_si128((__m128i *)&mb3->buf_addr);\n-\n-\t\t/**\n-\t\t * merge 0 & 1, by casting 0 to 256-bit and inserting 1\n-\t\t * into the high lanes. Similarly for 2 & 3\n-\t\t */\n-\t\tvaddr0_1 =\n-\t\t\t_mm256_inserti128_si256(_mm256_castsi128_si256(vaddr0),\n-\t\t\t\t\t\tvaddr1, 1);\n-\t\tvaddr2_3 =\n-\t\t\t_mm256_inserti128_si256(_mm256_castsi128_si256(vaddr2),\n-\t\t\t\t\t\tvaddr3, 1);\n-\n-\t\t/* convert pa to dma_addr hdr/data */\n-\t\tdma_addr0_1 = _mm256_unpackhi_epi64(vaddr0_1, vaddr0_1);\n-\t\tdma_addr2_3 = _mm256_unpackhi_epi64(vaddr2_3, vaddr2_3);\n-\n-\t\t/* add headroom to pa values */\n-\t\tdma_addr0_1 = _mm256_add_epi64(dma_addr0_1, hdr_room);\n-\t\tdma_addr2_3 = _mm256_add_epi64(dma_addr2_3, hdr_room);\n-\n-\t\t/* flush desc with pa dma_addr */\n-\t\t_mm256_store_si256((__m256i *)&rxdp->read, dma_addr0_1);\n-\t\t_mm256_store_si256((__m256i *)&(rxdp + 2)->read, dma_addr2_3);\n-\t}\n-\n-#endif\n \n \trxq->rxrearm_start += IAVF_RXQ_REARM_THRESH;\n \tif (rxq->rxrearm_start >= rxq->nb_rx_desc)\n@@ -149,7 +100,6 @@ _iavf_recv_raw_pkts_vec_avx2(struct iavf_rx_queue *rxq,\n \t/* struct iavf_rx_entry *sw_ring = &rxq->sw_ring[rxq->rx_tail]; */\n \tstruct rte_mbuf **sw_ring = &rxq->sw_ring[rxq->rx_tail];\n \tvolatile union iavf_rx_desc *rxdp = rxq->rx_ring + rxq->rx_tail;\n-\tconst int avx_aligned = ((rxq->rx_tail & 1) == 0);\n \n \trte_prefetch0(rxdp);\n \n@@ -292,8 +242,6 @@ _iavf_recv_raw_pkts_vec_avx2(struct iavf_rx_queue *rxq,\n \t\t\t\t PKT_RX_L4_CKSUM_GOOD | PKT_RX_L4_CKSUM_BAD |\n \t\t\t\t PKT_RX_EIP_CKSUM_BAD);\n \n-\tRTE_SET_USED(avx_aligned); /* for 32B descriptors we don't use this */\n-\n \tuint16_t i, received;\n \n \tfor (i = 0, received = 0; i < nb_pkts;\n@@ -309,61 +257,47 @@ _iavf_recv_raw_pkts_vec_avx2(struct iavf_rx_queue *rxq,\n #endif\n \n \t\t__m256i raw_desc0_1, raw_desc2_3, raw_desc4_5, raw_desc6_7;\n-#ifdef RTE_LIBRTE_IAVF_16BYTE_RX_DESC\n-\t\t/* for AVX we need alignment otherwise loads are not atomic */\n-\t\tif (avx_aligned) {\n-\t\t\t/* load in descriptors, 2 at a time, in reverse order */\n-\t\t\traw_desc6_7 = _mm256_load_si256((void *)(rxdp + 6));\n-\t\t\trte_compiler_barrier();\n-\t\t\traw_desc4_5 = _mm256_load_si256((void *)(rxdp + 4));\n-\t\t\trte_compiler_barrier();\n-\t\t\traw_desc2_3 = _mm256_load_si256((void *)(rxdp + 2));\n-\t\t\trte_compiler_barrier();\n-\t\t\traw_desc0_1 = _mm256_load_si256((void *)(rxdp + 0));\n-\t\t} else\n-#endif\n-\t\t{\n-\t\t\tconst __m128i raw_desc7 =\n-\t\t\t\t_mm_load_si128((void *)(rxdp + 7));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc6 =\n-\t\t\t\t_mm_load_si128((void *)(rxdp + 6));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc5 =\n-\t\t\t\t_mm_load_si128((void *)(rxdp + 5));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc4 =\n-\t\t\t\t_mm_load_si128((void *)(rxdp + 4));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc3 =\n-\t\t\t\t_mm_load_si128((void *)(rxdp + 3));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc2 =\n-\t\t\t\t_mm_load_si128((void *)(rxdp + 2));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc1 =\n-\t\t\t\t_mm_load_si128((void *)(rxdp + 1));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc0 =\n-\t\t\t\t_mm_load_si128((void *)(rxdp + 0));\n-\n-\t\t\traw_desc6_7 =\n-\t\t\t\t_mm256_inserti128_si256\n-\t\t\t\t\t(_mm256_castsi128_si256(raw_desc6),\n-\t\t\t\t\t raw_desc7, 1);\n-\t\t\traw_desc4_5 =\n-\t\t\t\t_mm256_inserti128_si256\n-\t\t\t\t\t(_mm256_castsi128_si256(raw_desc4),\n-\t\t\t\t\t raw_desc5, 1);\n-\t\t\traw_desc2_3 =\n-\t\t\t\t_mm256_inserti128_si256\n-\t\t\t\t\t(_mm256_castsi128_si256(raw_desc2),\n-\t\t\t\t\t raw_desc3, 1);\n-\t\t\traw_desc0_1 =\n-\t\t\t\t_mm256_inserti128_si256\n-\t\t\t\t\t(_mm256_castsi128_si256(raw_desc0),\n-\t\t\t\t\t raw_desc1, 1);\n-\t\t}\n+\n+\t\tconst __m128i raw_desc7 =\n+\t\t\t_mm_load_si128((void *)(rxdp + 7));\n+\t\trte_compiler_barrier();\n+\t\tconst __m128i raw_desc6 =\n+\t\t\t_mm_load_si128((void *)(rxdp + 6));\n+\t\trte_compiler_barrier();\n+\t\tconst __m128i raw_desc5 =\n+\t\t\t_mm_load_si128((void *)(rxdp + 5));\n+\t\trte_compiler_barrier();\n+\t\tconst __m128i raw_desc4 =\n+\t\t\t_mm_load_si128((void *)(rxdp + 4));\n+\t\trte_compiler_barrier();\n+\t\tconst __m128i raw_desc3 =\n+\t\t\t_mm_load_si128((void *)(rxdp + 3));\n+\t\trte_compiler_barrier();\n+\t\tconst __m128i raw_desc2 =\n+\t\t\t_mm_load_si128((void *)(rxdp + 2));\n+\t\trte_compiler_barrier();\n+\t\tconst __m128i raw_desc1 =\n+\t\t\t_mm_load_si128((void *)(rxdp + 1));\n+\t\trte_compiler_barrier();\n+\t\tconst __m128i raw_desc0 =\n+\t\t\t_mm_load_si128((void *)(rxdp + 0));\n+\n+\t\traw_desc6_7 =\n+\t\t\t_mm256_inserti128_si256\n+\t\t\t\t(_mm256_castsi128_si256(raw_desc6),\n+\t\t\t\t raw_desc7, 1);\n+\t\traw_desc4_5 =\n+\t\t\t_mm256_inserti128_si256\n+\t\t\t\t(_mm256_castsi128_si256(raw_desc4),\n+\t\t\t\t raw_desc5, 1);\n+\t\traw_desc2_3 =\n+\t\t\t_mm256_inserti128_si256\n+\t\t\t\t(_mm256_castsi128_si256(raw_desc2),\n+\t\t\t\t raw_desc3, 1);\n+\t\traw_desc0_1 =\n+\t\t\t_mm256_inserti128_si256\n+\t\t\t\t(_mm256_castsi128_si256(raw_desc0),\n+\t\t\t\t raw_desc1, 1);\n \n \t\tif (split_packet) {\n \t\t\tint j;\n", "prefixes": [ "01/12" ] }