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GET /api/patches/66653/?format=api
http://patches.dpdk.org/api/patches/66653/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200313152423.23498-2-adamx.dybkowski@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200313152423.23498-2-adamx.dybkowski@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200313152423.23498-2-adamx.dybkowski@intel.com", "date": "2020-03-13T15:24:22", "name": "[v2,1/2] common/qat: get version of QAT firmware", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "8509a6b972b2cf4078f25a9723c95763148fe8c7", "submitter": { "id": 1322, "url": "http://patches.dpdk.org/api/people/1322/?format=api", "name": "Dybkowski, AdamX", "email": "adamx.dybkowski@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200313152423.23498-2-adamx.dybkowski@intel.com/mbox/", "series": [ { "id": 8907, "url": "http://patches.dpdk.org/api/series/8907/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8907", "date": "2020-03-13T15:24:21", "name": "crypto/qat: handle mixed hash-cipher crypto on GEN2 QAT", "version": 2, "mbox": "http://patches.dpdk.org/series/8907/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/66653/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/66653/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2CC0DA0567;\n\tFri, 13 Mar 2020 16:24:40 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 8BF851C01B;\n\tFri, 13 Mar 2020 16:24:33 +0100 (CET)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by dpdk.org (Postfix) with ESMTP id B2AD31BF97\n for <dev@dpdk.org>; Fri, 13 Mar 2020 16:24:29 +0100 (CET)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 13 Mar 2020 08:24:29 -0700", "from adamdybx-mobl.ger.corp.intel.com (HELO\n addy-VirtualBox.ger.corp.intel.com) ([10.104.121.37])\n by fmsmga002.fm.intel.com with ESMTP; 13 Mar 2020 08:24:27 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.70,549,1574150400\"; d=\"scan'208\";a=\"278260313\"", "From": "Adam Dybkowski <adamx.dybkowski@intel.com>", "To": "dev@dpdk.org,\n\tfiona.trahe@intel.com,\n\takhil.goyal@nxp.com", "Cc": "Adam Dybkowski <adamx.dybkowski@intel.com>", "Date": "Fri, 13 Mar 2020 16:24:22 +0100", "Message-Id": "<20200313152423.23498-2-adamx.dybkowski@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200313152423.23498-1-adamx.dybkowski@intel.com>", "References": "<20200312141335.13392-1-adamx.dybkowski@intel.com>\n <20200313152423.23498-1-adamx.dybkowski@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 1/2] common/qat: get version of QAT firmware", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds the function for retrieving QAT firmware\nversion, required to check the internal capabilities that\ndepend on the FW version.\n\nSigned-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>\n---\n drivers/common/qat/qat_adf/icp_qat_fw.h | 2 +\n drivers/common/qat/qat_qp.c | 92 +++++++++++++++++++++++++\n drivers/common/qat/qat_qp.h | 3 +\n 3 files changed, 97 insertions(+)", "diff": "diff --git a/drivers/common/qat/qat_adf/icp_qat_fw.h b/drivers/common/qat/qat_adf/icp_qat_fw.h\nindex 1265c2a13..be10fc9bd 100644\n--- a/drivers/common/qat/qat_adf/icp_qat_fw.h\n+++ b/drivers/common/qat/qat_adf/icp_qat_fw.h\n@@ -121,6 +121,8 @@ struct icp_qat_fw_comn_resp {\n #define ICP_QAT_FW_COMN_CNV_FLAG_MASK 0x1\n #define ICP_QAT_FW_COMN_CNVNR_FLAG_BITPOS 5\n #define ICP_QAT_FW_COMN_CNVNR_FLAG_MASK 0x1\n+#define ICP_QAT_FW_COMN_NULL_VERSION_FLAG_BITPOS 0\n+#define ICP_QAT_FW_COMN_NULL_VERSION_FLAG_MASK 0x1\n \n #define ICP_QAT_FW_COMN_OV_SRV_TYPE_GET(icp_qat_fw_comn_req_hdr_t) \\\n \ticp_qat_fw_comn_req_hdr_t.service_type\ndiff --git a/drivers/common/qat/qat_qp.c b/drivers/common/qat/qat_qp.c\nindex 9958789f0..5c4c6fa5d 100644\n--- a/drivers/common/qat/qat_qp.c\n+++ b/drivers/common/qat/qat_qp.c\n@@ -19,6 +19,7 @@\n #include \"qat_comp.h\"\n #include \"adf_transport_access_macros.h\"\n \n+#define QAT_CQ_MAX_DEQ_RETRIES 10\n \n #define ADF_MAX_DESC\t\t\t\t4096\n #define ADF_MIN_DESC\t\t\t\t128\n@@ -695,6 +696,97 @@ qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops)\n \treturn resp_counter;\n }\n \n+/* This is almost same as dequeue_op_burst, without the atomic, without stats\n+ * and without the op. Dequeues one response.\n+ */\n+static uint8_t\n+qat_cq_dequeue_response(struct qat_qp *qp, void *out_data)\n+{\n+\tuint8_t result = 0;\n+\tuint8_t retries = 0;\n+\tstruct qat_queue *queue = &(qp->rx_q);\n+\tstruct icp_qat_fw_comn_resp *resp_msg = (struct icp_qat_fw_comn_resp *)\n+\t\t\t((uint8_t *)queue->base_addr + queue->head);\n+\n+\twhile (retries++ < QAT_CQ_MAX_DEQ_RETRIES &&\n+\t\t\t*(uint32_t *)resp_msg == ADF_RING_EMPTY_SIG) {\n+\t\t/* loop waiting for response until we reach the timeout */\n+\t\trte_delay_ms(20);\n+\t}\n+\n+\tif (*(uint32_t *)resp_msg != ADF_RING_EMPTY_SIG) {\n+\t\t/* response received */\n+\t\tresult = 1;\n+\n+\t\t/* check status flag */\n+\t\tif (ICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(\n+\t\t\t\tresp_msg->comn_hdr.comn_status) ==\n+\t\t\t\tICP_QAT_FW_COMN_STATUS_FLAG_OK) {\n+\t\t\t/* success */\n+\t\t\tmemcpy(out_data, resp_msg, queue->msg_size);\n+\t\t} else {\n+\t\t\tmemset(out_data, 0, queue->msg_size);\n+\t\t}\n+\n+\t\tqueue->head = adf_modulo(queue->head + queue->msg_size,\n+\t\t\t\tqueue->modulo_mask);\n+\t\trxq_free_desc(qp, queue);\n+\t}\n+\n+\treturn result;\n+}\n+\n+/* Sends a NULL message and extracts QAT fw version from the response.\n+ * Used to determine detailed capabilities based on the fw version number.\n+ * This assumes that there are no inflight messages, i.e. assumes there's space\n+ * on the qp, one message is sent and only one response collected.\n+ * Returns fw version number or 0 for unknown version or a negative error code.\n+ */\n+int\n+qat_cq_get_fw_version(struct qat_qp *qp)\n+{\n+\tstruct qat_queue *queue = &(qp->tx_q);\n+\tuint8_t *base_addr = (uint8_t *)queue->base_addr;\n+\tstruct icp_qat_fw_comn_req null_msg;\n+\tstruct icp_qat_fw_comn_resp response;\n+\n+\t/* prepare the NULL request */\n+\tmemset(&null_msg, 0, sizeof(null_msg));\n+\tnull_msg.comn_hdr.hdr_flags =\n+\t\tICP_QAT_FW_COMN_HDR_FLAGS_BUILD(ICP_QAT_FW_COMN_REQ_FLAG_SET);\n+\tnull_msg.comn_hdr.service_type = ICP_QAT_FW_COMN_REQ_NULL;\n+\tnull_msg.comn_hdr.service_cmd_id = ICP_QAT_FW_NULL_REQ_SERV_ID;\n+\n+#if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG\n+\tQAT_DP_HEXDUMP_LOG(DEBUG, \"NULL request\", &null_msg, sizeof(null_msg));\n+#endif\n+\n+\t/* send the NULL request */\n+\tmemcpy(base_addr + queue->tail, &null_msg, sizeof(null_msg));\n+\tqueue->tail = adf_modulo(queue->tail + queue->msg_size,\n+\t\t\tqueue->modulo_mask);\n+\ttxq_write_tail(qp, queue);\n+\n+\t/* receive a response */\n+\tif (qat_cq_dequeue_response(qp, &response)) {\n+\n+#if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG\n+\t\tQAT_DP_HEXDUMP_LOG(DEBUG, \"NULL response:\", &response,\n+\t\t\t\tsizeof(response));\n+#endif\n+\t\t/* if LW0 bit 24 is set - then the fw version was returned */\n+\t\tif (QAT_FIELD_GET(response.comn_hdr.hdr_flags,\n+\t\t\t\tICP_QAT_FW_COMN_NULL_VERSION_FLAG_BITPOS,\n+\t\t\t\tICP_QAT_FW_COMN_NULL_VERSION_FLAG_MASK))\n+\t\t\treturn response.resrvd[0]; /* return LW4 */\n+\t\telse\n+\t\t\treturn 0; /* not set - we don't know fw version */\n+\t}\n+\n+\tQAT_LOG(ERR, \"No response received\");\n+\treturn -EINVAL;\n+}\n+\n __rte_weak int\n qat_comp_process_response(void **op __rte_unused, uint8_t *resp __rte_unused,\n \t\t\t void *op_cookie __rte_unused,\ndiff --git a/drivers/common/qat/qat_qp.h b/drivers/common/qat/qat_qp.h\nindex 0b95ea3c9..47ad5dd20 100644\n--- a/drivers/common/qat/qat_qp.h\n+++ b/drivers/common/qat/qat_qp.h\n@@ -103,6 +103,9 @@ int\n qat_qps_per_service(const struct qat_qp_hw_data *qp_hw_data,\n \t\t\tenum qat_service_type service);\n \n+int\n+qat_cq_get_fw_version(struct qat_qp *qp);\n+\n /* Needed for weak function*/\n int\n qat_comp_process_response(void **op __rte_unused, uint8_t *resp __rte_unused,\n", "prefixes": [ "v2", "1/2" ] }{ "id": 66653, "url": "