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GET /api/patches/66536/?format=api
{ "id": 66536, "url": "http://patches.dpdk.org/api/patches/66536/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/922dac5cf352f830d98d89016e253caf37fdfcc6.1583906144.git.kaara.satwik@chelsio.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<922dac5cf352f830d98d89016e253caf37fdfcc6.1583906144.git.kaara.satwik@chelsio.com>", "list_archive_url": "https://inbox.dpdk.org/dev/922dac5cf352f830d98d89016e253caf37fdfcc6.1583906144.git.kaara.satwik@chelsio.com", "date": "2020-03-11T09:05:49", "name": "[7/9] net/cxgbe: add rte_flow support for Source MAC Rewrite", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "e5b910ce72c9220043b9535336dd39526dae14ad", "submitter": { "id": 241, "url": "http://patches.dpdk.org/api/people/241/?format=api", "name": "Rahul Lakkireddy", "email": "rahul.lakkireddy@chelsio.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/922dac5cf352f830d98d89016e253caf37fdfcc6.1583906144.git.kaara.satwik@chelsio.com/mbox/", "series": [ { "id": 8880, "url": "http://patches.dpdk.org/api/series/8880/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8880", "date": "2020-03-11T09:05:42", "name": "net/cxgbe: updates for rte_flow support", "version": 1, "mbox": "http://patches.dpdk.org/series/8880/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/66536/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/66536/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E7020A0567;\n\tWed, 11 Mar 2020 10:17:59 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 6714F1C0AA;\n\tWed, 11 Mar 2020 10:17:00 +0100 (CET)", "from stargate.chelsio.com (stargate.chelsio.com [12.32.117.8])\n by dpdk.org (Postfix) with ESMTP id 678441C08D\n for <dev@dpdk.org>; Wed, 11 Mar 2020 10:16:58 +0100 (CET)", "from localhost (scalar.blr.asicdesigners.com [10.193.185.94])\n by stargate.chelsio.com (8.13.8/8.13.8) with ESMTP id 02B9GuB5014342;\n Wed, 11 Mar 2020 02:16:57 -0700" ], "From": "Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>", "To": "dev@dpdk.org", "Cc": "nirranjan@chelsio.com, kaara.satwik@chelsio.com", "Date": "Wed, 11 Mar 2020 14:35:49 +0530", "Message-Id": "\n <922dac5cf352f830d98d89016e253caf37fdfcc6.1583906144.git.kaara.satwik@chelsio.com>", "X-Mailer": "git-send-email 2.5.3", "In-Reply-To": [ "<cover.1583906144.git.kaara.satwik@chelsio.com>", "<cover.1583906144.git.kaara.satwik@chelsio.com>" ], "References": [ "<cover.1583906144.git.kaara.satwik@chelsio.com>", "<cover.1583906144.git.kaara.satwik@chelsio.com>" ], "Subject": "[dpdk-dev] [PATCH 7/9] net/cxgbe: add rte_flow support for Source\n\tMAC Rewrite", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Karra Satwik <kaara.satwik@chelsio.com>\n\nAdd support to rewrite Source MAC addresses. The new Source\nMAC address is written into a free entry in the SMT table\nand the corresponding SMT index is used by hardware to\nrewrite the Source MAC address of the packets hitting the\nflow.\n\nSigned-off-by: Karra Satwik <kaara.satwik@chelsio.com>\nSigned-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>\n---\n drivers/net/cxgbe/base/t4_msg.h | 40 +++++\n drivers/net/cxgbe/base/t4_tcb.h | 8 +\n drivers/net/cxgbe/base/t4fw_interface.h | 7 +-\n drivers/net/cxgbe/cxgbe_filter.c | 35 ++++-\n drivers/net/cxgbe/cxgbe_filter.h | 3 +\n drivers/net/cxgbe/cxgbe_flow.c | 14 ++\n drivers/net/cxgbe/cxgbe_main.c | 4 +\n drivers/net/cxgbe/smt.c | 187 ++++++++++++++++++++++++\n drivers/net/cxgbe/smt.h | 5 +\n 9 files changed, 300 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/net/cxgbe/base/t4_msg.h b/drivers/net/cxgbe/base/t4_msg.h\nindex 9e052b0f0..a6ddaa7b0 100644\n--- a/drivers/net/cxgbe/base/t4_msg.h\n+++ b/drivers/net/cxgbe/base/t4_msg.h\n@@ -12,10 +12,12 @@ enum {\n \tCPL_ABORT_REQ = 0xA,\n \tCPL_ABORT_RPL = 0xB,\n \tCPL_L2T_WRITE_REQ = 0x12,\n+\tCPL_SMT_WRITE_REQ = 0x14,\n \tCPL_TID_RELEASE = 0x1A,\n \tCPL_L2T_WRITE_RPL = 0x23,\n \tCPL_ACT_OPEN_RPL = 0x25,\n \tCPL_ABORT_RPL_RSS = 0x2D,\n+\tCPL_SMT_WRITE_RPL = 0x2E,\n \tCPL_SET_TCB_RPL = 0x3A,\n \tCPL_ACT_OPEN_REQ6 = 0x83,\n \tCPL_SGE_EGR_UPDATE = 0xA5,\n@@ -465,6 +467,44 @@ struct cpl_l2t_write_rpl {\n \t__u8 rsvd[3];\n };\n \n+struct cpl_smt_write_req {\n+\tWR_HDR;\n+\tunion opcode_tid ot;\n+\t__be32 params;\n+\t__be16 pfvf1;\n+\t__u8 src_mac1[6];\n+\t__be16 pfvf0;\n+\t__u8 src_mac0[6];\n+};\n+\n+struct cpl_t6_smt_write_req {\n+\tWR_HDR;\n+\tunion opcode_tid ot;\n+\t__be32 params;\n+\t__be64 tag;\n+\t__be16 pfvf0;\n+\t__u8 src_mac0[6];\n+\t__be32 local_ip;\n+\t__be32 rsvd;\n+};\n+\n+struct cpl_smt_write_rpl {\n+\tRSS_HDR\n+\tunion opcode_tid ot;\n+\tu8 status;\n+\tu8 rsvd[3];\n+};\n+\n+/* cpl_smt_{read,write}_req.params fields */\n+#define S_SMTW_OVLAN_IDX 16\n+#define V_SMTW_OVLAN_IDX(x) ((x) << S_SMTW_OVLAN_IDX)\n+\n+#define S_SMTW_IDX 20\n+#define V_SMTW_IDX(x) ((x) << S_SMTW_IDX)\n+\n+#define S_SMTW_NORPL 31\n+#define V_SMTW_NORPL(x) ((x) << S_SMTW_NORPL)\n+\n /* rx_pkt.l2info fields */\n #define S_RXF_UDP 22\n #define V_RXF_UDP(x) ((x) << S_RXF_UDP)\ndiff --git a/drivers/net/cxgbe/base/t4_tcb.h b/drivers/net/cxgbe/base/t4_tcb.h\nindex 834169ab4..afd03b735 100644\n--- a/drivers/net/cxgbe/base/t4_tcb.h\n+++ b/drivers/net/cxgbe/base/t4_tcb.h\n@@ -6,6 +6,12 @@\n #ifndef _T4_TCB_DEFS_H\n #define _T4_TCB_DEFS_H\n \n+/* 31:24 */\n+#define W_TCB_SMAC_SEL 0\n+#define S_TCB_SMAC_SEL 24\n+#define M_TCB_SMAC_SEL 0xffULL\n+#define V_TCB_SMAC_SEL(x) ((x) << S_TCB_SMAC_SEL)\n+\n /* 95:32 */\n #define W_TCB_T_FLAGS 1\n \n@@ -34,6 +40,8 @@\n \n #define S_TF_CCTRL_ECE 60\n \n+#define S_TF_CCTRL_CWR 61\n+\n #define S_TF_CCTRL_RFR 62\n \n #endif /* _T4_TCB_DEFS_H */\ndiff --git a/drivers/net/cxgbe/base/t4fw_interface.h b/drivers/net/cxgbe/base/t4fw_interface.h\nindex 3684c8006..51ebe4f7a 100644\n--- a/drivers/net/cxgbe/base/t4fw_interface.h\n+++ b/drivers/net/cxgbe/base/t4fw_interface.h\n@@ -248,6 +248,9 @@ struct fw_filter2_wr {\n #define S_FW_FILTER_WR_DMAC\t19\n #define V_FW_FILTER_WR_DMAC(x)\t((x) << S_FW_FILTER_WR_DMAC)\n \n+#define S_FW_FILTER_WR_SMAC 18\n+#define V_FW_FILTER_WR_SMAC(x) ((x) << S_FW_FILTER_WR_SMAC)\n+\n #define S_FW_FILTER_WR_INSVLAN\t\t17\n #define V_FW_FILTER_WR_INSVLAN(x)\t((x) << S_FW_FILTER_WR_INSVLAN)\n \n@@ -1335,8 +1338,8 @@ struct fw_vi_cmd {\n #define FW_VI_MAC_ID_BASED_FREE 0x3FC\n \n enum fw_vi_mac_smac {\n-\tFW_VI_MAC_MPS_TCAM_ENTRY,\n-\tFW_VI_MAC_SMT_AND_MPSTCAM\n+\tFW_VI_MAC_MPS_TCAM_ENTRY = 0x0,\n+\tFW_VI_MAC_SMT_AND_MPSTCAM = 0x3\n };\n \n enum fw_vi_mac_entry_types {\ndiff --git a/drivers/net/cxgbe/cxgbe_filter.c b/drivers/net/cxgbe/cxgbe_filter.c\nindex b009217f8..c5f5e41e3 100644\n--- a/drivers/net/cxgbe/cxgbe_filter.c\n+++ b/drivers/net/cxgbe/cxgbe_filter.c\n@@ -10,6 +10,7 @@\n #include \"cxgbe_filter.h\"\n #include \"clip_tbl.h\"\n #include \"l2t.h\"\n+#include \"smt.h\"\n \n /**\n * Initialize Hash Filters\n@@ -604,6 +605,17 @@ static int cxgbe_set_hash_filter(struct rte_eth_dev *dev,\n \t\t}\n \t}\n \n+\t/* If the new filter requires Source MAC rewriting then we need to\n+\t * allocate a SMT entry for the filter\n+\t */\n+\tif (f->fs.newsmac) {\n+\t\tf->smt = cxgbe_smt_alloc_switching(f->dev, f->fs.smac);\n+\t\tif (!f->smt) {\n+\t\t\tret = -EAGAIN;\n+\t\t\tgoto out_err;\n+\t\t}\n+\t}\n+\n \tatid = cxgbe_alloc_atid(t, f);\n \tif (atid < 0)\n \t\tgoto out_err;\n@@ -758,6 +770,20 @@ static int set_filter_wr(struct rte_eth_dev *dev, unsigned int fidx)\n \t\t\treturn -ENOMEM;\n \t}\n \n+\t/* If the new filter requires Source MAC rewriting then we need to\n+\t * allocate a SMT entry for the filter\n+\t */\n+\tif (f->fs.newsmac) {\n+\t\tf->smt = cxgbe_smt_alloc_switching(f->dev, f->fs.smac);\n+\t\tif (!f->smt) {\n+\t\t\tif (f->l2t) {\n+\t\t\t\tcxgbe_l2t_release(f->l2t);\n+\t\t\t\tf->l2t = NULL;\n+\t\t\t}\n+\t\t\treturn -ENOMEM;\n+\t\t}\n+\t}\n+\n \tctrlq = &adapter->sge.ctrlq[port_id];\n \tmbuf = rte_pktmbuf_alloc(ctrlq->mb_pool);\n \tif (!mbuf) {\n@@ -788,6 +814,7 @@ static int set_filter_wr(struct rte_eth_dev *dev, unsigned int fidx)\n \t\tcpu_to_be32(V_FW_FILTER_WR_DROP(f->fs.action == FILTER_DROP) |\n \t\t\t V_FW_FILTER_WR_DIRSTEER(f->fs.dirsteer) |\n \t\t\t V_FW_FILTER_WR_LPBK(f->fs.action == FILTER_SWITCH) |\n+\t\t\t V_FW_FILTER_WR_SMAC(f->fs.newsmac) |\n \t\t\t V_FW_FILTER_WR_DMAC(f->fs.newdmac) |\n \t\t\t V_FW_FILTER_WR_INSVLAN\n \t\t\t\t(f->fs.newvlan == VLAN_INSERT ||\n@@ -806,7 +833,7 @@ static int set_filter_wr(struct rte_eth_dev *dev, unsigned int fidx)\n \t\t V_FW_FILTER_WR_IVLAN_VLDM(f->fs.mask.ivlan_vld) |\n \t\t V_FW_FILTER_WR_OVLAN_VLD(f->fs.val.ovlan_vld) |\n \t\t V_FW_FILTER_WR_OVLAN_VLDM(f->fs.mask.ovlan_vld));\n-\tfwr->smac_sel = 0;\n+\tfwr->smac_sel = f->smt ? f->smt->hw_idx : 0;\n \tfwr->rx_chan_rx_rpl_iq =\n \t\tcpu_to_be16(V_FW_FILTER_WR_RX_CHAN(0) |\n \t\t\t V_FW_FILTER_WR_RX_RPL_IQ(adapter->sge.fw_evtq.abs_id\n@@ -1144,6 +1171,12 @@ void cxgbe_hash_filter_rpl(struct adapter *adap,\n \t\tif (f->fs.newvlan == VLAN_INSERT ||\n \t\t f->fs.newvlan == VLAN_REWRITE)\n \t\t\tset_tcb_tflag(adap, tid, S_TF_CCTRL_RFR, 1, 1);\n+\t\tif (f->fs.newsmac) {\n+\t\t\tset_tcb_tflag(adap, tid, S_TF_CCTRL_CWR, 1, 1);\n+\t\t\tset_tcb_field(adap, tid, W_TCB_SMAC_SEL,\n+\t\t\t\t V_TCB_SMAC_SEL(M_TCB_SMAC_SEL),\n+\t\t\t\t V_TCB_SMAC_SEL(f->smt->hw_idx), 1);\n+\t\t}\n \t\tbreak;\n \t}\n \tdefault:\ndiff --git a/drivers/net/cxgbe/cxgbe_filter.h b/drivers/net/cxgbe/cxgbe_filter.h\nindex 7a1e72ded..e79c052de 100644\n--- a/drivers/net/cxgbe/cxgbe_filter.h\n+++ b/drivers/net/cxgbe/cxgbe_filter.h\n@@ -100,9 +100,11 @@ struct ch_filter_specification {\n \tuint32_t iq:10;\t\t/* ingress queue */\n \n \tuint32_t eport:2;\t/* egress port to switch packet out */\n+\tuint32_t newsmac:1; /* rewrite source MAC address */\n \tuint32_t newdmac:1; /* rewrite destination MAC address */\n \tuint32_t swapmac:1; /* swap SMAC/DMAC for loopback packet */\n \tuint32_t newvlan:2; /* rewrite VLAN Tag */\n+\tuint8_t smac[RTE_ETHER_ADDR_LEN]; /* new source MAC address */\n \tuint8_t dmac[RTE_ETHER_ADDR_LEN]; /* new destination MAC address */\n \tuint16_t vlan; /* VLAN Tag to insert */\n \n@@ -181,6 +183,7 @@ struct filter_entry {\n \tstruct filter_ctx *ctx; /* caller's completion hook */\n \tstruct clip_entry *clipt; /* CLIP Table entry for IPv6 */\n \tstruct l2t_entry *l2t; /* Layer Two Table entry for dmac */\n+\tstruct smt_entry *smt; /* Source Mac Table entry for smac */\n \tstruct rte_eth_dev *dev; /* Port's rte eth device */\n \tvoid *private; /* For use by apps using filter_entry */\n \ndiff --git a/drivers/net/cxgbe/cxgbe_flow.c b/drivers/net/cxgbe/cxgbe_flow.c\nindex b009005c5..13fd78aaf 100644\n--- a/drivers/net/cxgbe/cxgbe_flow.c\n+++ b/drivers/net/cxgbe/cxgbe_flow.c\n@@ -795,6 +795,19 @@ ch_rte_parse_atype_switch(const struct rte_flow_action *a,\n \t\t\t\t\t\t \"found\");\n \t\tfs->swapmac = 1;\n \t\tbreak;\n+\tcase RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:\n+\t\titem_index = cxgbe_get_flow_item_index(items,\n+\t\t\t\t\t\t RTE_FLOW_ITEM_TYPE_ETH);\n+\t\tif (item_index < 0)\n+\t\t\treturn rte_flow_error_set(e, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ACTION, a,\n+\t\t\t\t\t\t \"No RTE_FLOW_ITEM_TYPE_ETH \"\n+\t\t\t\t\t\t \"found\");\n+\t\tmac = (const struct rte_flow_action_set_mac *)a->conf;\n+\n+\t\tfs->newsmac = 1;\n+\t\tmemcpy(fs->smac, mac->mac_addr, sizeof(fs->smac));\n+\t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_SET_MAC_DST:\n \t\titem_index = cxgbe_get_flow_item_index(items,\n \t\t\t\t\t\t RTE_FLOW_ITEM_TYPE_ETH);\n@@ -883,6 +896,7 @@ cxgbe_rtef_parse_actions(struct rte_flow *flow,\n \t\t\tgoto action_switch;\n \t\tcase RTE_FLOW_ACTION_TYPE_SET_TP_SRC:\n \t\tcase RTE_FLOW_ACTION_TYPE_SET_TP_DST:\n+\t\tcase RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:\n \t\tcase RTE_FLOW_ACTION_TYPE_SET_MAC_DST:\n action_switch:\n \t\t\t/* We allow multiple switch actions, but switch is\ndiff --git a/drivers/net/cxgbe/cxgbe_main.c b/drivers/net/cxgbe/cxgbe_main.c\nindex 1ab6f8fba..df54e54f5 100644\n--- a/drivers/net/cxgbe/cxgbe_main.c\n+++ b/drivers/net/cxgbe/cxgbe_main.c\n@@ -107,6 +107,10 @@ static int fwevtq_handler(struct sge_rspq *q, const __be64 *rsp,\n \t\tconst struct cpl_l2t_write_rpl *p = (const void *)rsp;\n \n \t\tcxgbe_do_l2t_write_rpl(q->adapter, p);\n+\t} else if (opcode == CPL_SMT_WRITE_RPL) {\n+\t\tconst struct cpl_smt_write_rpl *p = (const void *)rsp;\n+\n+\t\tcxgbe_do_smt_write_rpl(q->adapter, p);\n \t} else {\n \t\tdev_err(adapter, \"unexpected CPL %#x on FW event queue\\n\",\n \t\t\topcode);\ndiff --git a/drivers/net/cxgbe/smt.c b/drivers/net/cxgbe/smt.c\nindex cf40c8a8a..e8f38676e 100644\n--- a/drivers/net/cxgbe/smt.c\n+++ b/drivers/net/cxgbe/smt.c\n@@ -6,6 +6,193 @@\n #include \"base/common.h\"\n #include \"smt.h\"\n \n+void cxgbe_do_smt_write_rpl(struct adapter *adap,\n+\t\t\t const struct cpl_smt_write_rpl *rpl)\n+{\n+\tunsigned int smtidx = G_TID_TID(GET_TID(rpl));\n+\tstruct smt_data *s = adap->smt;\n+\n+\tif (unlikely(rpl->status != CPL_ERR_NONE)) {\n+\t\tstruct smt_entry *e = &s->smtab[smtidx];\n+\n+\t\tdev_err(adap,\n+\t\t\t\"Unexpected SMT_WRITE_RPL status %u for entry %u\\n\",\n+\t\t\trpl->status, smtidx);\n+\t\tt4_os_lock(&e->lock);\n+\t\te->state = SMT_STATE_ERROR;\n+\t\tt4_os_unlock(&e->lock);\n+\t}\n+}\n+\n+static int write_smt_entry(struct rte_eth_dev *dev, struct smt_entry *e)\n+{\n+\tunsigned int port_id = ethdev2pinfo(dev)->port_id;\n+\tstruct adapter *adap = ethdev2adap(dev);\n+\tstruct cpl_t6_smt_write_req *t6req;\n+\tstruct smt_data *s = adap->smt;\n+\tstruct cpl_smt_write_req *req;\n+\tstruct sge_ctrl_txq *ctrlq;\n+\tstruct rte_mbuf *mbuf;\n+\tu8 row;\n+\n+\tctrlq = &adap->sge.ctrlq[port_id];\n+\tmbuf = rte_pktmbuf_alloc(ctrlq->mb_pool);\n+\tif (!mbuf)\n+\t\treturn -ENOMEM;\n+\n+\tif (CHELSIO_CHIP_VERSION(adap->params.chip) <= CHELSIO_T5) {\n+\t\tmbuf->data_len = sizeof(*req);\n+\t\tmbuf->pkt_len = mbuf->data_len;\n+\n+\t\t/* Source MAC Table (SMT) contains 256 SMAC entries\n+\t\t * organized in 128 rows of 2 entries each.\n+\t\t */\n+\t\treq = rte_pktmbuf_mtod(mbuf, struct cpl_smt_write_req *);\n+\t\tINIT_TP_WR(req, 0);\n+\n+\t\t/* Each row contains an SMAC pair.\n+\t\t * LSB selects the SMAC entry within a row\n+\t\t */\n+\t\tif (e->idx & 1) {\n+\t\t\treq->pfvf1 = 0x0;\n+\t\t\trte_memcpy(req->src_mac1, e->src_mac,\n+\t\t\t\t RTE_ETHER_ADDR_LEN);\n+\n+\t\t\t/* fill pfvf0/src_mac0 with entry\n+\t\t\t * at prev index from smt-tab.\n+\t\t\t */\n+\t\t\treq->pfvf0 = 0x0;\n+\t\t\trte_memcpy(req->src_mac0, s->smtab[e->idx - 1].src_mac,\n+\t\t\t\t RTE_ETHER_ADDR_LEN);\n+\t\t} else {\n+\t\t\treq->pfvf0 = 0x0;\n+\t\t\trte_memcpy(req->src_mac0, e->src_mac,\n+\t\t\t\t RTE_ETHER_ADDR_LEN);\n+\n+\t\t\t/* fill pfvf1/src_mac1 with entry\n+\t\t\t * at next index from smt-tab\n+\t\t\t */\n+\t\t\treq->pfvf1 = 0x0;\n+\t\t\trte_memcpy(req->src_mac1, s->smtab[e->idx + 1].src_mac,\n+\t\t\t\t RTE_ETHER_ADDR_LEN);\n+\t\t}\n+\t\trow = (e->hw_idx >> 1);\n+\t} else {\n+\t\tmbuf->data_len = sizeof(*t6req);\n+\t\tmbuf->pkt_len = mbuf->data_len;\n+\n+\t\t/* Source MAC Table (SMT) contains 256 SMAC entries */\n+\t\tt6req = rte_pktmbuf_mtod(mbuf, struct cpl_t6_smt_write_req *);\n+\t\tINIT_TP_WR(t6req, 0);\n+\n+\t\t/* fill pfvf0/src_mac0 from smt-tab */\n+\t\tt6req->pfvf0 = 0x0;\n+\t\trte_memcpy(t6req->src_mac0, s->smtab[e->idx].src_mac,\n+\t\t\t RTE_ETHER_ADDR_LEN);\n+\t\trow = e->hw_idx;\n+\t\treq = (struct cpl_smt_write_req *)t6req;\n+\t}\n+\n+\tOPCODE_TID(req) =\n+\t\tcpu_to_be32(MK_OPCODE_TID(CPL_SMT_WRITE_REQ,\n+\t\t\t\t\t e->hw_idx |\n+\t\t\t\t\t V_TID_QID(adap->sge.fw_evtq.abs_id)));\n+\n+\treq->params = cpu_to_be32(V_SMTW_NORPL(0) |\n+\t\t\t\t V_SMTW_IDX(row) |\n+\t\t\t\t V_SMTW_OVLAN_IDX(0));\n+\tt4_mgmt_tx(ctrlq, mbuf);\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * find_or_alloc_smte - Find/Allocate a free SMT entry\n+ * @s: SMT table\n+ * @smac: Source MAC address to compare/add\n+ * Returns pointer to the SMT entry found/created\n+ *\n+ * Finds/Allocates an SMT entry to be used by switching rule of a filter.\n+ */\n+static struct smt_entry *find_or_alloc_smte(struct smt_data *s, u8 *smac)\n+{\n+\tstruct smt_entry *e, *end, *first_free = NULL;\n+\n+\tfor (e = &s->smtab[0], end = &s->smtab[s->smt_size]; e != end; ++e) {\n+\t\tif (!rte_atomic32_read(&e->refcnt)) {\n+\t\t\tif (!first_free)\n+\t\t\t\tfirst_free = e;\n+\t\t} else {\n+\t\t\tif (e->state == SMT_STATE_SWITCHING) {\n+\t\t\t\t/* This entry is actually in use. See if we can\n+\t\t\t\t * re-use it ?\n+\t\t\t\t */\n+\t\t\t\tif (!memcmp(e->src_mac, smac,\n+\t\t\t\t\t RTE_ETHER_ADDR_LEN))\n+\t\t\t\t\tgoto found;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\tif (!first_free)\n+\t\treturn NULL;\n+\n+\te = first_free;\n+\te->state = SMT_STATE_UNUSED;\n+\n+found:\n+\treturn e;\n+}\n+\n+static struct smt_entry *t4_smt_alloc_switching(struct rte_eth_dev *dev,\n+\t\t\t\t\t\tu16 pfvf, u8 *smac)\n+{\n+\tstruct adapter *adap = ethdev2adap(dev);\n+\tstruct smt_data *s = adap->smt;\n+\tstruct smt_entry *e;\n+\tint ret;\n+\n+\tt4_os_write_lock(&s->lock);\n+\te = find_or_alloc_smte(s, smac);\n+\tif (e) {\n+\t\tt4_os_lock(&e->lock);\n+\t\tif (!rte_atomic32_read(&e->refcnt)) {\n+\t\t\te->pfvf = pfvf;\n+\t\t\trte_memcpy(e->src_mac, smac, RTE_ETHER_ADDR_LEN);\n+\t\t\tret = write_smt_entry(dev, e);\n+\t\t\tif (ret) {\n+\t\t\t\te->pfvf = 0;\n+\t\t\t\tmemset(e->src_mac, 0, RTE_ETHER_ADDR_LEN);\n+\t\t\t\tt4_os_unlock(&e->lock);\n+\t\t\t\te = NULL;\n+\t\t\t\tgoto out_write_unlock;\n+\t\t\t}\n+\t\t\te->state = SMT_STATE_SWITCHING;\n+\t\t\trte_atomic32_set(&e->refcnt, 1);\n+\t\t} else {\n+\t\t\trte_atomic32_inc(&e->refcnt);\n+\t\t}\n+\t\tt4_os_unlock(&e->lock);\n+\t}\n+\n+out_write_unlock:\n+\tt4_os_write_unlock(&s->lock);\n+\treturn e;\n+}\n+\n+/**\n+ * cxgbe_smt_alloc_switching - Allocate an SMT entry for switching rule\n+ * @dev: rte_eth_dev pointer\n+ * @smac: MAC address to add to SMT\n+ * Returns pointer to the SMT entry created\n+ *\n+ * Allocates an SMT entry to be used by switching rule of a filter.\n+ */\n+struct smt_entry *cxgbe_smt_alloc_switching(struct rte_eth_dev *dev, u8 *smac)\n+{\n+\treturn t4_smt_alloc_switching(dev, 0x0, smac);\n+}\n+\n /**\n * Initialize Source MAC Table\n */\ndiff --git a/drivers/net/cxgbe/smt.h b/drivers/net/cxgbe/smt.h\nindex aa4afcce2..be1fab8ba 100644\n--- a/drivers/net/cxgbe/smt.h\n+++ b/drivers/net/cxgbe/smt.h\n@@ -5,6 +5,8 @@\n #ifndef __CXGBE_SMT_H_\n #define __CXGBE_SMT_H_\n \n+#include \"base/t4_msg.h\"\n+\n enum {\n \tSMT_STATE_SWITCHING,\n \tSMT_STATE_UNUSED,\n@@ -34,6 +36,9 @@ struct smt_data {\n \n struct smt_data *t4_init_smt(u32 smt_start_idx, u32 smt_size);\n void t4_cleanup_smt(struct adapter *adap);\n+void cxgbe_do_smt_write_rpl(struct adapter *adap,\n+\t\t\t const struct cpl_smt_write_rpl *rpl);\n+struct smt_entry *cxgbe_smt_alloc_switching(struct rte_eth_dev *dev, u8 *smac);\n \n #endif /* __CXGBE_SMT_H_ */\n \n", "prefixes": [ "7/9" ] }