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GET /api/patches/66533/?format=api
{ "id": 66533, "url": "http://patches.dpdk.org/api/patches/66533/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/56b36451dd4562b942c0d4cb0c173d32c42e0fc6.1583906144.git.kaara.satwik@chelsio.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<56b36451dd4562b942c0d4cb0c173d32c42e0fc6.1583906144.git.kaara.satwik@chelsio.com>", "list_archive_url": "https://inbox.dpdk.org/dev/56b36451dd4562b942c0d4cb0c173d32c42e0fc6.1583906144.git.kaara.satwik@chelsio.com", "date": "2020-03-11T09:05:46", "name": "[4/9] net/cxgbe: add rte_flow support for matching all packets on VF", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "2d55c73ba20b87e4e4026893887de5b1c809179b", "submitter": { "id": 241, "url": "http://patches.dpdk.org/api/people/241/?format=api", "name": "Rahul Lakkireddy", "email": "rahul.lakkireddy@chelsio.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/56b36451dd4562b942c0d4cb0c173d32c42e0fc6.1583906144.git.kaara.satwik@chelsio.com/mbox/", "series": [ { "id": 8880, "url": "http://patches.dpdk.org/api/series/8880/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8880", "date": "2020-03-11T09:05:42", "name": "net/cxgbe: updates for rte_flow support", "version": 1, "mbox": "http://patches.dpdk.org/series/8880/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/66533/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/66533/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 73D95A0567;\n\tWed, 11 Mar 2020 10:17:21 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 30B451C021;\n\tWed, 11 Mar 2020 10:16:51 +0100 (CET)", "from stargate.chelsio.com (stargate.chelsio.com [12.32.117.8])\n by dpdk.org (Postfix) with ESMTP id 9A1E11C037\n for <dev@dpdk.org>; Wed, 11 Mar 2020 10:16:49 +0100 (CET)", "from localhost (scalar.blr.asicdesigners.com [10.193.185.94])\n by stargate.chelsio.com (8.13.8/8.13.8) with ESMTP id 02B9GldJ014333;\n Wed, 11 Mar 2020 02:16:48 -0700" ], "From": "Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>", "To": "dev@dpdk.org", "Cc": "nirranjan@chelsio.com, kaara.satwik@chelsio.com", "Date": "Wed, 11 Mar 2020 14:35:46 +0530", "Message-Id": "\n <56b36451dd4562b942c0d4cb0c173d32c42e0fc6.1583906144.git.kaara.satwik@chelsio.com>", "X-Mailer": "git-send-email 2.5.3", "In-Reply-To": [ "<cover.1583906144.git.kaara.satwik@chelsio.com>", "<cover.1583906144.git.kaara.satwik@chelsio.com>" ], "References": [ "<cover.1583906144.git.kaara.satwik@chelsio.com>", "<cover.1583906144.git.kaara.satwik@chelsio.com>" ], "Subject": "[dpdk-dev] [PATCH 4/9] net/cxgbe: add rte_flow support for matching\n\tall packets on VF", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Karra Satwik <kaara.satwik@chelsio.com>\n\nAdd support to match all packets received on the underlying VF.\n\nUse new firmware API to fetch the Virtual Interface Number (VIN)\nallocated to each VF by the firmware. The VIN is required to\nwrite filter rules to match all packets on VFs, whose identifier\nis beyond max 7-bit value (i.e. 127) in VIID.\n\nIf firmware doesn't support fetching the VIN information, then\nfallback to manually retrieving the VIN value from the 7-bit field\nin the VIID, which only supports in range of 0..127. In this case,\npackets belonging to VFs, whose identifier is beyond 127 can't be\nmatched.\n\nSigned-off-by: Karra Satwik <kaara.satwik@chelsio.com>\nSigned-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>\n---\n drivers/net/cxgbe/base/adapter.h | 6 ++++\n drivers/net/cxgbe/base/common.h | 6 ++--\n drivers/net/cxgbe/base/t4_hw.c | 27 +++++++++++++---\n drivers/net/cxgbe/base/t4fw_interface.h | 23 ++++++++++++++\n drivers/net/cxgbe/cxgbe_filter.c | 9 +++---\n drivers/net/cxgbe/cxgbe_filter.h | 2 +-\n drivers/net/cxgbe/cxgbe_flow.c | 41 +++++++++++++++++++++++--\n drivers/net/cxgbe/cxgbe_main.c | 9 ++++++\n 8 files changed, 109 insertions(+), 14 deletions(-)", "diff": "diff --git a/drivers/net/cxgbe/base/adapter.h b/drivers/net/cxgbe/base/adapter.h\nindex db654ad9c..c6b8036fd 100644\n--- a/drivers/net/cxgbe/base/adapter.h\n+++ b/drivers/net/cxgbe/base/adapter.h\n@@ -55,6 +55,12 @@ struct port_info {\n \tu8 rss_mode; /* rss mode */\n \tu16 rss_size; /* size of VI's RSS table slice */\n \tu64 rss_hf;\t\t\t/* RSS Hash Function */\n+\n+\t/* viid fields either returned by fw\n+\t * or decoded by parsing viid by driver.\n+\t */\n+\tu8 vin;\n+\tu8 vivld;\n };\n \n /* Enable or disable autonegotiation. If this is set to enable,\ndiff --git a/drivers/net/cxgbe/base/common.h b/drivers/net/cxgbe/base/common.h\nindex 793cad11d..892aab64b 100644\n--- a/drivers/net/cxgbe/base/common.h\n+++ b/drivers/net/cxgbe/base/common.h\n@@ -273,6 +273,7 @@ struct adapter_params {\n \tbool ulptx_memwrite_dsgl; /* use of T5 DSGL allowed */\n \tu8 fw_caps_support;\t\t /* 32-bit Port Capabilities */\n \tu8 filter2_wr_support; /* FW support for FILTER2_WR */\n+\tu32 viid_smt_extn_support:1;\t /* FW returns vin and smt index */\n \tu32 max_tx_coalesce_num; /* Max # of Tx packets that can be coalesced */\n };\n \n@@ -382,10 +383,11 @@ int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf,\n int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox,\n \t\t unsigned int port, unsigned int pf, unsigned int vf,\n \t\t unsigned int nmac, u8 *mac, unsigned int *rss_size,\n-\t\t unsigned int portfunc, unsigned int idstype);\n+\t\t unsigned int portfunc, unsigned int idstype,\n+\t\t u8 *vivld, u8 *vin);\n int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port,\n \t\tunsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac,\n-\t\tunsigned int *rss_size);\n+\t\tunsigned int *rss_size, u8 *vivild, u8 *vin);\n int t4_free_vi(struct adapter *adap, unsigned int mbox,\n \t unsigned int pf, unsigned int vf,\n \t unsigned int viid);\ndiff --git a/drivers/net/cxgbe/base/t4_hw.c b/drivers/net/cxgbe/base/t4_hw.c\nindex cd4da0b9f..48b6d77b1 100644\n--- a/drivers/net/cxgbe/base/t4_hw.c\n+++ b/drivers/net/cxgbe/base/t4_hw.c\n@@ -4017,7 +4017,8 @@ int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf,\n int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox,\n \t\t unsigned int port, unsigned int pf, unsigned int vf,\n \t\t unsigned int nmac, u8 *mac, unsigned int *rss_size,\n-\t\t unsigned int portfunc, unsigned int idstype)\n+\t\t unsigned int portfunc, unsigned int idstype,\n+\t\t u8 *vivld, u8 *vin)\n {\n \tint ret;\n \tstruct fw_vi_cmd c;\n@@ -4055,6 +4056,10 @@ int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox,\n \t}\n \tif (rss_size)\n \t\t*rss_size = G_FW_VI_CMD_RSSSIZE(be16_to_cpu(c.norss_rsssize));\n+\tif (vivld)\n+\t\t*vivld = G_FW_VI_CMD_VFVLD(be32_to_cpu(c.alloc_to_len16));\n+\tif (vin)\n+\t\t*vin = G_FW_VI_CMD_VIN(be32_to_cpu(c.alloc_to_len16));\n \treturn G_FW_VI_CMD_VIID(cpu_to_be16(c.type_to_viid));\n }\n \n@@ -4075,10 +4080,10 @@ int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox,\n */\n int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port,\n \t\tunsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac,\n-\t\tunsigned int *rss_size)\n+\t\tunsigned int *rss_size, u8 *vivld, u8 *vin)\n {\n \treturn t4_alloc_vi_func(adap, mbox, port, pf, vf, nmac, mac, rss_size,\n-\t\t\t\tFW_VI_FUNC_ETH, 0);\n+\t\t\t\tFW_VI_FUNC_ETH, 0, vivld, vin);\n }\n \n /**\n@@ -5346,6 +5351,7 @@ int t4_port_init(struct adapter *adap, int mbox, int pf, int vf)\n \tfw_port_cap32_t pcaps, acaps;\n \tenum fw_port_type port_type;\n \tstruct fw_port_cmd cmd;\n+\tu8 vivld = 0, vin = 0;\n \tint ret, i, j = 0;\n \tint mdio_addr;\n \tu32 action;\n@@ -5417,7 +5423,8 @@ int t4_port_init(struct adapter *adap, int mbox, int pf, int vf)\n \t\t\tacaps = be32_to_cpu(cmd.u.info32.acaps32);\n \t\t}\n \n-\t\tret = t4_alloc_vi(adap, mbox, j, pf, vf, 1, addr, &rss_size);\n+\t\tret = t4_alloc_vi(adap, mbox, j, pf, vf, 1, addr, &rss_size,\n+\t\t\t\t &vivld, &vin);\n \t\tif (ret < 0)\n \t\t\treturn ret;\n \n@@ -5426,6 +5433,18 @@ int t4_port_init(struct adapter *adap, int mbox, int pf, int vf)\n \t\tpi->rss_size = rss_size;\n \t\tt4_os_set_hw_addr(adap, i, addr);\n \n+\t\t/* If fw supports returning the VIN as part of FW_VI_CMD,\n+\t\t * save the returned values.\n+\t\t */\n+\t\tif (adap->params.viid_smt_extn_support) {\n+\t\t\tpi->vivld = vivld;\n+\t\t\tpi->vin = vin;\n+\t\t} else {\n+\t\t\t/* Retrieve the values from VIID */\n+\t\t\tpi->vivld = G_FW_VIID_VIVLD(pi->viid);\n+\t\t\tpi->vin = G_FW_VIID_VIN(pi->viid);\n+\t\t}\n+\n \t\tpi->port_type = port_type;\n \t\tpi->mdio_addr = mdio_addr;\n \t\tpi->mod_type = FW_PORT_MOD_TYPE_NA;\ndiff --git a/drivers/net/cxgbe/base/t4fw_interface.h b/drivers/net/cxgbe/base/t4fw_interface.h\nindex e992d196d..39e02077f 100644\n--- a/drivers/net/cxgbe/base/t4fw_interface.h\n+++ b/drivers/net/cxgbe/base/t4fw_interface.h\n@@ -679,6 +679,7 @@ enum fw_params_param_dev {\n \tFW_PARAMS_PARAM_DEV_TPREV\t= 0x0C, /* tp version */\n \tFW_PARAMS_PARAM_DEV_ULPTX_MEMWRITE_DSGL = 0x17,\n \tFW_PARAMS_PARAM_DEV_FILTER2_WR\t= 0x1D,\n+\tFW_PARAMS_PARAM_DEV_OPAQUE_VIID_SMT_EXTN = 0x27,\n };\n \n /*\n@@ -1235,6 +1236,18 @@ enum fw_vi_func {\n \tFW_VI_FUNC_ETH,\n };\n \n+/* Macros for VIID parsing:\n+ * VIID - [10:8] PFN, [7] VI Valid, [6:0] VI number\n+ */\n+\n+#define S_FW_VIID_VIVLD 7\n+#define M_FW_VIID_VIVLD 0x1\n+#define G_FW_VIID_VIVLD(x) (((x) >> S_FW_VIID_VIVLD) & M_FW_VIID_VIVLD)\n+\n+#define S_FW_VIID_VIN 0\n+#define M_FW_VIID_VIN 0x7F\n+#define G_FW_VIID_VIN(x) (((x) >> S_FW_VIID_VIN) & M_FW_VIID_VIN)\n+\n struct fw_vi_cmd {\n \t__be32 op_to_vfn;\n \t__be32 alloc_to_len16;\n@@ -1276,6 +1289,16 @@ struct fw_vi_cmd {\n #define G_FW_VI_CMD_FREE(x)\t(((x) >> S_FW_VI_CMD_FREE) & M_FW_VI_CMD_FREE)\n #define F_FW_VI_CMD_FREE\tV_FW_VI_CMD_FREE(1U)\n \n+#define S_FW_VI_CMD_VFVLD 24\n+#define M_FW_VI_CMD_VFVLD 0x1\n+#define G_FW_VI_CMD_VFVLD(x) \\\n+\t(((x) >> S_FW_VI_CMD_VFVLD) & M_FW_VI_CMD_VFVLD)\n+\n+#define S_FW_VI_CMD_VIN 16\n+#define M_FW_VI_CMD_VIN 0xff\n+#define G_FW_VI_CMD_VIN(x) \\\n+\t(((x) >> S_FW_VI_CMD_VIN) & M_FW_VI_CMD_VIN)\n+\n #define S_FW_VI_CMD_TYPE\t15\n #define M_FW_VI_CMD_TYPE\t0x1\n #define V_FW_VI_CMD_TYPE(x)\t((x) << S_FW_VI_CMD_TYPE)\ndiff --git a/drivers/net/cxgbe/cxgbe_filter.c b/drivers/net/cxgbe/cxgbe_filter.c\nindex 4c50932af..9c10520b2 100644\n--- a/drivers/net/cxgbe/cxgbe_filter.c\n+++ b/drivers/net/cxgbe/cxgbe_filter.c\n@@ -312,8 +312,9 @@ static u64 hash_filter_ntuple(const struct filter_entry *f)\n \tif (tp->vnic_shift >= 0) {\n \t\tif ((adap->params.tp.ingress_config & F_VNIC) &&\n \t\t f->fs.mask.pfvf_vld)\n-\t\t\tntuple |= (u64)((f->fs.val.pfvf_vld << 16) |\n-\t\t\t\t\t(f->fs.val.pf << 13)) << tp->vnic_shift;\n+\t\t\tntuple |= (u64)(f->fs.val.pfvf_vld << 16 |\n+\t\t\t\t\tf->fs.val.pf << 13 | f->fs.val.vf) <<\n+\t\t\t\t\ttp->vnic_shift;\n \t\telse if (!(adap->params.tp.ingress_config & F_VNIC) &&\n \t\t\t f->fs.mask.ovlan_vld)\n \t\t\tntuple |= (u64)(f->fs.val.ovlan_vld << 16 |\n@@ -1067,8 +1068,8 @@ int cxgbe_set_filter(struct rte_eth_dev *dev, unsigned int filter_id,\n \t * to hardware.\n \t */\n \tif (iconf & F_VNIC) {\n-\t\tf->fs.val.ovlan = fs->val.pf << 13;\n-\t\tf->fs.mask.ovlan = fs->mask.pf << 13;\n+\t\tf->fs.val.ovlan = fs->val.pf << 13 | fs->val.vf;\n+\t\tf->fs.mask.ovlan = fs->mask.pf << 13 | fs->mask.vf;\n \t\tf->fs.val.ovlan_vld = fs->val.pfvf_vld;\n \t\tf->fs.mask.ovlan_vld = fs->mask.pfvf_vld;\n \t}\ndiff --git a/drivers/net/cxgbe/cxgbe_filter.h b/drivers/net/cxgbe/cxgbe_filter.h\nindex 2ac210045..6b1bf25e2 100644\n--- a/drivers/net/cxgbe/cxgbe_filter.h\n+++ b/drivers/net/cxgbe/cxgbe_filter.h\n@@ -19,7 +19,7 @@\n #define PROTO_BITWIDTH 8\n #define TOS_BITWIDTH 8\n #define PF_BITWIDTH 3\n-#define VF_BITWIDTH 8\n+#define VF_BITWIDTH 13\n #define IVLAN_BITWIDTH 16\n #define OVLAN_BITWIDTH 16\n \ndiff --git a/drivers/net/cxgbe/cxgbe_flow.c b/drivers/net/cxgbe/cxgbe_flow.c\nindex c1f5ef045..3e27a3f68 100644\n--- a/drivers/net/cxgbe/cxgbe_flow.c\n+++ b/drivers/net/cxgbe/cxgbe_flow.c\n@@ -159,9 +159,9 @@ cxgbe_fill_filter_region(struct adapter *adap,\n \t\t\tntuple_mask |= (u64)(fs->val.ovlan_vld << 16 |\n \t\t\t\t\t fs->mask.ovlan) << tp->vnic_shift;\n \t\telse if (fs->mask.pfvf_vld)\n-\t\t\tntuple_mask |= (u64)((fs->mask.pfvf_vld << 16) |\n-\t\t\t\t\t (fs->mask.pf << 13)) <<\n-\t\t\t\t\t tp->vnic_shift;\n+\t\t\tntuple_mask |= (u64)(fs->mask.pfvf_vld << 16 |\n+\t\t\t\t\t fs->mask.pf << 13 |\n+\t\t\t\t\t fs->mask.vf) << tp->vnic_shift;\n \t}\n \tif (tp->tos_shift >= 0)\n \t\tntuple_mask |= (u64)fs->mask.tos << tp->tos_shift;\n@@ -316,6 +316,34 @@ ch_rte_parsetype_pf(const void *dmask __rte_unused,\n \treturn 0;\n }\n \n+static int\n+ch_rte_parsetype_vf(const void *dmask, const struct rte_flow_item *item,\n+\t\t struct ch_filter_specification *fs,\n+\t\t struct rte_flow_error *e)\n+{\n+\tconst struct rte_flow_item_vf *umask = item->mask;\n+\tconst struct rte_flow_item_vf *val = item->spec;\n+\tconst struct rte_flow_item_vf *mask;\n+\n+\t/* If user has not given any mask, then use chelsio supported mask. */\n+\tmask = umask ? umask : (const struct rte_flow_item_vf *)dmask;\n+\n+\tCXGBE_FILL_FS(1, 1, pfvf_vld);\n+\n+\tif (!val)\n+\t\treturn 0; /* Wildcard, match all Vf */\n+\n+\tif (val->id > UCHAR_MAX)\n+\t\treturn rte_flow_error_set(e, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t item,\n+\t\t\t\t\t \"VF ID > MAX(255)\");\n+\n+\tCXGBE_FILL_FS(val->id, mask->id, vf);\n+\n+\treturn 0;\n+}\n+\n static int\n ch_rte_parsetype_udp(const void *dmask, const struct rte_flow_item *item,\n \t\t struct ch_filter_specification *fs,\n@@ -948,6 +976,13 @@ static struct chrte_fparse parseitem[] = {\n \t\t.fptr = ch_rte_parsetype_pf,\n \t\t.dmask = NULL,\n \t},\n+\n+\t[RTE_FLOW_ITEM_TYPE_VF] = {\n+\t\t.fptr = ch_rte_parsetype_vf,\n+\t\t.dmask = &(const struct rte_flow_item_vf){\n+\t\t\t.id = 0xffffffff,\n+\t\t}\n+\t},\n };\n \n static int\ndiff --git a/drivers/net/cxgbe/cxgbe_main.c b/drivers/net/cxgbe/cxgbe_main.c\nindex 0d0827c0e..a286d8557 100644\n--- a/drivers/net/cxgbe/cxgbe_main.c\n+++ b/drivers/net/cxgbe/cxgbe_main.c\n@@ -1207,6 +1207,15 @@ static int adap_init0(struct adapter *adap)\n \t\tadap->params.filter2_wr_support = (ret == 0 && val[0] != 0);\n \t}\n \n+\t/* Check if FW supports returning vin.\n+\t * If this is not supported, driver will interpret\n+\t * these values from viid.\n+\t */\n+\tparams[0] = CXGBE_FW_PARAM_DEV(OPAQUE_VIID_SMT_EXTN);\n+\tret = t4_query_params(adap, adap->mbox, adap->pf, 0,\n+\t\t\t 1, params, val);\n+\tadap->params.viid_smt_extn_support = (ret == 0 && val[0] != 0);\n+\n \t/* query tid-related parameters */\n \tparams[0] = CXGBE_FW_PARAM_DEV(NTID);\n \tret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1,\n", "prefixes": [ "4/9" ] }