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GET /api/patches/66532/?format=api
{ "id": 66532, "url": "http://patches.dpdk.org/api/patches/66532/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/4f6cf569db066684605623f3c18d6af055205ae9.1583906144.git.kaara.satwik@chelsio.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<4f6cf569db066684605623f3c18d6af055205ae9.1583906144.git.kaara.satwik@chelsio.com>", "list_archive_url": "https://inbox.dpdk.org/dev/4f6cf569db066684605623f3c18d6af055205ae9.1583906144.git.kaara.satwik@chelsio.com", "date": "2020-03-11T09:05:45", "name": "[3/9] net/cxgbe: add rte_flow support for matching all packets on PF", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "cb2c924a1f953312ef3998513f535f91d29fa663", "submitter": { "id": 241, "url": "http://patches.dpdk.org/api/people/241/?format=api", "name": "Rahul Lakkireddy", "email": "rahul.lakkireddy@chelsio.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/4f6cf569db066684605623f3c18d6af055205ae9.1583906144.git.kaara.satwik@chelsio.com/mbox/", "series": [ { "id": 8880, "url": "http://patches.dpdk.org/api/series/8880/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8880", "date": "2020-03-11T09:05:42", "name": "net/cxgbe: updates for rte_flow support", "version": 1, "mbox": "http://patches.dpdk.org/series/8880/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/66532/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/66532/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 50D01A0567;\n\tWed, 11 Mar 2020 10:17:10 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E13D71C02D;\n\tWed, 11 Mar 2020 10:16:47 +0100 (CET)", "from stargate.chelsio.com (stargate.chelsio.com [12.32.117.8])\n by dpdk.org (Postfix) with ESMTP id A58A81C029\n for <dev@dpdk.org>; Wed, 11 Mar 2020 10:16:46 +0100 (CET)", "from localhost (scalar.blr.asicdesigners.com [10.193.185.94])\n by stargate.chelsio.com (8.13.8/8.13.8) with ESMTP id 02B9GiPc014330;\n Wed, 11 Mar 2020 02:16:45 -0700" ], "From": "Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>", "To": "dev@dpdk.org", "Cc": "nirranjan@chelsio.com, kaara.satwik@chelsio.com", "Date": "Wed, 11 Mar 2020 14:35:45 +0530", "Message-Id": "\n <4f6cf569db066684605623f3c18d6af055205ae9.1583906144.git.kaara.satwik@chelsio.com>", "X-Mailer": "git-send-email 2.5.3", "In-Reply-To": [ "<cover.1583906144.git.kaara.satwik@chelsio.com>", "<cover.1583906144.git.kaara.satwik@chelsio.com>" ], "References": [ "<cover.1583906144.git.kaara.satwik@chelsio.com>", "<cover.1583906144.git.kaara.satwik@chelsio.com>" ], "Subject": "[dpdk-dev] [PATCH 3/9] net/cxgbe: add rte_flow support for matching\n\tall packets on PF", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Karra Satwik <kaara.satwik@chelsio.com>\n\nAdd support to match all packets received on the underlying PF\n\nNote that the same 17-bit hardware tuple is shared between QinQ\nand PF match. Hence, match on either QinQ or PF only can be done\nat a time. Both QinQ and PF match can't be enabled at the same time.\n\nAlso, remove check to reject rules without spec because\nRTE_FLOW_ITEM_TYPE_PF doesn't require a spec. Due to this check\nremoval, RTE_FLOW_ITEM_TYPE_PHY_PORT item needs to be updated to\nhandle NULL spec\n\nSigned-off-by: Karra Satwik <kaara.satwik@chelsio.com>\nSigned-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>\n---\n drivers/net/cxgbe/cxgbe_filter.c | 39 ++++++++++++++++++++++++-------\n drivers/net/cxgbe/cxgbe_filter.h | 2 +-\n drivers/net/cxgbe/cxgbe_flow.c | 40 ++++++++++++++++++++++++++------\n 3 files changed, 64 insertions(+), 17 deletions(-)", "diff": "diff --git a/drivers/net/cxgbe/cxgbe_filter.c b/drivers/net/cxgbe/cxgbe_filter.c\nindex 193738f93..4c50932af 100644\n--- a/drivers/net/cxgbe/cxgbe_filter.c\n+++ b/drivers/net/cxgbe/cxgbe_filter.c\n@@ -73,15 +73,17 @@ int cxgbe_validate_filter(struct adapter *adapter,\n \tif (U(F_PORT, iport) || U(F_ETHERTYPE, ethtype) ||\n \t U(F_PROTOCOL, proto) || U(F_MACMATCH, macidx) ||\n \t U(F_VLAN, ivlan_vld) || U(F_VNIC_ID, ovlan_vld) ||\n-\t U(F_TOS, tos))\n+\t U(F_TOS, tos) || U(F_VNIC_ID, pfvf_vld))\n \t\treturn -EOPNOTSUPP;\n \n-\t/* Ensure OVLAN match is enabled in hardware */\n-\tif (S(ovlan_vld) && (iconf & F_VNIC))\n+\t/* Either OVLAN or PFVF match is enabled in hardware, but not both */\n+\tif ((S(pfvf_vld) && !(iconf & F_VNIC)) ||\n+\t (S(ovlan_vld) && (iconf & F_VNIC)))\n \t\treturn -EOPNOTSUPP;\n \n-\t/* To use OVLAN, L4 encapsulation match must not be enabled */\n-\tif (S(ovlan_vld) && (iconf & F_USE_ENC_IDX))\n+\t/* To use OVLAN or PFVF, L4 encapsulation match must not be enabled */\n+\tif ((S(ovlan_vld) && (iconf & F_USE_ENC_IDX)) ||\n+\t (S(pfvf_vld) && (iconf & F_USE_ENC_IDX)))\n \t\treturn -EOPNOTSUPP;\n \n #undef S\n@@ -308,8 +310,12 @@ static u64 hash_filter_ntuple(const struct filter_entry *f)\n \t\tntuple |= (u64)(F_FT_VLAN_VLD | f->fs.val.ivlan) <<\n \t\t\t tp->vlan_shift;\n \tif (tp->vnic_shift >= 0) {\n-\t\tif (!(adap->params.tp.ingress_config & F_VNIC) &&\n-\t\t f->fs.mask.ovlan_vld)\n+\t\tif ((adap->params.tp.ingress_config & F_VNIC) &&\n+\t\t f->fs.mask.pfvf_vld)\n+\t\t\tntuple |= (u64)((f->fs.val.pfvf_vld << 16) |\n+\t\t\t\t\t(f->fs.val.pf << 13)) << tp->vnic_shift;\n+\t\telse if (!(adap->params.tp.ingress_config & F_VNIC) &&\n+\t\t\t f->fs.mask.ovlan_vld)\n \t\t\tntuple |= (u64)(f->fs.val.ovlan_vld << 16 |\n \t\t\t\t\tf->fs.val.ovlan) << tp->vnic_shift;\n \t}\n@@ -965,10 +971,11 @@ int cxgbe_set_filter(struct rte_eth_dev *dev, unsigned int filter_id,\n {\n \tstruct port_info *pi = ethdev2pinfo(dev);\n \tstruct adapter *adapter = pi->adapter;\n-\tunsigned int fidx, iq;\n+\tu8 nentries, bitoff[16] = {0};\n \tstruct filter_entry *f;\n \tunsigned int chip_ver;\n-\tu8 nentries, bitoff[16] = {0};\n+\tunsigned int fidx, iq;\n+\tu32 iconf;\n \tint ret;\n \n \tif (is_hashfilter(adapter) && fs->cap)\n@@ -1052,6 +1059,20 @@ int cxgbe_set_filter(struct rte_eth_dev *dev, unsigned int filter_id,\n \tf->fs.iq = iq;\n \tf->dev = dev;\n \n+\ticonf = adapter->params.tp.ingress_config;\n+\n+\t/* Either PFVF or OVLAN can be active, but not both\n+\t * So, if PFVF is enabled, then overwrite the OVLAN\n+\t * fields with PFVF fields before writing the spec\n+\t * to hardware.\n+\t */\n+\tif (iconf & F_VNIC) {\n+\t\tf->fs.val.ovlan = fs->val.pf << 13;\n+\t\tf->fs.mask.ovlan = fs->mask.pf << 13;\n+\t\tf->fs.val.ovlan_vld = fs->val.pfvf_vld;\n+\t\tf->fs.mask.ovlan_vld = fs->mask.pfvf_vld;\n+\t}\n+\n \t/*\n \t * Attempt to set the filter. If we don't succeed, we clear\n \t * it and return the failure.\ndiff --git a/drivers/net/cxgbe/cxgbe_filter.h b/drivers/net/cxgbe/cxgbe_filter.h\nindex 06021c854..2ac210045 100644\n--- a/drivers/net/cxgbe/cxgbe_filter.h\n+++ b/drivers/net/cxgbe/cxgbe_filter.h\n@@ -18,7 +18,7 @@\n #define MATCHTYPE_BITWIDTH 3\n #define PROTO_BITWIDTH 8\n #define TOS_BITWIDTH 8\n-#define PF_BITWIDTH 8\n+#define PF_BITWIDTH 3\n #define VF_BITWIDTH 8\n #define IVLAN_BITWIDTH 16\n #define OVLAN_BITWIDTH 16\ndiff --git a/drivers/net/cxgbe/cxgbe_flow.c b/drivers/net/cxgbe/cxgbe_flow.c\nindex c860b7886..c1f5ef045 100644\n--- a/drivers/net/cxgbe/cxgbe_flow.c\n+++ b/drivers/net/cxgbe/cxgbe_flow.c\n@@ -154,9 +154,15 @@ cxgbe_fill_filter_region(struct adapter *adap,\n \tif (tp->vlan_shift >= 0 && fs->mask.ivlan_vld)\n \t\tntuple_mask |= (u64)(F_FT_VLAN_VLD | fs->mask.ivlan) <<\n \t\t\t tp->vlan_shift;\n-\tif (tp->vnic_shift >= 0 && fs->mask.ovlan_vld)\n-\t\tntuple_mask |= (u64)(F_FT_VLAN_VLD | fs->mask.ovlan) <<\n-\t\t\t tp->vnic_shift;\n+\tif (tp->vnic_shift >= 0) {\n+\t\tif (fs->mask.ovlan_vld)\n+\t\t\tntuple_mask |= (u64)(fs->val.ovlan_vld << 16 |\n+\t\t\t\t\t fs->mask.ovlan) << tp->vnic_shift;\n+\t\telse if (fs->mask.pfvf_vld)\n+\t\t\tntuple_mask |= (u64)((fs->mask.pfvf_vld << 16) |\n+\t\t\t\t\t (fs->mask.pf << 13)) <<\n+\t\t\t\t\t tp->vnic_shift;\n+\t}\n \tif (tp->tos_shift >= 0)\n \t\tntuple_mask |= (u64)fs->mask.tos << tp->tos_shift;\n \n@@ -221,6 +227,9 @@ ch_rte_parsetype_port(const void *dmask, const struct rte_flow_item *item,\n \n \tmask = umask ? umask : (const struct rte_flow_item_phy_port *)dmask;\n \n+\tif (!val)\n+\t\treturn 0; /* Wildcard, match all physical ports */\n+\n \tif (val->index > 0x7)\n \t\treturn rte_flow_error_set(e, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM,\n \t\t\t\t\t item,\n@@ -291,6 +300,22 @@ ch_rte_parsetype_vlan(const void *dmask, const struct rte_flow_item *item,\n \treturn 0;\n }\n \n+static int\n+ch_rte_parsetype_pf(const void *dmask __rte_unused,\n+\t\t const struct rte_flow_item *item __rte_unused,\n+\t\t struct ch_filter_specification *fs,\n+\t\t struct rte_flow_error *e __rte_unused)\n+{\n+\tstruct rte_flow *flow = (struct rte_flow *)fs->private;\n+\tstruct rte_eth_dev *dev = flow->dev;\n+\tstruct adapter *adap = ethdev2adap(dev);\n+\n+\tCXGBE_FILL_FS(1, 1, pfvf_vld);\n+\n+\tCXGBE_FILL_FS(adap->pf, ~0, pf);\n+\treturn 0;\n+}\n+\n static int\n ch_rte_parsetype_udp(const void *dmask, const struct rte_flow_item *item,\n \t\t struct ch_filter_specification *fs,\n@@ -918,6 +943,11 @@ static struct chrte_fparse parseitem[] = {\n \t\t.fptr = ch_rte_parsetype_tcp,\n \t\t.dmask = &rte_flow_item_tcp_mask,\n \t},\n+\n+\t[RTE_FLOW_ITEM_TYPE_PF] = {\n+\t\t.fptr = ch_rte_parsetype_pf,\n+\t\t.dmask = NULL,\n+\t},\n };\n \n static int\n@@ -951,10 +981,6 @@ cxgbe_rtef_parse_items(struct rte_flow *flow,\n \n \t\t\trepeat[i->type] = 1;\n \n-\t\t\t/* No spec found for this pattern item. Skip it */\n-\t\t\tif (!i->spec)\n-\t\t\t\tbreak;\n-\n \t\t\t/* validate the item */\n \t\t\tret = cxgbe_validate_item(i, e);\n \t\t\tif (ret)\n", "prefixes": [ "3/9" ] }