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GET /api/patches/66524/?format=api
{ "id": 66524, "url": "http://patches.dpdk.org/api/patches/66524/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1583862551-2049-11-git-send-email-phil.yang@arm.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1583862551-2049-11-git-send-email-phil.yang@arm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1583862551-2049-11-git-send-email-phil.yang@arm.com", "date": "2020-03-10T17:49:11", "name": "[10/10] service: relax barriers with C11 atomic operations", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "1a744f21188b38e1f4f054b9d91a18ef27572a31", "submitter": { "id": 833, "url": "http://patches.dpdk.org/api/people/833/?format=api", "name": "Phil Yang", "email": "phil.yang@arm.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1583862551-2049-11-git-send-email-phil.yang@arm.com/mbox/", "series": [ { "id": 8875, "url": "http://patches.dpdk.org/api/series/8875/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8875", "date": "2020-03-10T17:49:01", "name": "generic rte atomic APIs deprecate proposal", "version": 1, "mbox": "http://patches.dpdk.org/series/8875/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/66524/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/66524/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7C2EFA0566;\n\tTue, 10 Mar 2020 18:51:47 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 44B611C0CF;\n\tTue, 10 Mar 2020 18:50:37 +0100 (CET)", "from foss.arm.com (foss.arm.com [217.140.110.172])\n by dpdk.org (Postfix) with ESMTP id 5A84C1C10D\n for <dev@dpdk.org>; Tue, 10 Mar 2020 18:50:35 +0100 (CET)", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D3E2F1FB;\n Tue, 10 Mar 2020 10:50:34 -0700 (PDT)", "from phil-VirtualBox.arm.com (A010647.Arm.com [10.170.243.28])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 86EAD3F534;\n Tue, 10 Mar 2020 10:50:31 -0700 (PDT)" ], "From": "Phil Yang <phil.yang@arm.com>", "To": "thomas@monjalon.net, harry.van.haaren@intel.com,\n konstantin.ananyev@intel.com, stephen@networkplumber.org,\n maxime.coquelin@redhat.com, dev@dpdk.org", "Cc": "david.marchand@redhat.com, jerinj@marvell.com, hemant.agrawal@nxp.com,\n Honnappa.Nagarahalli@arm.com, gavin.hu@arm.com, ruifeng.wang@arm.com,\n joyce.kong@arm.com, nd@arm.com", "Date": "Wed, 11 Mar 2020 01:49:11 +0800", "Message-Id": "<1583862551-2049-11-git-send-email-phil.yang@arm.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1583862551-2049-1-git-send-email-phil.yang@arm.com>", "References": "<1583862551-2049-1-git-send-email-phil.yang@arm.com>", "Subject": "[dpdk-dev] [PATCH 10/10] service: relax barriers with C11 atomic\n\toperations", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "To guarantee the inter-threads visibility of the shareable domain, it\nuses a lot of rte_smp_r/wmb in the service library. This patch relaxed\nthese barriers for service by using c11 atomic one-way barrier operations.\n\nSigned-off-by: Phil Yang <phil.yang@arm.com>\nReviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>\nReviewed-by: Gavin Hu <gavin.hu@arm.com>\n---\n lib/librte_eal/common/rte_service.c | 45 ++++++++++++++++++++-----------------\n 1 file changed, 25 insertions(+), 20 deletions(-)", "diff": "diff --git a/lib/librte_eal/common/rte_service.c b/lib/librte_eal/common/rte_service.c\nindex efb3c9f..68542b0 100644\n--- a/lib/librte_eal/common/rte_service.c\n+++ b/lib/librte_eal/common/rte_service.c\n@@ -176,9 +176,11 @@ rte_service_set_stats_enable(uint32_t id, int32_t enabled)\n \tSERVICE_VALID_GET_OR_ERR_RET(id, s, 0);\n \n \tif (enabled)\n-\t\ts->internal_flags |= SERVICE_F_STATS_ENABLED;\n+\t\t__atomic_or_fetch(&s->internal_flags, SERVICE_F_STATS_ENABLED,\n+\t\t\t__ATOMIC_RELEASE);\n \telse\n-\t\ts->internal_flags &= ~(SERVICE_F_STATS_ENABLED);\n+\t\t__atomic_and_fetch(&s->internal_flags,\n+\t\t\t~(SERVICE_F_STATS_ENABLED), __ATOMIC_RELEASE);\n \n \treturn 0;\n }\n@@ -190,9 +192,11 @@ rte_service_set_runstate_mapped_check(uint32_t id, int32_t enabled)\n \tSERVICE_VALID_GET_OR_ERR_RET(id, s, 0);\n \n \tif (enabled)\n-\t\ts->internal_flags |= SERVICE_F_START_CHECK;\n+\t\t__atomic_or_fetch(&s->internal_flags, SERVICE_F_START_CHECK,\n+\t\t\t__ATOMIC_RELEASE);\n \telse\n-\t\ts->internal_flags &= ~(SERVICE_F_START_CHECK);\n+\t\t__atomic_and_fetch(&s->internal_flags, ~(SERVICE_F_START_CHECK),\n+\t\t\t__ATOMIC_RELEASE);\n \n \treturn 0;\n }\n@@ -261,8 +265,8 @@ rte_service_component_register(const struct rte_service_spec *spec,\n \ts->spec = *spec;\n \ts->internal_flags |= SERVICE_F_REGISTERED | SERVICE_F_START_CHECK;\n \n-\trte_smp_wmb();\n-\trte_service_count++;\n+\t/* make sure the counter update after the state change. */\n+\t__atomic_add_fetch(&rte_service_count, 1, __ATOMIC_RELEASE);\n \n \tif (id_ptr)\n \t\t*id_ptr = free_slot;\n@@ -278,9 +282,10 @@ rte_service_component_unregister(uint32_t id)\n \tSERVICE_VALID_GET_OR_ERR_RET(id, s, -EINVAL);\n \n \trte_service_count--;\n-\trte_smp_wmb();\n \n-\ts->internal_flags &= ~(SERVICE_F_REGISTERED);\n+\t/* make sure the counter update before the state change. */\n+\t__atomic_and_fetch(&s->internal_flags, ~(SERVICE_F_REGISTERED),\n+\t\t\t __ATOMIC_RELEASE);\n \n \t/* clear the run-bit in all cores */\n \tfor (i = 0; i < RTE_MAX_LCORE; i++)\n@@ -298,11 +303,12 @@ rte_service_component_runstate_set(uint32_t id, uint32_t runstate)\n \tSERVICE_VALID_GET_OR_ERR_RET(id, s, -EINVAL);\n \n \tif (runstate)\n-\t\ts->comp_runstate = RUNSTATE_RUNNING;\n+\t\t__atomic_store_n(&s->comp_runstate, RUNSTATE_RUNNING,\n+\t\t\t\t__ATOMIC_RELEASE);\n \telse\n-\t\ts->comp_runstate = RUNSTATE_STOPPED;\n+\t\t__atomic_store_n(&s->comp_runstate, RUNSTATE_STOPPED,\n+\t\t\t\t__ATOMIC_RELEASE);\n \n-\trte_smp_wmb();\n \treturn 0;\n }\n \n@@ -313,11 +319,12 @@ rte_service_runstate_set(uint32_t id, uint32_t runstate)\n \tSERVICE_VALID_GET_OR_ERR_RET(id, s, -EINVAL);\n \n \tif (runstate)\n-\t\ts->app_runstate = RUNSTATE_RUNNING;\n+\t\t__atomic_store_n(&s->app_runstate, RUNSTATE_RUNNING,\n+\t\t\t\t__ATOMIC_RELEASE);\n \telse\n-\t\ts->app_runstate = RUNSTATE_STOPPED;\n+\t\t__atomic_store_n(&s->app_runstate, RUNSTATE_STOPPED,\n+\t\t\t\t__ATOMIC_RELEASE);\n \n-\trte_smp_wmb();\n \treturn 0;\n }\n \n@@ -439,7 +446,8 @@ service_runner_func(void *arg)\n \tconst int lcore = rte_lcore_id();\n \tstruct core_state *cs = &lcore_states[lcore];\n \n-\twhile (lcore_states[lcore].runstate == RUNSTATE_RUNNING) {\n+\twhile (__atomic_load_n(&cs->runstate,\n+\t\t __ATOMIC_ACQUIRE) == RUNSTATE_RUNNING) {\n \t\tconst uint64_t service_mask = cs->service_mask;\n \n \t\tfor (i = 0; i < RTE_SERVICE_NUM_MAX; i++) {\n@@ -450,8 +458,6 @@ service_runner_func(void *arg)\n \t\t}\n \n \t\tcs->loops++;\n-\n-\t\trte_smp_rmb();\n \t}\n \n \tlcore_config[lcore].state = WAIT;\n@@ -660,9 +666,8 @@ rte_service_lcore_add(uint32_t lcore)\n \n \t/* ensure that after adding a core the mask and state are defaults */\n \tlcore_states[lcore].service_mask = 0;\n-\tlcore_states[lcore].runstate = RUNSTATE_STOPPED;\n-\n-\trte_smp_wmb();\n+\t__atomic_store_n(&lcore_states[lcore].runstate, RUNSTATE_STOPPED,\n+\t\t\t__ATOMIC_RELEASE);\n \n \treturn rte_eal_wait_lcore(lcore);\n }\n", "prefixes": [ "10/10" ] }