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GET /api/patches/66523/?format=api
{ "id": 66523, "url": "http://patches.dpdk.org/api/patches/66523/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1583862551-2049-10-git-send-email-phil.yang@arm.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1583862551-2049-10-git-send-email-phil.yang@arm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1583862551-2049-10-git-send-email-phil.yang@arm.com", "date": "2020-03-10T17:49:10", "name": "[09/10] service: optimize with c11 one-way barrier", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "264f0c37e0696cbf7d7228e4fb5cac17e9ab5c38", "submitter": { "id": 833, "url": "http://patches.dpdk.org/api/people/833/?format=api", "name": "Phil Yang", "email": "phil.yang@arm.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1583862551-2049-10-git-send-email-phil.yang@arm.com/mbox/", "series": [ { "id": 8875, "url": "http://patches.dpdk.org/api/series/8875/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8875", "date": "2020-03-10T17:49:01", "name": "generic rte atomic APIs deprecate proposal", "version": 1, "mbox": "http://patches.dpdk.org/series/8875/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/66523/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/66523/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A05FDA0566;\n\tTue, 10 Mar 2020 18:51:36 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 2D0D41C0D9;\n\tTue, 10 Mar 2020 18:50:34 +0100 (CET)", "from foss.arm.com (foss.arm.com [217.140.110.172])\n by dpdk.org (Postfix) with ESMTP id 814261C0D7\n for <dev@dpdk.org>; Tue, 10 Mar 2020 18:50:31 +0100 (CET)", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1B76E1FB;\n Tue, 10 Mar 2020 10:50:31 -0700 (PDT)", "from phil-VirtualBox.arm.com (A010647.Arm.com [10.170.243.28])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8AEBD3F534;\n Tue, 10 Mar 2020 10:50:27 -0700 (PDT)" ], "From": "Phil Yang <phil.yang@arm.com>", "To": "thomas@monjalon.net, harry.van.haaren@intel.com,\n konstantin.ananyev@intel.com, stephen@networkplumber.org,\n maxime.coquelin@redhat.com, dev@dpdk.org", "Cc": "david.marchand@redhat.com, jerinj@marvell.com, hemant.agrawal@nxp.com,\n Honnappa.Nagarahalli@arm.com, gavin.hu@arm.com, ruifeng.wang@arm.com,\n joyce.kong@arm.com, nd@arm.com", "Date": "Wed, 11 Mar 2020 01:49:10 +0800", "Message-Id": "<1583862551-2049-10-git-send-email-phil.yang@arm.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1583862551-2049-1-git-send-email-phil.yang@arm.com>", "References": "<1583862551-2049-1-git-send-email-phil.yang@arm.com>", "Subject": "[dpdk-dev] [PATCH 09/10] service: optimize with c11 one-way barrier", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The num_mapped_cores and execute_lock are synchronized with rte_atomic_XX\nAPIs which is a full barrier, DMB, on aarch64. This patch optimized it with\nc11 atomic one-way barrier.\n\nSigned-off-by: Phil Yang <phil.yang@arm.com>\nReviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>\nReviewed-by: Gavin Hu <gavin.hu@arm.com>\nReviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>\n---\n lib/librte_eal/common/rte_service.c | 50 ++++++++++++++++++++++++++-----------\n 1 file changed, 35 insertions(+), 15 deletions(-)", "diff": "diff --git a/lib/librte_eal/common/rte_service.c b/lib/librte_eal/common/rte_service.c\nindex 0186024..efb3c9f 100644\n--- a/lib/librte_eal/common/rte_service.c\n+++ b/lib/librte_eal/common/rte_service.c\n@@ -42,7 +42,7 @@ struct rte_service_spec_impl {\n \t * running this service callback. When not set, a core may take the\n \t * lock and then run the service callback.\n \t */\n-\trte_atomic32_t execute_lock;\n+\tuint32_t execute_lock;\n \n \t/* API set/get-able variables */\n \tint8_t app_runstate;\n@@ -54,7 +54,7 @@ struct rte_service_spec_impl {\n \t * It does not indicate the number of cores the service is running\n \t * on currently.\n \t */\n-\trte_atomic32_t num_mapped_cores;\n+\tint32_t num_mapped_cores;\n \tuint64_t calls;\n \tuint64_t cycles_spent;\n } __rte_cache_aligned;\n@@ -329,7 +329,8 @@ rte_service_runstate_get(uint32_t id)\n \trte_smp_rmb();\n \n \tint check_disabled = !(s->internal_flags & SERVICE_F_START_CHECK);\n-\tint lcore_mapped = (rte_atomic32_read(&s->num_mapped_cores) > 0);\n+\tint lcore_mapped = (__atomic_load_n(&s->num_mapped_cores,\n+\t\t\t\t\t __ATOMIC_RELAXED) > 0);\n \n \treturn (s->app_runstate == RUNSTATE_RUNNING) &&\n \t\t(s->comp_runstate == RUNSTATE_RUNNING) &&\n@@ -372,11 +373,20 @@ service_run(uint32_t i, struct core_state *cs, uint64_t service_mask,\n \tcs->service_active_on_lcore[i] = 1;\n \n \tif ((service_mt_safe(s) == 0) && (serialize_mt_unsafe == 1)) {\n-\t\tif (!rte_atomic32_cmpset((uint32_t *)&s->execute_lock, 0, 1))\n+\t\tuint32_t expected = 0;\n+\t\t/* ACQUIRE ordering here is to prevent the callback\n+\t\t * function from hoisting up before the execute_lock\n+\t\t * setting.\n+\t\t */\n+\t\tif (!__atomic_compare_exchange_n(&s->execute_lock, &expected, 1,\n+\t\t\t 0, __ATOMIC_ACQUIRE, __ATOMIC_RELAXED))\n \t\t\treturn -EBUSY;\n \n \t\tservice_runner_do_callback(s, cs, i);\n-\t\trte_atomic32_clear(&s->execute_lock);\n+\t\t/* RELEASE ordering here is used to pair with ACQUIRE\n+\t\t * above to achieve lock semantic.\n+\t\t */\n+\t\t__atomic_store_n(&s->execute_lock, 0, __ATOMIC_RELEASE);\n \t} else\n \t\tservice_runner_do_callback(s, cs, i);\n \n@@ -412,11 +422,11 @@ rte_service_run_iter_on_app_lcore(uint32_t id, uint32_t serialize_mt_unsafe)\n \t/* Increment num_mapped_cores to indicate that the service is\n \t * is running on a core.\n \t */\n-\trte_atomic32_inc(&s->num_mapped_cores);\n+\t__atomic_add_fetch(&s->num_mapped_cores, 1, __ATOMIC_ACQUIRE);\n \n \tint ret = service_run(id, cs, UINT64_MAX, s, serialize_mt_unsafe);\n \n-\trte_atomic32_dec(&s->num_mapped_cores);\n+\t__atomic_sub_fetch(&s->num_mapped_cores, 1, __ATOMIC_RELEASE);\n \n \treturn ret;\n }\n@@ -549,24 +559,32 @@ service_update(uint32_t sid, uint32_t lcore,\n \n \tuint64_t sid_mask = UINT64_C(1) << sid;\n \tif (set) {\n-\t\tuint64_t lcore_mapped = lcore_states[lcore].service_mask &\n-\t\t\tsid_mask;\n+\t\t/* When multiple threads try to update the same lcore\n+\t\t * service concurrently, e.g. set lcore map followed\n+\t\t * by clear lcore map, the unsynchronized service_mask\n+\t\t * values have issues on the num_mapped_cores value\n+\t\t * consistency. So we use ACQUIRE ordering to pair with\n+\t\t * the RELEASE ordering to synchronize the service_mask.\n+\t\t */\n+\t\tuint64_t lcore_mapped = __atomic_load_n(\n+\t\t\t\t\t&lcore_states[lcore].service_mask,\n+\t\t\t\t\t__ATOMIC_ACQUIRE) & sid_mask;\n \n \t\tif (*set && !lcore_mapped) {\n \t\t\tlcore_states[lcore].service_mask |= sid_mask;\n-\t\t\trte_atomic32_inc(&rte_services[sid].num_mapped_cores);\n+\t\t\t__atomic_add_fetch(&rte_services[sid].num_mapped_cores,\n+\t\t\t\t\t 1, __ATOMIC_RELEASE);\n \t\t}\n \t\tif (!*set && lcore_mapped) {\n \t\t\tlcore_states[lcore].service_mask &= ~(sid_mask);\n-\t\t\trte_atomic32_dec(&rte_services[sid].num_mapped_cores);\n+\t\t\t__atomic_sub_fetch(&rte_services[sid].num_mapped_cores,\n+\t\t\t\t\t 1, __ATOMIC_RELEASE);\n \t\t}\n \t}\n \n \tif (enabled)\n \t\t*enabled = !!(lcore_states[lcore].service_mask & (sid_mask));\n \n-\trte_smp_wmb();\n-\n \treturn 0;\n }\n \n@@ -622,7 +640,8 @@ rte_service_lcore_reset_all(void)\n \t\t}\n \t}\n \tfor (i = 0; i < RTE_SERVICE_NUM_MAX; i++)\n-\t\trte_atomic32_set(&rte_services[i].num_mapped_cores, 0);\n+\t\t__atomic_store_n(&rte_services[i].num_mapped_cores, 0,\n+\t\t\t\t __ATOMIC_RELAXED);\n \n \trte_smp_wmb();\n \n@@ -705,7 +724,8 @@ rte_service_lcore_stop(uint32_t lcore)\n \t\tint32_t enabled = service_mask & (UINT64_C(1) << i);\n \t\tint32_t service_running = rte_service_runstate_get(i);\n \t\tint32_t only_core = (1 ==\n-\t\t\trte_atomic32_read(&rte_services[i].num_mapped_cores));\n+\t\t\t__atomic_load_n(&rte_services[i].num_mapped_cores,\n+\t\t\t\t\t__ATOMIC_RELAXED));\n \n \t\t/* if the core is mapped, and the service is running, and this\n \t\t * is the only core that is mapped, the service would cease to\n", "prefixes": [ "09/10" ] }