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GET /api/patches/66441/?format=api
{ "id": 66441, "url": "http://patches.dpdk.org/api/patches/66441/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200309114357.31800-25-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200309114357.31800-25-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200309114357.31800-25-qi.z.zhang@intel.com", "date": "2020-03-09T11:43:53", "name": "[24/28] net/ice/base: store NVM version info in extracted format", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "62c50bbf1ef19923567c6b773b78fe67dc123c7a", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 31221, "url": "http://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200309114357.31800-25-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 8843, "url": "http://patches.dpdk.org/api/series/8843/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8843", "date": "2020-03-09T11:43:29", "name": "update ice base code", "version": 1, "mbox": "http://patches.dpdk.org/series/8843/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/66441/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/66441/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 05BD4A052E;\n\tMon, 9 Mar 2020 12:44:27 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 338581C1C3;\n\tMon, 9 Mar 2020 12:41:20 +0100 (CET)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n by dpdk.org (Postfix) with ESMTP id 5D4F81C1C3\n for <dev@dpdk.org>; Mon, 9 Mar 2020 12:41:18 +0100 (CET)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 09 Mar 2020 04:41:17 -0700", "from dpdk51.sh.intel.com ([10.67.110.245])\n by fmsmga002.fm.intel.com with ESMTP; 09 Mar 2020 04:41:15 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.70,533,1574150400\"; d=\"scan'208\";a=\"276483650\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com,\n\tbeilei.xing@intel.com", "Cc": "xiaolong.ye@intel.com, dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Jacob Keller <jacob.e.keller@intel.com>,\n Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Mon, 9 Mar 2020 19:43:53 +0800", "Message-Id": "<20200309114357.31800-25-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20200309114357.31800-1-qi.z.zhang@intel.com>", "References": "<20200309114357.31800-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH 24/28] net/ice/base: store NVM version info in\n\textracted format", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Currently the NVM and Option ROM version information is stored in\na minimal format. The ice_get_nvm_version function exists to extract\nthis information for display.\n\nThis needlessly complicates using these fields as the extraction\nfunction must be called to parse the NVM and Option ROM data. Further\nconfusion occurs because the prefix of \"oem_\" is used for the Option\nROM version. This appears to have been done because the Option ROM data\nwas requested for display by OEMs.\n\nRefactor this code so that the NVM version and Option ROM version\ncomponents are extracted immediately.\n\nIntroduce a new struct ice_orom_info which will store the Option ROM\nmajor, build, and patch numbers. Introduce the new major_ver and\nminor_ver fields to store the NVM version in its high and low byte\ncomponents.\n\nRemove the ice_get_nvm_version function. Instead, use the same logic to\nconvert the fields read from the NVM into the extracted format.\n\nThis simplifies use of these fields as they will be stored already\nparsed, without needing to use the bit masks or call\nice_get_nvm_version.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_common.c | 39 +++++-----------\n drivers/net/ice/base/ice_common.h | 3 --\n drivers/net/ice/base/ice_nvm.c | 94 ++++++++++++++++++++++++++-------------\n drivers/net/ice/base/ice_type.h | 26 +++++++----\n drivers/net/ice/ice_ethdev.c | 16 +++----\n 5 files changed, 96 insertions(+), 82 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex afc0bb413..e9ea53f1f 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -569,42 +569,20 @@ static void ice_get_itr_intrl_gran(struct ice_hw *hw)\n }\n \n /**\n- * ice_get_nvm_version - get cached NVM version data\n- * @hw: pointer to the hardware structure\n- * @oem_ver: 8 bit NVM version\n- * @oem_build: 16 bit NVM build number\n- * @oem_patch: 8 NVM patch number\n- * @ver_hi: high 16 bits of the NVM version\n- * @ver_lo: low 16 bits of the NVM version\n- */\n-void\n-ice_get_nvm_version(struct ice_hw *hw, u8 *oem_ver, u16 *oem_build,\n-\t\t u8 *oem_patch, u8 *ver_hi, u8 *ver_lo)\n-{\n-\tstruct ice_nvm_info *nvm = &hw->nvm;\n-\n-\t*oem_ver = (u8)((nvm->oem_ver & ICE_OEM_VER_MASK) >> ICE_OEM_VER_SHIFT);\n-\t*oem_patch = (u8)(nvm->oem_ver & ICE_OEM_VER_PATCH_MASK);\n-\t*oem_build = (u16)((nvm->oem_ver & ICE_OEM_VER_BUILD_MASK) >>\n-\t\t\t ICE_OEM_VER_BUILD_SHIFT);\n-\t*ver_hi = (nvm->ver & ICE_NVM_VER_HI_MASK) >> ICE_NVM_VER_HI_SHIFT;\n-\t*ver_lo = (nvm->ver & ICE_NVM_VER_LO_MASK) >> ICE_NVM_VER_LO_SHIFT;\n-}\n-\n-/**\n * ice_print_rollback_msg - print FW rollback message\n * @hw: pointer to the hardware structure\n */\n void ice_print_rollback_msg(struct ice_hw *hw)\n {\n \tchar nvm_str[ICE_NVM_VER_LEN] = { 0 };\n-\tu8 oem_ver, oem_patch, ver_hi, ver_lo;\n-\tu16 oem_build;\n+\tstruct ice_nvm_info *nvm = &hw->nvm;\n+\tstruct ice_orom_info *orom;\n+\n+\torom = &nvm->orom;\n \n-\tice_get_nvm_version(hw, &oem_ver, &oem_build, &oem_patch, &ver_hi,\n-\t\t\t &ver_lo);\n-\tSNPRINTF(nvm_str, sizeof(nvm_str), \"%x.%02x 0x%x %d.%d.%d\", ver_hi,\n-\t\t ver_lo, hw->nvm.eetrack, oem_ver, oem_build, oem_patch);\n+\tSNPRINTF(nvm_str, sizeof(nvm_str), \"%x.%02x 0x%x %d.%d.%d\",\n+\t\t nvm->major_ver, nvm->minor_ver, nvm->eetrack, orom->major,\n+\t\t orom->build, orom->patch);\n \tice_warn(hw,\n \t\t \"Firmware rollback mode detected. Current version is NVM: %s, FW: %d.%d. Device may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode\\n\",\n \t\t nvm_str, hw->fw_maj_ver, hw->fw_min_ver);\n@@ -2691,6 +2669,7 @@ ice_copy_phy_caps_to_cfg(struct ice_aqc_get_phy_caps_data *caps,\n \tif (!caps || !cfg)\n \t\treturn;\n \n+\tice_memset(cfg, 0, sizeof(*cfg), ICE_NONDMA_MEM);\n \tcfg->phy_type_low = caps->phy_type_low;\n \tcfg->phy_type_high = caps->phy_type_high;\n \tcfg->caps = caps->caps;\n@@ -2698,6 +2677,8 @@ ice_copy_phy_caps_to_cfg(struct ice_aqc_get_phy_caps_data *caps,\n \tcfg->eee_cap = caps->eee_cap;\n \tcfg->eeer_value = caps->eeer_value;\n \tcfg->link_fec_opt = caps->link_fec_options;\n+\tcfg->module_compliance_enforcement =\n+\t\tcaps->module_compliance_enforcement;\n }\n \n /**\ndiff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h\nindex 4e2e25744..625a5dbf7 100644\n--- a/drivers/net/ice/base/ice_common.h\n+++ b/drivers/net/ice/base/ice_common.h\n@@ -213,9 +213,6 @@ ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,\n void\n ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded,\n \t\t struct ice_eth_stats *cur_stats);\n-void\n-ice_get_nvm_version(struct ice_hw *hw, u8 *oem_ver, u16 *oem_build,\n-\t\t u8 *oem_patch, u8 *ver_hi, u8 *ver_lo);\n enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw);\n void ice_print_rollback_msg(struct ice_hw *hw);\n enum ice_status\ndiff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c\nindex b679f43d7..1c7050c31 100644\n--- a/drivers/net/ice/base/ice_nvm.c\n+++ b/drivers/net/ice/base/ice_nvm.c\n@@ -235,6 +235,62 @@ enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)\n }\n \n /**\n+ * ice_get_orom_ver_info - Read Option ROM version information\n+ * @hw: pointer to the HW struct\n+ *\n+ * Read the Combo Image version data from the Boot Configuration TLV and fill\n+ * in the option ROM version data.\n+ */\n+static enum ice_status ice_get_orom_ver_info(struct ice_hw *hw)\n+{\n+\tu16 combo_hi, combo_lo, boot_cfg_tlv, boot_cfg_tlv_len;\n+\tstruct ice_orom_info *orom = &hw->nvm.orom;\n+\tenum ice_status status;\n+\tu32 combo_ver;\n+\n+\tstatus = ice_get_pfa_module_tlv(hw, &boot_cfg_tlv, &boot_cfg_tlv_len,\n+\t\t\t\t\tICE_SR_BOOT_CFG_PTR);\n+\tif (status) {\n+\t\tice_debug(hw, ICE_DBG_INIT,\n+\t\t\t \"Failed to read Boot Configuration Block TLV.\\n\");\n+\t\treturn status;\n+\t}\n+\n+\t/* Boot Configuration Block must have length at least 2 words\n+\t * (Combo Image Version High and Combo Image Version Low)\n+\t */\n+\tif (boot_cfg_tlv_len < 2) {\n+\t\tice_debug(hw, ICE_DBG_INIT,\n+\t\t\t \"Invalid Boot Configuration Block TLV size.\\n\");\n+\t\treturn ICE_ERR_INVAL_SIZE;\n+\t}\n+\n+\tstatus = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OROM_VER_OFF),\n+\t\t\t\t &combo_hi);\n+\tif (status) {\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read OROM_VER hi.\\n\");\n+\t\treturn status;\n+\t}\n+\n+\tstatus = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OROM_VER_OFF + 1),\n+\t\t\t\t &combo_lo);\n+\tif (status) {\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read OROM_VER lo.\\n\");\n+\t\treturn status;\n+\t}\n+\n+\tcombo_ver = ((u32)combo_hi << 16) | combo_lo;\n+\n+\torom->major = (u8)((combo_ver & ICE_OROM_VER_MASK) >>\n+\t\t\t ICE_OROM_VER_SHIFT);\n+\torom->patch = (u8)(combo_ver & ICE_OROM_VER_PATCH_MASK);\n+\torom->build = (u16)((combo_ver & ICE_OROM_VER_BUILD_MASK) >>\n+\t\t\t ICE_OROM_VER_BUILD_SHIFT);\n+\n+\treturn ICE_SUCCESS;\n+}\n+\n+/**\n * ice_init_nvm - initializes NVM setting\n * @hw: pointer to the HW struct\n *\n@@ -243,9 +299,8 @@ enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)\n */\n enum ice_status ice_init_nvm(struct ice_hw *hw)\n {\n-\tu16 oem_hi, oem_lo, boot_cfg_tlv, boot_cfg_tlv_len;\n \tstruct ice_nvm_info *nvm = &hw->nvm;\n-\tu16 eetrack_lo, eetrack_hi;\n+\tu16 eetrack_lo, eetrack_hi, ver;\n \tenum ice_status status;\n \tu32 fla, gens_stat;\n \tu8 sr_size;\n@@ -273,12 +328,14 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)\n \t\treturn ICE_ERR_NVM_BLANK_MODE;\n \t}\n \n-\tstatus = ice_read_sr_word(hw, ICE_SR_NVM_DEV_STARTER_VER, &nvm->ver);\n+\tstatus = ice_read_sr_word(hw, ICE_SR_NVM_DEV_STARTER_VER, &ver);\n \tif (status) {\n \t\tice_debug(hw, ICE_DBG_INIT,\n \t\t\t \"Failed to read DEV starter version.\\n\");\n \t\treturn status;\n \t}\n+\tnvm->major_ver = (ver & ICE_NVM_VER_HI_MASK) >> ICE_NVM_VER_HI_SHIFT;\n+\tnvm->minor_ver = (ver & ICE_NVM_VER_LO_MASK) >> ICE_NVM_VER_LO_SHIFT;\n \n \tstatus = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_LO, &eetrack_lo);\n \tif (status) {\n@@ -309,39 +366,12 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)\n \t\tbreak;\n \t}\n \n-\tstatus = ice_get_pfa_module_tlv(hw, &boot_cfg_tlv, &boot_cfg_tlv_len,\n-\t\t\t\t\tICE_SR_BOOT_CFG_PTR);\n+\tstatus = ice_get_orom_ver_info(hw);\n \tif (status) {\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"Failed to read Boot Configuration Block TLV.\\n\");\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read Option ROM info.\\n\");\n \t\treturn status;\n \t}\n \n-\t/* Boot Configuration Block must have length at least 2 words\n-\t * (Combo Image Version High and Combo Image Version Low)\n-\t */\n-\tif (boot_cfg_tlv_len < 2) {\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"Invalid Boot Configuration Block TLV size.\\n\");\n-\t\treturn ICE_ERR_INVAL_SIZE;\n-\t}\n-\n-\tstatus = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OEM_VER_OFF),\n-\t\t\t\t &oem_hi);\n-\tif (status) {\n-\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read OEM_VER hi.\\n\");\n-\t\treturn status;\n-\t}\n-\n-\tstatus = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OEM_VER_OFF + 1),\n-\t\t\t\t &oem_lo);\n-\tif (status) {\n-\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read OEM_VER lo.\\n\");\n-\t\treturn status;\n-\t}\n-\n-\tnvm->oem_ver = ((u32)oem_hi << 16) | oem_lo;\n-\n \treturn ICE_SUCCESS;\n }\n \ndiff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h\nindex 00459bcc8..89d476482 100644\n--- a/drivers/net/ice/base/ice_type.h\n+++ b/drivers/net/ice/base/ice_type.h\n@@ -476,12 +476,20 @@ struct ice_fc_info {\n \tenum ice_fc_mode req_mode;\t/* FC mode requested by caller */\n };\n \n+/* Option ROM version information */\n+struct ice_orom_info {\n+\tu8 major;\t\t\t/* Major version of OROM */\n+\tu8 patch;\t\t\t/* Patch version of OROM */\n+\tu16 build;\t\t\t/* Build version of OROM */\n+};\n+\n /* NVM Information */\n struct ice_nvm_info {\n+\tstruct ice_orom_info orom;\t/* Option ROM version info */\n \tu32 eetrack;\t\t\t/* NVM data version */\n-\tu32 oem_ver;\t\t\t/* OEM version info */\n \tu16 sr_words;\t\t\t/* Shadow RAM size in words */\n-\tu16 ver;\t\t\t/* dev starter version */\n+\tu8 major_ver;\t\t\t/* major version of dev starter */\n+\tu8 minor_ver;\t\t\t/* minor version of dev starter */\n \tu8 blank_nvm_mode;\t\t/* is NVM empty (no FW present)*/\n };\n \n@@ -991,7 +999,7 @@ enum ice_sw_fwd_act_type {\n #define ICE_SR_PBA_BLOCK_PTR\t\t\t0x16\n #define ICE_SR_BOOT_CFG_PTR\t\t\t0x132\n #define ICE_SR_NVM_WOL_CFG\t\t\t0x19\n-#define ICE_NVM_OEM_VER_OFF\t\t\t0x02\n+#define ICE_NVM_OROM_VER_OFF\t\t\t0x02\n #define ICE_SR_NVM_DEV_STARTER_VER\t\t0x18\n #define ICE_SR_ALTERNATE_SAN_MAC_ADDR_PTR\t0x27\n #define ICE_SR_PERMANENT_SAN_MAC_ADDR_PTR\t0x28\n@@ -1005,12 +1013,12 @@ enum ice_sw_fwd_act_type {\n #define ICE_NVM_VER_HI_SHIFT\t\t\t12\n #define ICE_NVM_VER_HI_MASK\t\t\t(0xf << ICE_NVM_VER_HI_SHIFT)\n #define ICE_OEM_EETRACK_ID\t\t\t0xffffffff\n-#define ICE_OEM_VER_PATCH_SHIFT\t\t\t0\n-#define ICE_OEM_VER_PATCH_MASK\t\t(0xff << ICE_OEM_VER_PATCH_SHIFT)\n-#define ICE_OEM_VER_BUILD_SHIFT\t\t\t8\n-#define ICE_OEM_VER_BUILD_MASK\t\t(0xffff << ICE_OEM_VER_BUILD_SHIFT)\n-#define ICE_OEM_VER_SHIFT\t\t\t24\n-#define ICE_OEM_VER_MASK\t\t\t(0xff << ICE_OEM_VER_SHIFT)\n+#define ICE_OROM_VER_PATCH_SHIFT\t\t0\n+#define ICE_OROM_VER_PATCH_MASK\t\t(0xff << ICE_OROM_VER_PATCH_SHIFT)\n+#define ICE_OROM_VER_BUILD_SHIFT\t\t8\n+#define ICE_OROM_VER_BUILD_MASK\t\t(0xffff << ICE_OROM_VER_BUILD_SHIFT)\n+#define ICE_OROM_VER_SHIFT\t\t\t24\n+#define ICE_OROM_VER_MASK\t\t\t(0xff << ICE_OROM_VER_SHIFT)\n #define ICE_SR_VPD_PTR\t\t\t\t0x2F\n #define ICE_SR_PXE_SETUP_PTR\t\t\t0x30\n #define ICE_SR_PXE_CFG_CUST_OPTIONS_PTR\t\t0x31\ndiff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex 65015e9fd..b42deb0bc 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -3849,21 +3849,19 @@ static int\n ice_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)\n {\n \tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tu32 full_ver;\n \tu8 ver, patch;\n \tu16 build;\n \tint ret;\n \n-\tfull_ver = hw->nvm.oem_ver;\n-\tver = (u8)(full_ver >> 24);\n-\tbuild = (u16)((full_ver >> 8) & 0xffff);\n-\tpatch = (u8)(full_ver & 0xff);\n+\tver = hw->nvm.orom.major;\n+\tpatch = hw->nvm.orom.patch;\n+\tbuild = hw->nvm.orom.build;\n \n \tret = snprintf(fw_version, fw_size,\n-\t\t\t\"%d.%d%d 0x%08x %d.%d.%d\",\n-\t\t\t((hw->nvm.ver >> 12) & 0xf),\n-\t\t\t((hw->nvm.ver >> 4) & 0xff),\n-\t\t\t(hw->nvm.ver & 0xf), hw->nvm.eetrack,\n+\t\t\t\"%d.%d 0x%08x %d.%d.%d\",\n+\t\t\thw->nvm.major_ver,\n+\t\t\thw->nvm.minor_ver,\n+\t\t\thw->nvm.eetrack,\n \t\t\tver, build, patch);\n \n \t/* add the size of '\\0' */\n", "prefixes": [ "24/28" ] }