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GET /api/patches/66304/?format=api
{ "id": 66304, "url": "http://patches.dpdk.org/api/patches/66304/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200305153454.724874-2-pablo.de.lara.guarch@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200305153454.724874-2-pablo.de.lara.guarch@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200305153454.724874-2-pablo.de.lara.guarch@intel.com", "date": "2020-03-05T15:34:50", "name": "[RFC,1/5] crypto/zuc: use IPSec MB library v0.53", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": true, "hash": "9fa91436b8a55898991e856d432456d1b2324da8", "submitter": { "id": 9, "url": "http://patches.dpdk.org/api/people/9/?format=api", "name": "De Lara Guarch, Pablo", "email": "pablo.de.lara.guarch@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200305153454.724874-2-pablo.de.lara.guarch@intel.com/mbox/", "series": [ { "id": 8802, "url": "http://patches.dpdk.org/api/series/8802/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8802", "date": "2020-03-05T15:34:49", "name": "Support Intel IPSec MB v0.53 in DPDK 18.11", "version": 1, "mbox": "http://patches.dpdk.org/series/8802/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/66304/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/66304/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id DE65EA0564;\n\tThu, 5 Mar 2020 18:09:48 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 5EBC71BFDA;\n\tThu, 5 Mar 2020 18:09:40 +0100 (CET)", "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n by dpdk.org (Postfix) with ESMTP id 3282F2BA8\n for <dev@dpdk.org>; Thu, 5 Mar 2020 18:09:37 +0100 (CET)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 05 Mar 2020 09:09:36 -0800", "from silpixa00400565.ir.intel.com (HELO\n silpixa00400565.ger.corp.intel.com) ([10.237.222.249])\n by fmsmga002.fm.intel.com with ESMTP; 05 Mar 2020 09:09:35 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.70,518,1574150400\"; d=\"scan'208\";a=\"275173376\"", "From": "Pablo de Lara <pablo.de.lara.guarch@intel.com>", "To": "dev@dpdk.org", "Cc": "Pablo de Lara <pablo.de.lara.guarch@intel.com>", "Date": "Thu, 5 Mar 2020 15:34:50 +0000", "Message-Id": "<20200305153454.724874-2-pablo.de.lara.guarch@intel.com>", "X-Mailer": "git-send-email 2.24.1", "In-Reply-To": "<20200305153454.724874-1-pablo.de.lara.guarch@intel.com>", "References": "<20200305153454.724874-1-pablo.de.lara.guarch@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [RFC PATCH 1/5] crypto/zuc: use IPSec MB library v0.53", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Link against Intel IPSec Multi-buffer library, which\nadded support for ZUC-EEA3 and ZUC-EIA3 from version v0.53,\nmoving from libSSO ZUC library.\n\nSigned-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>\n---\n devtools/test-build.sh | 6 +--\n doc/guides/cryptodevs/zuc.rst | 52 ++++++++++++---------\n drivers/crypto/zuc/Makefile | 28 +++++++-----\n drivers/crypto/zuc/meson.build | 13 +++++-\n drivers/crypto/zuc/rte_zuc_pmd.c | 58 +++++++++++++++++-------\n drivers/crypto/zuc/rte_zuc_pmd_ops.c | 2 +\n drivers/crypto/zuc/rte_zuc_pmd_private.h | 6 ++-\n mk/rte.app.mk | 2 +-\n 8 files changed, 110 insertions(+), 57 deletions(-)", "diff": "diff --git a/devtools/test-build.sh b/devtools/test-build.sh\nindex 42f4ad003..911f77e01 100755\n--- a/devtools/test-build.sh\n+++ b/devtools/test-build.sh\n@@ -25,7 +25,6 @@ default_path=$PATH\n # - LIBMUSDK_PATH\n # - LIBSSO_SNOW3G_PATH\n # - LIBSSO_KASUMI_PATH\n-# - LIBSSO_ZUC_PATH\n . $(dirname $(readlink -e $0))/load-devel-config\n \n print_usage () {\n@@ -111,7 +110,6 @@ reset_env ()\n \tunset LIBMUSDK_PATH\n \tunset LIBSSO_SNOW3G_PATH\n \tunset LIBSSO_KASUMI_PATH\n-\tunset LIBSSO_ZUC_PATH\n \tunset PQOS_INSTALL_PATH\n }\n \n@@ -165,12 +163,12 @@ config () # <directory> <target> <options>\n \t\tsed -ri 's,(PMD_AESNI_MB=)n,\\1y,' $1/.config\n \t\ttest \"$DPDK_DEP_IPSEC_MB\" != y || \\\n \t\tsed -ri 's,(PMD_AESNI_GCM=)n,\\1y,' $1/.config\n+\t\ttest \"$DPDK_DEP_IPSEC_MB\" != y || \\\n+\t\tsed -ri 's,(PMD_ZUC=)n,\\1y,' $1/.config\n \t\ttest -z \"$LIBSSO_SNOW3G_PATH\" || \\\n \t\tsed -ri 's,(PMD_SNOW3G=)n,\\1y,' $1/.config\n \t\ttest -z \"$LIBSSO_KASUMI_PATH\" || \\\n \t\tsed -ri 's,(PMD_KASUMI=)n,\\1y,' $1/.config\n-\t\ttest -z \"$LIBSSO_ZUC_PATH\" || \\\n-\t\tsed -ri 's,(PMD_ZUC=)n,\\1y,' $1/.config\n \t\ttest \"$DPDK_DEP_SSL\" != y || \\\n \t\tsed -ri 's,(PMD_CCP=)n,\\1y,' $1/.config\n \t\ttest \"$DPDK_DEP_SSL\" != y || \\\ndiff --git a/doc/guides/cryptodevs/zuc.rst b/doc/guides/cryptodevs/zuc.rst\nindex e38989968..d4001b1f4 100644\n--- a/doc/guides/cryptodevs/zuc.rst\n+++ b/doc/guides/cryptodevs/zuc.rst\n@@ -1,12 +1,12 @@\n .. SPDX-License-Identifier: BSD-3-Clause\n- Copyright(c) 2016 Intel Corporation.\n+ Copyright(c) 2016-2019 Intel Corporation.\n \n ZUC Crypto Poll Mode Driver\n ===========================\n \n-The ZUC PMD (**librte_pmd_zuc**) provides poll mode crypto driver\n-support for utilizing Intel Libsso library, which implements F8 and F9 functions\n-for ZUC EEA3 cipher and EIA3 hash algorithms.\n+The ZUC PMD (**librte_pmd_zuc**) provides poll mode crypto driver support for\n+utilizing `Intel IPSec Multi-buffer library <https://github.com/01org/intel-ipsec-mb>`_\n+which implements F8 and F9 functions for ZUC EEA3 cipher and EIA3 hash algorithms.\n \n Features\n --------\n@@ -27,36 +27,46 @@ Limitations\n * Chained mbufs are not supported.\n * ZUC (EIA3) supported only if hash offset field is byte-aligned.\n * ZUC (EEA3) supported only if cipher length, cipher offset fields are byte-aligned.\n-* ZUC PMD cannot be built as a shared library, due to limitations in\n- in the underlying library.\n \n \n Installation\n ------------\n \n-To build DPDK with the ZUC_PMD the user is required to download\n-the export controlled ``libsso_zuc`` library, by registering in\n-`Intel Resource & Design Center <https://www.intel.com/content/www/us/en/design/resource-design-center.html>`_.\n-Once approval has been granted, the user needs to search for\n-*ZUC 128-EAA3 and 128-EIA3 3GPP cryptographic algorithms Software Library* to download the\n-library or directly through this `link <https://cdrdv2.intel.com/v1/dl/getContent/575868>`_.\n+To build DPDK with the ZUC_PMD the user is required to download the multi-buffer\n+library from `here <https://github.com/01org/intel-ipsec-mb>`_\n+and compile it on their user system before building DPDK.\n+The latest version of the library supported by this PMD is v0.53, which\n+can be downloaded from `<https://github.com/01org/intel-ipsec-mb/archive/v0.53.zip>`_.\n+\n After downloading the library, the user needs to unpack and compile it\n-on their system before building DPDK::\n+on their system before building DPDK:\n+\n+.. code-block:: console\n+\n+ make\n+ make install\n+\n+As a reference, the following table shows a mapping between the past DPDK versions\n+and the external crypto libraries supported by them:\n+\n+.. _table_zuc_versions:\n+\n+.. table:: DPDK and external crypto library version compatibility\n+\n+ ============= ================================\n+ DPDK version Crypto library version\n+ ============= ================================\n+ 16.11 - 19.11 LibSSO ZUC\n+ 20.02+ Multi-buffer library 0.53\n+ ============= ================================\n \n- make\n \n Initialization\n --------------\n \n In order to enable this virtual crypto PMD, user must:\n \n-* Export the environmental variable LIBSSO_ZUC_PATH with the path where\n- the library was extracted (zuc folder).\n-\n-* Export the environmental variable LD_LIBRARY_PATH with the path\n- where the built libsso library is (LIBSSO_ZUC_PATH/build).\n-\n-* Build the LIBSSO_ZUC library (explained in Installation section).\n+* Build the multi buffer library (explained in Installation section).\n \n * Build DPDK as follows:\n \ndiff --git a/drivers/crypto/zuc/Makefile b/drivers/crypto/zuc/Makefile\nindex 68d84eebc..cc0d7943b 100644\n--- a/drivers/crypto/zuc/Makefile\n+++ b/drivers/crypto/zuc/Makefile\n@@ -1,14 +1,8 @@\n # SPDX-License-Identifier: BSD-3-Clause\n-# Copyright(c) 2016 Intel Corporation\n+# Copyright(c) 2016-2019 Intel Corporation\n \n include $(RTE_SDK)/mk/rte.vars.mk\n \n-ifneq ($(MAKECMDGOALS),clean)\n-ifeq ($(LIBSSO_ZUC_PATH),)\n-$(error \"Please define LIBSSO_ZUC_PATH environment variable\")\n-endif\n-endif\n-\n # library name\n LIB = librte_pmd_zuc.a\n \n@@ -23,14 +17,26 @@ LIBABIVER := 1\n EXPORT_MAP := rte_pmd_zuc_version.map\n \n # external library dependencies\n-CFLAGS += -I$(LIBSSO_ZUC_PATH)\n-CFLAGS += -I$(LIBSSO_ZUC_PATH)/include\n-CFLAGS += -I$(LIBSSO_ZUC_PATH)/build\n-LDLIBS += -L$(LIBSSO_ZUC_PATH)/build -lsso_zuc\n+LDLIBS += -lIPSec_MB\n LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring\n LDLIBS += -lrte_cryptodev\n LDLIBS += -lrte_bus_vdev\n \n+IMB_HDR = $(shell echo '\\#include <intel-ipsec-mb.h>' | \\\n+\t$(CC) -E $(EXTRA_CFLAGS) - | grep 'intel-ipsec-mb.h' | \\\n+\thead -n1 | cut -d'\"' -f2)\n+\n+# Detect library version\n+IMB_VERSION = $(shell grep -e \"IMB_VERSION_STR\" $(IMB_HDR) | cut -d'\"' -f2)\n+IMB_VERSION_NUM = $(shell grep -e \"IMB_VERSION_NUM\" $(IMB_HDR) | cut -d' ' -f3)\n+\n+ifeq ($(IMB_VERSION),)\n+$(error \"IPSec_MB version >= 0.53 is required\")\n+endif\n+\n+ifeq ($(shell expr $(IMB_VERSION_NUM) \\< 0x3400), 1)\n+$(error \"IPSec_MB version >= 0.53 is required\")\n+endif\n # library source files\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_ZUC) += rte_zuc_pmd.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_ZUC) += rte_zuc_pmd_ops.c\ndiff --git a/drivers/crypto/zuc/meson.build b/drivers/crypto/zuc/meson.build\nindex b8ca7107e..f0fcd8246 100644\n--- a/drivers/crypto/zuc/meson.build\n+++ b/drivers/crypto/zuc/meson.build\n@@ -1,11 +1,20 @@\n # SPDX-License-Identifier: BSD-3-Clause\n-# Copyright(c) 2018 Intel Corporation\n+# Copyright(c) 2018-2020 Intel Corporation\n \n-lib = cc.find_library('libsso_zuc', required: false)\n+IMB_required_ver = '0.53.0'\n+lib = cc.find_library('IPSec_MB', required: false)\n if not lib.found()\n \tbuild = false\n else\n \text_deps += lib\n+\t# version comes with quotes, so we split based on \" and take the middle\n+\timb_ver = cc.get_define('IMB_VERSION_STR',\n+\t\tprefix : '#include<intel-ipsec-mb.h>').split('\"')[1]\n+\n+\tif (imb_ver == '') or (imb_ver.version_compare('<' + IMB_required_ver))\n+\t\tbuild = false\n+\tendif\n+\n endif\n \n sources = files('rte_zuc_pmd.c', 'rte_zuc_pmd_ops.c')\ndiff --git a/drivers/crypto/zuc/rte_zuc_pmd.c b/drivers/crypto/zuc/rte_zuc_pmd.c\nindex 313f4590b..c880eea7c 100644\n--- a/drivers/crypto/zuc/rte_zuc_pmd.c\n+++ b/drivers/crypto/zuc/rte_zuc_pmd.c\n@@ -11,7 +11,7 @@\n #include <rte_cpuflags.h>\n \n #include \"rte_zuc_pmd_private.h\"\n-#define ZUC_MAX_BURST 4\n+#define ZUC_MAX_BURST 16\n #define BYTE_LEN 8\n \n static uint8_t cryptodev_driver_id;\n@@ -169,16 +169,17 @@ zuc_get_session(struct zuc_qp *qp, struct rte_crypto_op *op)\n \n /** Encrypt/decrypt mbufs. */\n static uint8_t\n-process_zuc_cipher_op(struct rte_crypto_op **ops,\n+process_zuc_cipher_op(struct zuc_qp *qp, struct rte_crypto_op **ops,\n \t\tstruct zuc_session **sessions,\n \t\tuint8_t num_ops)\n {\n \tunsigned i;\n \tuint8_t processed_ops = 0;\n-\tuint8_t *src[ZUC_MAX_BURST], *dst[ZUC_MAX_BURST];\n-\tuint8_t *iv[ZUC_MAX_BURST];\n+\tconst void *src[ZUC_MAX_BURST];\n+\tvoid *dst[ZUC_MAX_BURST];\n+\tconst void *iv[ZUC_MAX_BURST];\n \tuint32_t num_bytes[ZUC_MAX_BURST];\n-\tuint8_t *cipher_keys[ZUC_MAX_BURST];\n+\tconst void *cipher_keys[ZUC_MAX_BURST];\n \tstruct zuc_session *sess;\n \n \tfor (i = 0; i < num_ops; i++) {\n@@ -221,7 +222,8 @@ process_zuc_cipher_op(struct rte_crypto_op **ops,\n \t\tprocessed_ops++;\n \t}\n \n-\tsso_zuc_eea3_n_buffer(cipher_keys, iv, src, dst,\n+\tIMB_ZUC_EEA3_N_BUFFER(qp->mb_mgr, (const void **)cipher_keys,\n+\t\t\t(const void **)iv, (const void **)src, (void **)dst,\n \t\t\tnum_bytes, processed_ops);\n \n \treturn processed_ops;\n@@ -261,7 +263,7 @@ process_zuc_hash_op(struct zuc_qp *qp, struct rte_crypto_op **ops,\n \t\tif (sess->auth_op == RTE_CRYPTO_AUTH_OP_VERIFY) {\n \t\t\tdst = (uint32_t *)qp->temp_digest;\n \n-\t\t\tsso_zuc_eia3_1_buffer(sess->pKey_hash,\n+\t\t\tIMB_ZUC_EIA3_1_BUFFER(qp->mb_mgr, sess->pKey_hash,\n \t\t\t\t\tiv, src,\n \t\t\t\t\tlength_in_bits,\tdst);\n \t\t\t/* Verify digest. */\n@@ -271,7 +273,7 @@ process_zuc_hash_op(struct zuc_qp *qp, struct rte_crypto_op **ops,\n \t\t} else {\n \t\t\tdst = (uint32_t *)ops[i]->sym->auth.digest.data;\n \n-\t\t\tsso_zuc_eia3_1_buffer(sess->pKey_hash,\n+\t\t\tIMB_ZUC_EIA3_1_BUFFER(qp->mb_mgr, sess->pKey_hash,\n \t\t\t\t\tiv, src,\n \t\t\t\t\tlength_in_bits, dst);\n \t\t}\n@@ -293,7 +295,7 @@ process_ops(struct rte_crypto_op **ops, enum zuc_operation op_type,\n \n \tswitch (op_type) {\n \tcase ZUC_OP_ONLY_CIPHER:\n-\t\tprocessed_ops = process_zuc_cipher_op(ops,\n+\t\tprocessed_ops = process_zuc_cipher_op(qp, ops,\n \t\t\t\tsessions, num_ops);\n \t\tbreak;\n \tcase ZUC_OP_ONLY_AUTH:\n@@ -301,14 +303,14 @@ process_ops(struct rte_crypto_op **ops, enum zuc_operation op_type,\n \t\t\t\tnum_ops);\n \t\tbreak;\n \tcase ZUC_OP_CIPHER_AUTH:\n-\t\tprocessed_ops = process_zuc_cipher_op(ops, sessions,\n+\t\tprocessed_ops = process_zuc_cipher_op(qp, ops, sessions,\n \t\t\t\tnum_ops);\n \t\tprocess_zuc_hash_op(qp, ops, sessions, processed_ops);\n \t\tbreak;\n \tcase ZUC_OP_AUTH_CIPHER:\n \t\tprocessed_ops = process_zuc_hash_op(qp, ops, sessions,\n \t\t\t\tnum_ops);\n-\t\tprocess_zuc_cipher_op(ops, sessions, processed_ops);\n+\t\tprocess_zuc_cipher_op(qp, ops, sessions, processed_ops);\n \t\tbreak;\n \tdefault:\n \t\t/* Operation not supported. */\n@@ -455,8 +457,7 @@ cryptodev_zuc_create(const char *name,\n {\n \tstruct rte_cryptodev *dev;\n \tstruct zuc_private *internals;\n-\tuint64_t cpu_flags = RTE_CRYPTODEV_FF_CPU_SSE;\n-\n+\tMB_MGR *mb_mgr;\n \n \tdev = rte_cryptodev_pmd_create(name, &vdev->device, init_params);\n \tif (dev == NULL) {\n@@ -464,6 +465,27 @@ cryptodev_zuc_create(const char *name,\n \t\tgoto init_error;\n \t}\n \n+\tdev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |\n+\t\t\tRTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING;\n+\n+\tmb_mgr = alloc_mb_mgr(0);\n+\tif (mb_mgr == NULL)\n+\t\treturn -ENOMEM;\n+\n+\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F)) {\n+\t\tdev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX512;\n+\t\tinit_mb_mgr_avx512(mb_mgr);\n+\t} else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) {\n+\t\tdev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX2;\n+\t\tinit_mb_mgr_avx2(mb_mgr);\n+\t} else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX)) {\n+\t\tdev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX;\n+\t\tinit_mb_mgr_avx(mb_mgr);\n+\t} else {\n+\t\tdev->feature_flags |= RTE_CRYPTODEV_FF_CPU_SSE;\n+\t\tinit_mb_mgr_sse(mb_mgr);\n+\t}\n+\n \tdev->driver_id = cryptodev_driver_id;\n \tdev->dev_ops = rte_zuc_pmd_ops;\n \n@@ -471,11 +493,8 @@ cryptodev_zuc_create(const char *name,\n \tdev->dequeue_burst = zuc_pmd_dequeue_burst;\n \tdev->enqueue_burst = zuc_pmd_enqueue_burst;\n \n-\tdev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |\n-\t\t\tRTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |\n-\t\t\tcpu_flags;\n-\n \tinternals = dev->data->dev_private;\n+\tinternals->mb_mgr = mb_mgr;\n \n \tinternals->max_nb_queue_pairs = init_params->max_nb_queue_pairs;\n \n@@ -516,6 +535,7 @@ cryptodev_zuc_remove(struct rte_vdev_device *vdev)\n \n \tstruct rte_cryptodev *cryptodev;\n \tconst char *name;\n+\tstruct zuc_private *internals;\n \n \tname = rte_vdev_device_name(vdev);\n \tif (name == NULL)\n@@ -525,6 +545,10 @@ cryptodev_zuc_remove(struct rte_vdev_device *vdev)\n \tif (cryptodev == NULL)\n \t\treturn -ENODEV;\n \n+\tinternals = cryptodev->data->dev_private;\n+\n+\tfree_mb_mgr(internals->mb_mgr);\n+\n \treturn rte_cryptodev_pmd_destroy(cryptodev);\n }\n \ndiff --git a/drivers/crypto/zuc/rte_zuc_pmd_ops.c b/drivers/crypto/zuc/rte_zuc_pmd_ops.c\nindex 6da396542..14a831867 100644\n--- a/drivers/crypto/zuc/rte_zuc_pmd_ops.c\n+++ b/drivers/crypto/zuc/rte_zuc_pmd_ops.c\n@@ -196,6 +196,7 @@ zuc_pmd_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n \t\tint socket_id, struct rte_mempool *session_pool)\n {\n \tstruct zuc_qp *qp = NULL;\n+\tstruct zuc_private *internals = dev->data->dev_private;\n \n \t/* Free memory prior to re-allocation if needed. */\n \tif (dev->data->queue_pairs[qp_id] != NULL)\n@@ -218,6 +219,7 @@ zuc_pmd_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n \tif (qp->processed_ops == NULL)\n \t\tgoto qp_setup_cleanup;\n \n+\tqp->mb_mgr = internals->mb_mgr;\n \tqp->sess_mp = session_pool;\n \n \tmemset(&qp->qp_stats, 0, sizeof(qp->qp_stats));\ndiff --git a/drivers/crypto/zuc/rte_zuc_pmd_private.h b/drivers/crypto/zuc/rte_zuc_pmd_private.h\nindex 5e5906ddb..e049df377 100644\n--- a/drivers/crypto/zuc/rte_zuc_pmd_private.h\n+++ b/drivers/crypto/zuc/rte_zuc_pmd_private.h\n@@ -5,7 +5,7 @@\n #ifndef _RTE_ZUC_PMD_PRIVATE_H_\n #define _RTE_ZUC_PMD_PRIVATE_H_\n \n-#include <sso_zuc.h>\n+#include <intel-ipsec-mb.h>\n \n #define CRYPTODEV_NAME_ZUC_PMD\t\tcrypto_zuc\n /**< KASUMI PMD device name */\n@@ -24,6 +24,8 @@ int zuc_logtype_driver;\n struct zuc_private {\n \tunsigned max_nb_queue_pairs;\n \t/**< Max number of queue pairs supported by device */\n+\tMB_MGR *mb_mgr;\n+\t/**< Multi-buffer instance */\n };\n \n /** ZUC buffer queue pair */\n@@ -43,6 +45,8 @@ struct zuc_qp {\n \t * by the driver when verifying a digest provided\n \t * by the user (using authentication verify operation)\n \t */\n+\tMB_MGR *mb_mgr;\n+\t/**< Multi-buffer instance */\n } __rte_cache_aligned;\n \n enum zuc_operation {\ndiff --git a/mk/rte.app.mk b/mk/rte.app.mk\nindex 5699d979d..7c04ee490 100644\n--- a/mk/rte.app.mk\n+++ b/mk/rte.app.mk\n@@ -233,7 +233,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_SNOW3G) += -L$(LIBSSO_SNOW3G_PATH)/build -l\n _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_KASUMI) += -lrte_pmd_kasumi\n _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_KASUMI) += -L$(LIBSSO_KASUMI_PATH)/build -lsso_kasumi\n _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_ZUC) += -lrte_pmd_zuc\n-_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_ZUC) += -L$(LIBSSO_ZUC_PATH)/build -lsso_zuc\n+_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_ZUC) += -lIPSec_MB\n _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO) += -lrte_pmd_armv8\n _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO) += -L$(ARMV8_CRYPTO_LIB_PATH) -larmv8_crypto\n _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO) += -L$(LIBMUSDK_PATH)/lib -lrte_pmd_mvsam_crypto -lmusdk\n", "prefixes": [ "RFC", "1/5" ] }