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{
    "id": 66255,
    "url": "http://patches.dpdk.org/api/patches/66255/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1583346152-10186-9-git-send-email-nicolas.chautru@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1583346152-10186-9-git-send-email-nicolas.chautru@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1583346152-10186-9-git-send-email-nicolas.chautru@intel.com",
    "date": "2020-03-04T18:22:25",
    "name": "[v2,08/15] test-bbdev: support for LDPC interrupt test",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "33a7f7ca93f30e37a16ce77c1e2a1213ba8ca59d",
    "submitter": {
        "id": 1314,
        "url": "http://patches.dpdk.org/api/people/1314/?format=api",
        "name": "Chautru, Nicolas",
        "email": "nicolas.chautru@intel.com"
    },
    "delegate": {
        "id": 6690,
        "url": "http://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1583346152-10186-9-git-send-email-nicolas.chautru@intel.com/mbox/",
    "series": [
        {
            "id": 8783,
            "url": "http://patches.dpdk.org/api/series/8783/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8783",
            "date": "2020-03-04T18:22:17",
            "name": "bbdev new features",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/8783/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/66255/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/66255/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E1998A0573;\n\tWed,  4 Mar 2020 19:23:58 +0100 (CET)",
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        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
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        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.70,514,1574150400\"; d=\"scan'208\";a=\"234199016\"",
        "From": "Nicolas Chautru <nicolas.chautru@intel.com>",
        "To": "thomas@monjalon.net,\n\takhil.goyal@nxp.com,\n\tdev@dpdk.org",
        "Cc": "ferruh.yigit@intel.com,\n\tNic Chautru <nicolas.chautru@intel.com>",
        "Date": "Wed,  4 Mar 2020 10:22:25 -0800",
        "Message-Id": "<1583346152-10186-9-git-send-email-nicolas.chautru@intel.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1583346152-10186-1-git-send-email-nicolas.chautru@intel.com>",
        "References": "<1582778348-113547-15-git-send-email-nicolas.chautru@intel.com>\n <1583346152-10186-1-git-send-email-nicolas.chautru@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v2 08/15] test-bbdev: support for LDPC interrupt\n\ttest",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Nic Chautru <nicolas.chautru@intel.com>\n\nAdding missing implementation for the interrupt tests\nfor LDPC encoder and decoders.\n\nSigned-off-by: Nic Chautru <nicolas.chautru@intel.com>\n---\n app/test-bbdev/test_bbdev_perf.c | 202 ++++++++++++++++++++++++++++++++++++++-\n 1 file changed, 200 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test-bbdev/test_bbdev_perf.c\nindex 7bc824b..8fcdda0 100644\n--- a/app/test-bbdev/test_bbdev_perf.c\n+++ b/app/test-bbdev/test_bbdev_perf.c\n@@ -745,6 +745,9 @@ typedef int (test_case_function)(struct active_device *ad,\n \t/* Clear active devices structs. */\n \tmemset(active_devs, 0, sizeof(active_devs));\n \tnb_active_devs = 0;\n+\n+\t/* Disable interrupts */\n+\tintr_enabled = false;\n }\n \n static int\n@@ -2457,6 +2460,109 @@ typedef int (test_case_function)(struct active_device *ad,\n }\n \n static int\n+throughput_intr_lcore_ldpc_dec(void *arg)\n+{\n+\tstruct thread_params *tp = arg;\n+\tunsigned int enqueued;\n+\tconst uint16_t queue_id = tp->queue_id;\n+\tconst uint16_t burst_sz = tp->op_params->burst_sz;\n+\tconst uint16_t num_to_process = tp->op_params->num_to_process;\n+\tstruct rte_bbdev_dec_op *ops[num_to_process];\n+\tstruct test_buffers *bufs = NULL;\n+\tstruct rte_bbdev_info info;\n+\tint ret, i, j;\n+\tstruct rte_bbdev_dec_op *ref_op = tp->op_params->ref_dec_op;\n+\tuint16_t num_to_enq, enq;\n+\n+\tbool loopback = check_bit(ref_op->ldpc_dec.op_flags,\n+\t\t\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK);\n+\tbool hc_out = check_bit(ref_op->ldpc_dec.op_flags,\n+\t\t\tRTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE);\n+\n+\tTEST_ASSERT_SUCCESS((burst_sz > MAX_BURST),\n+\t\t\t\"BURST_SIZE should be <= %u\", MAX_BURST);\n+\n+\tTEST_ASSERT_SUCCESS(rte_bbdev_queue_intr_enable(tp->dev_id, queue_id),\n+\t\t\t\"Failed to enable interrupts for dev: %u, queue_id: %u\",\n+\t\t\ttp->dev_id, queue_id);\n+\n+\trte_bbdev_info_get(tp->dev_id, &info);\n+\n+\tTEST_ASSERT_SUCCESS((num_to_process > info.drv.queue_size_lim),\n+\t\t\t\"NUM_OPS cannot exceed %u for this device\",\n+\t\t\tinfo.drv.queue_size_lim);\n+\n+\tbufs = &tp->op_params->q_bufs[GET_SOCKET(info.socket_id)][queue_id];\n+\n+\trte_atomic16_clear(&tp->processing_status);\n+\trte_atomic16_clear(&tp->nb_dequeued);\n+\n+\twhile (rte_atomic16_read(&tp->op_params->sync) == SYNC_WAIT)\n+\t\trte_pause();\n+\n+\tret = rte_bbdev_dec_op_alloc_bulk(tp->op_params->mp, ops,\n+\t\t\t\tnum_to_process);\n+\tTEST_ASSERT_SUCCESS(ret, \"Allocation failed for %d ops\",\n+\t\t\tnum_to_process);\n+\tif (test_vector.op_type != RTE_BBDEV_OP_NONE)\n+\t\tcopy_reference_ldpc_dec_op(ops, num_to_process, 0, bufs->inputs,\n+\t\t\t\tbufs->hard_outputs, bufs->soft_outputs,\n+\t\t\t\tbufs->harq_inputs, bufs->harq_outputs, ref_op);\n+\n+\t/* Set counter to validate the ordering */\n+\tfor (j = 0; j < num_to_process; ++j)\n+\t\tops[j]->opaque_data = (void *)(uintptr_t)j;\n+\n+\tfor (j = 0; j < TEST_REPETITIONS; ++j) {\n+\t\tfor (i = 0; i < num_to_process; ++i) {\n+\t\t\tif (!loopback)\n+\t\t\t\trte_pktmbuf_reset(\n+\t\t\t\t\tops[i]->ldpc_dec.hard_output.data);\n+\t\t\tif (hc_out || loopback)\n+\t\t\t\tmbuf_reset(\n+\t\t\t\tops[i]->ldpc_dec.harq_combined_output.data);\n+\t\t}\n+\n+\t\ttp->start_time = rte_rdtsc_precise();\n+\t\tfor (enqueued = 0; enqueued < num_to_process;) {\n+\t\t\tnum_to_enq = burst_sz;\n+\n+\t\t\tif (unlikely(num_to_process - enqueued < num_to_enq))\n+\t\t\t\tnum_to_enq = num_to_process - enqueued;\n+\n+\t\t\tenq = 0;\n+\t\t\tdo {\n+\t\t\t\tenq += rte_bbdev_enqueue_ldpc_dec_ops(\n+\t\t\t\t\t\ttp->dev_id,\n+\t\t\t\t\t\tqueue_id, &ops[enqueued],\n+\t\t\t\t\t\tnum_to_enq);\n+\t\t\t} while (unlikely(num_to_enq != enq));\n+\t\t\tenqueued += enq;\n+\n+\t\t\t/* Write to thread burst_sz current number of enqueued\n+\t\t\t * descriptors. It ensures that proper number of\n+\t\t\t * descriptors will be dequeued in callback\n+\t\t\t * function - needed for last batch in case where\n+\t\t\t * the number of operations is not a multiple of\n+\t\t\t * burst size.\n+\t\t\t */\n+\t\t\trte_atomic16_set(&tp->burst_sz, num_to_enq);\n+\n+\t\t\t/* Wait until processing of previous batch is\n+\t\t\t * completed\n+\t\t\t */\n+\t\t\twhile (rte_atomic16_read(&tp->nb_dequeued) !=\n+\t\t\t\t\t(int16_t) enqueued)\n+\t\t\t\trte_pause();\n+\t\t}\n+\t\tif (j != TEST_REPETITIONS - 1)\n+\t\t\trte_atomic16_clear(&tp->nb_dequeued);\n+\t}\n+\n+\treturn TEST_SUCCESS;\n+}\n+\n+static int\n throughput_intr_lcore_dec(void *arg)\n {\n \tstruct thread_params *tp = arg;\n@@ -2635,6 +2741,98 @@ typedef int (test_case_function)(struct active_device *ad,\n \treturn TEST_SUCCESS;\n }\n \n+\n+static int\n+throughput_intr_lcore_ldpc_enc(void *arg)\n+{\n+\tstruct thread_params *tp = arg;\n+\tunsigned int enqueued;\n+\tconst uint16_t queue_id = tp->queue_id;\n+\tconst uint16_t burst_sz = tp->op_params->burst_sz;\n+\tconst uint16_t num_to_process = tp->op_params->num_to_process;\n+\tstruct rte_bbdev_enc_op *ops[num_to_process];\n+\tstruct test_buffers *bufs = NULL;\n+\tstruct rte_bbdev_info info;\n+\tint ret, i, j;\n+\tuint16_t num_to_enq, enq;\n+\n+\tTEST_ASSERT_SUCCESS((burst_sz > MAX_BURST),\n+\t\t\t\"BURST_SIZE should be <= %u\", MAX_BURST);\n+\n+\tTEST_ASSERT_SUCCESS(rte_bbdev_queue_intr_enable(tp->dev_id, queue_id),\n+\t\t\t\"Failed to enable interrupts for dev: %u, queue_id: %u\",\n+\t\t\ttp->dev_id, queue_id);\n+\n+\trte_bbdev_info_get(tp->dev_id, &info);\n+\n+\tTEST_ASSERT_SUCCESS((num_to_process > info.drv.queue_size_lim),\n+\t\t\t\"NUM_OPS cannot exceed %u for this device\",\n+\t\t\tinfo.drv.queue_size_lim);\n+\n+\tbufs = &tp->op_params->q_bufs[GET_SOCKET(info.socket_id)][queue_id];\n+\n+\trte_atomic16_clear(&tp->processing_status);\n+\trte_atomic16_clear(&tp->nb_dequeued);\n+\n+\twhile (rte_atomic16_read(&tp->op_params->sync) == SYNC_WAIT)\n+\t\trte_pause();\n+\n+\tret = rte_bbdev_enc_op_alloc_bulk(tp->op_params->mp, ops,\n+\t\t\tnum_to_process);\n+\tTEST_ASSERT_SUCCESS(ret, \"Allocation failed for %d ops\",\n+\t\t\tnum_to_process);\n+\tif (test_vector.op_type != RTE_BBDEV_OP_NONE)\n+\t\tcopy_reference_ldpc_enc_op(ops, num_to_process, 0,\n+\t\t\t\tbufs->inputs, bufs->hard_outputs,\n+\t\t\t\ttp->op_params->ref_enc_op);\n+\n+\t/* Set counter to validate the ordering */\n+\tfor (j = 0; j < num_to_process; ++j)\n+\t\tops[j]->opaque_data = (void *)(uintptr_t)j;\n+\n+\tfor (j = 0; j < TEST_REPETITIONS; ++j) {\n+\t\tfor (i = 0; i < num_to_process; ++i)\n+\t\t\trte_pktmbuf_reset(ops[i]->turbo_enc.output.data);\n+\n+\t\ttp->start_time = rte_rdtsc_precise();\n+\t\tfor (enqueued = 0; enqueued < num_to_process;) {\n+\t\t\tnum_to_enq = burst_sz;\n+\n+\t\t\tif (unlikely(num_to_process - enqueued < num_to_enq))\n+\t\t\t\tnum_to_enq = num_to_process - enqueued;\n+\n+\t\t\tenq = 0;\n+\t\t\tdo {\n+\t\t\t\tenq += rte_bbdev_enqueue_ldpc_enc_ops(\n+\t\t\t\t\t\ttp->dev_id,\n+\t\t\t\t\t\tqueue_id, &ops[enqueued],\n+\t\t\t\t\t\tnum_to_enq);\n+\t\t\t} while (unlikely(enq != num_to_enq));\n+\t\t\tenqueued += enq;\n+\n+\t\t\t/* Write to thread burst_sz current number of enqueued\n+\t\t\t * descriptors. It ensures that proper number of\n+\t\t\t * descriptors will be dequeued in callback\n+\t\t\t * function - needed for last batch in case where\n+\t\t\t * the number of operations is not a multiple of\n+\t\t\t * burst size.\n+\t\t\t */\n+\t\t\trte_atomic16_set(&tp->burst_sz, num_to_enq);\n+\n+\t\t\t/* Wait until processing of previous batch is\n+\t\t\t * completed\n+\t\t\t */\n+\t\t\twhile (rte_atomic16_read(&tp->nb_dequeued) !=\n+\t\t\t\t\t(int16_t) enqueued)\n+\t\t\t\trte_pause();\n+\t\t}\n+\t\tif (j != TEST_REPETITIONS - 1)\n+\t\t\trte_atomic16_clear(&tp->nb_dequeued);\n+\t}\n+\n+\treturn TEST_SUCCESS;\n+}\n+\n static int\n throughput_pmd_lcore_dec(void *arg)\n {\n@@ -3378,11 +3576,11 @@ typedef int (test_case_function)(struct active_device *ad,\n \t\tif (test_vector.op_type == RTE_BBDEV_OP_TURBO_DEC)\n \t\t\tthroughput_function = throughput_intr_lcore_dec;\n \t\telse if (test_vector.op_type == RTE_BBDEV_OP_LDPC_DEC)\n-\t\t\tthroughput_function = throughput_intr_lcore_dec;\n+\t\t\tthroughput_function = throughput_intr_lcore_ldpc_dec;\n \t\telse if (test_vector.op_type == RTE_BBDEV_OP_TURBO_ENC)\n \t\t\tthroughput_function = throughput_intr_lcore_enc;\n \t\telse if (test_vector.op_type == RTE_BBDEV_OP_LDPC_ENC)\n-\t\t\tthroughput_function = throughput_intr_lcore_enc;\n+\t\t\tthroughput_function = throughput_intr_lcore_ldpc_enc;\n \t\telse\n \t\t\tthroughput_function = throughput_intr_lcore_enc;\n \n",
    "prefixes": [
        "v2",
        "08/15"
    ]
}