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GET /api/patches/66162/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 66162,
    "url": "http://patches.dpdk.org/api/patches/66162/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200302143209.11854-2-hemant.agrawal@nxp.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200302143209.11854-2-hemant.agrawal@nxp.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200302143209.11854-2-hemant.agrawal@nxp.com",
    "date": "2020-03-02T14:32:00",
    "name": "[01/10] net/enetc: do not stall in clean Tx ring",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "340bba15b5161702dba3bcba9baee2ba7c9f9fed",
    "submitter": {
        "id": 477,
        "url": "http://patches.dpdk.org/api/people/477/?format=api",
        "name": "Hemant Agrawal",
        "email": "hemant.agrawal@nxp.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200302143209.11854-2-hemant.agrawal@nxp.com/mbox/",
    "series": [
        {
            "id": 8741,
            "url": "http://patches.dpdk.org/api/series/8741/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8741",
            "date": "2020-03-02T14:31:59",
            "name": "net/enetc: optimization and cleanup",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/8741/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/66162/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/66162/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id F415EA0568;\n\tMon,  2 Mar 2020 10:00:24 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 7D10D1C011;\n\tMon,  2 Mar 2020 10:00:17 +0100 (CET)",
            "from inva021.nxp.com (inva021.nxp.com [92.121.34.21])\n by dpdk.org (Postfix) with ESMTP id 389081C00D\n for <dev@dpdk.org>; Mon,  2 Mar 2020 10:00:16 +0100 (CET)",
            "from inva021.nxp.com (localhost [127.0.0.1])\n by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id C95C720017C;\n Mon,  2 Mar 2020 10:00:15 +0100 (CET)",
            "from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com\n [165.114.16.14])\n by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 49C09200F6F;\n Mon,  2 Mar 2020 10:00:13 +0100 (CET)",
            "from bf-netperf1.ap.com (bf-netperf1.ap.freescale.net\n [10.232.133.63])\n by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id F326540320;\n Mon,  2 Mar 2020 17:00:08 +0800 (SGT)"
        ],
        "From": "Hemant Agrawal <hemant.agrawal@nxp.com>",
        "To": "ferruh.yigit@intel.com",
        "Cc": "dev@dpdk.org, g.singh@nxp.com,\n Alex Marginean <alexandru.marginean@nxp.com>",
        "Date": "Mon,  2 Mar 2020 20:02:00 +0530",
        "Message-Id": "<20200302143209.11854-2-hemant.agrawal@nxp.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20200302143209.11854-1-hemant.agrawal@nxp.com>",
        "References": "<20200302143209.11854-1-hemant.agrawal@nxp.com>",
        "X-Virus-Scanned": "ClamAV using ClamSMTP",
        "Subject": "[dpdk-dev] [PATCH 01/10] net/enetc: do not stall in clean Tx ring",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Alex Marginean <alexandru.marginean@nxp.com>\n\nDon't read the hardware CI register in a loop, read it once, clean up and\nexit.\nThe issue with reading the register in a loop is that we're stalling here\ntrying to catch up with hardware which keeps sending traffic as long as it\nhas traffic to send, so in effect we could be waiting here for the Tx ring\nto be drained by hardware, instead of us doing Rx in that meantime.\nAt the time we return the function there may be new BDs in the ring that\ncould be cleaned, we're just leaving those there for the next time.\n\nSigned-off-by: Alex Marginean <alexandru.marginean@nxp.com>\n---\n drivers/net/enetc/enetc_rxtx.c | 20 ++++++++++++++++----\n 1 file changed, 16 insertions(+), 4 deletions(-)",
    "diff": "diff --git a/drivers/net/enetc/enetc_rxtx.c b/drivers/net/enetc/enetc_rxtx.c\nindex 81b0ef3b1..b7ecb75ec 100644\n--- a/drivers/net/enetc/enetc_rxtx.c\n+++ b/drivers/net/enetc/enetc_rxtx.c\n@@ -1,5 +1,5 @@\n /* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright 2018-2019 NXP\n+ * Copyright 2018-2020 NXP\n  */\n \n #include <stdbool.h>\n@@ -21,12 +21,24 @@ enetc_clean_tx_ring(struct enetc_bdr *tx_ring)\n {\n \tint tx_frm_cnt = 0;\n \tstruct enetc_swbd *tx_swbd;\n-\tint i;\n+\tint i, hwci;\n \n \ti = tx_ring->next_to_clean;\n \ttx_swbd = &tx_ring->q_swbd[i];\n-\twhile ((int)(enetc_rd_reg(tx_ring->tcisr) &\n-\t       ENETC_TBCISR_IDX_MASK) != i) {\n+\n+\thwci = (int)(enetc_rd_reg(tx_ring->tcisr) &\n+\t\t     ENETC_TBCISR_IDX_MASK);\n+\n+\t/* we're only reading the CI index once here, which means HW may update\n+\t * it while we're doing clean-up.  We could read the register in a loop\n+\t * but for now I assume it's OK to leave a few Tx frames for next call.\n+\t * The issue with reading the register in a loop is that we're stalling\n+\t * here trying to catch up with HW which keeps sending traffic as long\n+\t * as it has traffic to send, so in effect we could be waiting here for\n+\t * the Tx ring to be drained by HW, instead of us doing Rx in that\n+\t * meantime.\n+\t */\n+\twhile (i != hwci) {\n \t\trte_pktmbuf_free(tx_swbd->buffer_addr);\n \t\ttx_swbd->buffer_addr = NULL;\n \t\ttx_swbd++;\n",
    "prefixes": [
        "01/10"
    ]
}