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GET /api/patches/66100/?format=api
{ "id": 66100, "url": "http://patches.dpdk.org/api/patches/66100/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1582820317-7333-4-git-send-email-lbartosik@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1582820317-7333-4-git-send-email-lbartosik@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1582820317-7333-4-git-send-email-lbartosik@marvell.com", "date": "2020-02-27T16:18:25", "name": "[v5,03/15] examples/ipsec-secgw: add eventdev port-lcore link", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "3cea31380b4128af80d47322963052d8078203ff", "submitter": { "id": 1305, "url": "http://patches.dpdk.org/api/people/1305/?format=api", "name": "Lukas Bartosik [C]", "email": "lbartosik@marvell.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1582820317-7333-4-git-send-email-lbartosik@marvell.com/mbox/", "series": [ { "id": 8713, "url": "http://patches.dpdk.org/api/series/8713/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8713", "date": "2020-02-27T16:18:22", "name": "add eventmode to ipsec-secgw", "version": 5, "mbox": "http://patches.dpdk.org/series/8713/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/66100/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/66100/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 723AEA055F;\n\tThu, 27 Feb 2020 17:19:18 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 7A6BB1BFEB;\n\tThu, 27 Feb 2020 17:18:56 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id A0A311BFDA\n for <dev@dpdk.org>; Thu, 27 Feb 2020 17:18:53 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 01RFsgao002477; Thu, 27 Feb 2020 08:18:53 -0800", "from sc-exch01.marvell.com ([199.233.58.181])\n by mx0b-0016f401.pphosted.com with ESMTP id 2ydchth8eg-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 27 Feb 2020 08:18:52 -0800", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH01.marvell.com\n (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 27 Feb\n 2020 08:18:50 -0800", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n (10.93.176.83) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Thu, 27 Feb 2020 08:18:50 -0800", "from luke.marvell.com (unknown [10.95.130.81])\n by maili.marvell.com (Postfix) with ESMTP id 483F63F703F;\n Thu, 27 Feb 2020 08:18:48 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0818; bh=N4jnclpNkr8niNnJ3JhgRlnM3RamXjKMnesNDb8gVlw=;\n b=AnfbtVq6v2GGAx5m0vCj3hWWzpNe89h8adZmNmgIlkQvZ8TCldJEYhi+pn3qZs1XbOjh\n Qpi7g9zEWsxF+iFiyRt5Dr+xODWkZoV2MInlbJ9dyT4YH3CkSZtJaHFLSGvglywmb4oq\n yghOxbldsCLkv4oyxrEmVFtl3OV45H6F+YCzsIEqytjekat57lbN/GXtsmMeVsoTWE9j\n CtwCN9Oh+wT/KzL931s6o76vaRclHImYVo4qAJvV9W8SFdX3W2t1zmVTG31fpfNo+6tw\n Uyu1TuAGRJ9/PRFNrnC6y6eowp8G51/bj63QjeV9A6t591Pz9YX6xgRsOvDU4hXDHiqq KQ==", "From": "Lukasz Bartosik <lbartosik@marvell.com>", "To": "Akhil Goyal <akhil.goyal@nxp.com>, Radu Nicolau <radu.nicolau@intel.com>,\n Thomas Monjalon <thomas@monjalon.net>", "CC": "Anoob Joseph <anoobj@marvell.com>, Jerin Jacob <jerinj@marvell.com>,\n Narayana Prasad <pathreya@marvell.com>,\n Ankur Dwivedi <adwivedi@marvell.com>,\n Archana Muniganti <marchana@marvell.com>, Tejasree Kondoj\n <ktejasree@marvell.com>, Vamsi Attunuru <vattunuru@marvell.com>,\n \"Konstantin Ananyev\" <konstantin.ananyev@intel.com>, <dev@dpdk.org>", "Date": "Thu, 27 Feb 2020 17:18:25 +0100", "Message-ID": "<1582820317-7333-4-git-send-email-lbartosik@marvell.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1582820317-7333-1-git-send-email-lbartosik@marvell.com>", "References": "<1582185727-6749-1-git-send-email-lbartosik@marvell.com>\n <1582820317-7333-1-git-send-email-lbartosik@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572\n definitions=2020-02-27_05:2020-02-26,\n 2020-02-27 signatures=0", "Subject": "[dpdk-dev] [PATCH v5 03/15] examples/ipsec-secgw: add eventdev\n\tport-lcore link", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Anoob Joseph <anoobj@marvell.com>\n\nAdd event device port-lcore link and specify which event queues should\nbe connected to the event port. Generate a default config for event\nport-lcore links if it is not specified in the configuration. This\nroutine will check the number of available ports and then create links\naccording to the number of cores available. This patch also adds a new\nentry in the eventmode conf to denote that all queues are to be linked\nwith every port. This enables one core to receive packets from all\nethernet ports.\n\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Lukasz Bartosik <lbartosik@marvell.com>\n---\n examples/ipsec-secgw/event_helper.c | 126 ++++++++++++++++++++++++++++++++++++\n examples/ipsec-secgw/event_helper.h | 33 ++++++++++\n 2 files changed, 159 insertions(+)", "diff": "diff --git a/examples/ipsec-secgw/event_helper.c b/examples/ipsec-secgw/event_helper.c\nindex 0c38474..c90249f 100644\n--- a/examples/ipsec-secgw/event_helper.c\n+++ b/examples/ipsec-secgw/event_helper.c\n@@ -1,11 +1,33 @@\n /* SPDX-License-Identifier: BSD-3-Clause\n * Copyright (C) 2020 Marvell International Ltd.\n */\n+#include <rte_bitmap.h>\n #include <rte_ethdev.h>\n #include <rte_eventdev.h>\n+#include <rte_malloc.h>\n \n #include \"event_helper.h\"\n \n+static inline unsigned int\n+eh_get_next_active_core(struct eventmode_conf *em_conf, unsigned int prev_core)\n+{\n+\tunsigned int next_core;\n+\n+\t/* Get next active core skipping cores reserved as eth cores */\n+\tdo {\n+\t\t/* Get the next core */\n+\t\tnext_core = rte_get_next_lcore(prev_core, 0, 0);\n+\n+\t\t/* Check if we have reached max lcores */\n+\t\tif (next_core == RTE_MAX_LCORE)\n+\t\t\treturn next_core;\n+\n+\t\tprev_core = next_core;\n+\t} while (rte_bitmap_get(em_conf->eth_core_mask, next_core));\n+\n+\treturn next_core;\n+}\n+\n static int\n eh_set_default_conf_eventdev(struct eventmode_conf *em_conf)\n {\n@@ -77,6 +99,71 @@ eh_set_default_conf_eventdev(struct eventmode_conf *em_conf)\n }\n \n static int\n+eh_set_default_conf_link(struct eventmode_conf *em_conf)\n+{\n+\tstruct eventdev_params *eventdev_config;\n+\tstruct eh_event_link_info *link;\n+\tunsigned int lcore_id = -1;\n+\tint i, link_index;\n+\n+\t/*\n+\t * Create a 1:1 mapping from event ports to cores. If the number\n+\t * of event ports is lesser than the cores, some cores won't\n+\t * execute worker. If there are more event ports, then some ports\n+\t * won't be used.\n+\t *\n+\t */\n+\n+\t/*\n+\t * The event queue-port mapping is done according to the link. Since\n+\t * we are falling back to the default link config, enabling\n+\t * \"all_ev_queue_to_ev_port\" mode flag. This will map all queues\n+\t * to the port.\n+\t */\n+\tem_conf->ext_params.all_ev_queue_to_ev_port = 1;\n+\n+\t/* Get first event dev conf */\n+\teventdev_config = &(em_conf->eventdev_config[0]);\n+\n+\t/* Loop through the ports */\n+\tfor (i = 0; i < eventdev_config->nb_eventport; i++) {\n+\n+\t\t/* Get next active core id */\n+\t\tlcore_id = eh_get_next_active_core(em_conf,\n+\t\t\t\tlcore_id);\n+\n+\t\tif (lcore_id == RTE_MAX_LCORE) {\n+\t\t\t/* Reached max cores */\n+\t\t\treturn 0;\n+\t\t}\n+\n+\t\t/* Save the current combination as one link */\n+\n+\t\t/* Get the index */\n+\t\tlink_index = em_conf->nb_link;\n+\n+\t\t/* Get the corresponding link */\n+\t\tlink = &(em_conf->link[link_index]);\n+\n+\t\t/* Save link */\n+\t\tlink->eventdev_id = eventdev_config->eventdev_id;\n+\t\tlink->event_port_id = i;\n+\t\tlink->lcore_id = lcore_id;\n+\n+\t\t/*\n+\t\t * Don't set eventq_id as by default all queues\n+\t\t * need to be mapped to the port, which is controlled\n+\t\t * by the operating mode.\n+\t\t */\n+\n+\t\t/* Update number of links */\n+\t\tem_conf->nb_link++;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n eh_validate_conf(struct eventmode_conf *em_conf)\n {\n \tint ret;\n@@ -91,6 +178,16 @@ eh_validate_conf(struct eventmode_conf *em_conf)\n \t\t\treturn ret;\n \t}\n \n+\t/*\n+\t * Check if links are specified. Else generate a default config for\n+\t * the event ports used.\n+\t */\n+\tif (em_conf->nb_link == 0) {\n+\t\tret = eh_set_default_conf_link(em_conf);\n+\t\tif (ret != 0)\n+\t\t\treturn ret;\n+\t}\n+\n \treturn 0;\n }\n \n@@ -102,6 +199,8 @@ eh_initialize_eventdev(struct eventmode_conf *em_conf)\n \tstruct rte_event_dev_config eventdev_conf;\n \tstruct eventdev_params *eventdev_config;\n \tint nb_eventdev = em_conf->nb_eventdev;\n+\tstruct eh_event_link_info *link;\n+\tuint8_t *queue = NULL;\n \tuint8_t eventdev_id;\n \tint nb_eventqueue;\n \tuint8_t i, j;\n@@ -199,6 +298,33 @@ eh_initialize_eventdev(struct eventmode_conf *em_conf)\n \t\t}\n \t}\n \n+\t/* Make event queue - event port link */\n+\tfor (j = 0; j < em_conf->nb_link; j++) {\n+\n+\t\t/* Get link info */\n+\t\tlink = &(em_conf->link[j]);\n+\n+\t\t/* Get event dev ID */\n+\t\teventdev_id = link->eventdev_id;\n+\n+\t\t/*\n+\t\t * If \"all_ev_queue_to_ev_port\" params flag is selected, all\n+\t\t * queues need to be mapped to the port.\n+\t\t */\n+\t\tif (em_conf->ext_params.all_ev_queue_to_ev_port)\n+\t\t\tqueue = NULL;\n+\t\telse\n+\t\t\tqueue = &(link->eventq_id);\n+\n+\t\t/* Link queue to port */\n+\t\tret = rte_event_port_link(eventdev_id, link->event_port_id,\n+\t\t\t\tqueue, NULL, 1);\n+\t\tif (ret < 0) {\n+\t\t\tEH_LOG_ERR(\"Failed to link event port %d\", ret);\n+\t\t\treturn ret;\n+\t\t}\n+\t}\n+\n \t/* Start event devices */\n \tfor (i = 0; i < nb_eventdev; i++) {\n \ndiff --git a/examples/ipsec-secgw/event_helper.h b/examples/ipsec-secgw/event_helper.h\nindex 040f977..c8afc84 100644\n--- a/examples/ipsec-secgw/event_helper.h\n+++ b/examples/ipsec-secgw/event_helper.h\n@@ -16,6 +16,13 @@\n /* Max event devices supported */\n #define EVENT_MODE_MAX_EVENT_DEVS RTE_EVENT_MAX_DEVS\n \n+/* Max event queues supported per event device */\n+#define EVENT_MODE_MAX_EVENT_QUEUES_PER_DEV RTE_EVENT_MAX_QUEUES_PER_DEV\n+\n+/* Max event-lcore links */\n+#define EVENT_MODE_MAX_LCORE_LINKS \\\n+\t(EVENT_MODE_MAX_EVENT_DEVS * EVENT_MODE_MAX_EVENT_QUEUES_PER_DEV)\n+\n /**\n * Packet transfer mode of the application\n */\n@@ -32,17 +39,43 @@ struct eventdev_params {\n \tuint8_t ev_queue_mode;\n };\n \n+/**\n+ * Event-lcore link configuration\n+ */\n+struct eh_event_link_info {\n+\tuint8_t eventdev_id;\n+\t\t/**< Event device ID */\n+\tuint8_t event_port_id;\n+\t\t/**< Event port ID */\n+\tuint8_t eventq_id;\n+\t\t/**< Event queue to be linked to the port */\n+\tuint8_t lcore_id;\n+\t\t/**< Lcore to be polling on this port */\n+};\n+\n /* Eventmode conf data */\n struct eventmode_conf {\n \tint nb_eventdev;\n \t\t/**< No of event devs */\n \tstruct eventdev_params eventdev_config[EVENT_MODE_MAX_EVENT_DEVS];\n \t\t/**< Per event dev conf */\n+\tuint8_t nb_link;\n+\t\t/**< No of links */\n+\tstruct eh_event_link_info\n+\t\tlink[EVENT_MODE_MAX_LCORE_LINKS];\n+\t\t/**< Per link conf */\n+\tstruct rte_bitmap *eth_core_mask;\n+\t\t/**< Core mask of cores to be used for software Rx and Tx */\n \tunion {\n \t\tRTE_STD_C11\n \t\tstruct {\n \t\t\tuint64_t sched_type\t\t\t: 2;\n \t\t/**< Schedule type */\n+\t\t\tuint64_t all_ev_queue_to_ev_port\t: 1;\n+\t\t/**<\n+\t\t * When enabled, all event queues need to be mapped to\n+\t\t * each event port\n+\t\t */\n \t\t};\n \t\tuint64_t u64;\n \t} ext_params;\n", "prefixes": [ "v5", "03/15" ] }