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GET /api/patches/65101/?format=api
{ "id": 65101, "url": "http://patches.dpdk.org/api/patches/65101/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200124040542.2360-6-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200124040542.2360-6-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200124040542.2360-6-pbhagavatula@marvell.com", "date": "2020-01-24T04:05:36", "name": "[v5,05/11] examples/l3fwd: add event port and queue setup", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "f6287bf2ee4292cb542454f7cc1b140fae4042e9", "submitter": { "id": 1183, "url": "http://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200124040542.2360-6-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 8280, "url": "http://patches.dpdk.org/api/series/8280/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8280", "date": "2020-01-24T04:05:31", "name": "example/l3fwd: introduce event device support", "version": 5, "mbox": "http://patches.dpdk.org/series/8280/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/65101/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/65101/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7564AA052F;\n\tFri, 24 Jan 2020 05:06:35 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 3B5FF1B9B5;\n\tFri, 24 Jan 2020 05:06:11 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id B4BA64C81\n for <dev@dpdk.org>; Fri, 24 Jan 2020 05:06:06 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 00O3uVe2013533; Thu, 23 Jan 2020 20:06:06 -0800", "from sc-exch04.marvell.com ([199.233.58.184])\n by mx0a-0016f401.pphosted.com with ESMTP id 2xq4x4mm24-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 23 Jan 2020 20:06:05 -0800", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH04.marvell.com\n (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 23 Jan\n 2020 20:06:04 -0800", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n (10.93.176.81) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Thu, 23 Jan 2020 20:06:04 -0800", "from BG-LT7430.marvell.com (bg-lt7430.marvell.com [10.28.10.90])\n by maili.marvell.com (Postfix) with ESMTP id ADE4D3F7044;\n Thu, 23 Jan 2020 20:06:01 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0818;\n bh=XUh71yLqXgdNnspOJ6kT//OmugrLzDHsAX2NDT2zhq8=;\n b=rXsgXjPNO4VJ3qYqyX2nSMGHIPYsteL+bI6xU6QqOK/fVz/ClaNMseAGmbi+mUTpSiyR\n CPprKJKeAJWVVIHQAD3tdF6q2/4ijRtSijQ2+nCS9qmcuMqtrlsK8kL+9vjbSk+VLMK0\n YSiZQKRyCpY4JGOf7AbT3SA+VAIJ+FkMmBVFO5m39s6BdhIZbiM11hQet87gY5+HTiT1\n ZdqVC1GketwxCwW7JoRvQMjQbtNMifZl+15cxke0PhuFSoiLRNRe/4AJQA3y+Pph5kzC\n K8GUF2ltVSTxaTtcu5tkCIdEL7oVU3LnOg02+lF6ecsZ11kOrl+tfuabDlsLa0jPbX9Y rQ==", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>, <konstantin.ananyev@intel.com>, Marko Kovacevic\n <marko.kovacevic@intel.com>, Ori Kam <orika@mellanox.com>, Bruce Richardson\n <bruce.richardson@intel.com>, Radu Nicolau <radu.nicolau@intel.com>, \"Akhil\n Goyal\" <akhil.goyal@nxp.com>, Tomasz Kantecki <tomasz.kantecki@intel.com>,\n Sunil Kumar Kori <skori@marvell.com>, Pavan Nikhilesh\n <pbhagavatula@marvell.com>", "CC": "<dev@dpdk.org>", "Date": "Fri, 24 Jan 2020 09:35:36 +0530", "Message-ID": "<20200124040542.2360-6-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200124040542.2360-1-pbhagavatula@marvell.com>", "References": "<20200122182817.1667-1-pbhagavatula@marvell.com>\n <20200124040542.2360-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572\n definitions=2020-01-23_13:2020-01-23,\n 2020-01-23 signatures=0", "Subject": "[dpdk-dev] [PATCH v5 05/11] examples/l3fwd: add event port and\n\tqueue setup", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Sunil Kumar Kori <skori@marvell.com>\n\nAdd event device queue and port setup based on event eth Tx adapter\ncapabilities.\n\nSigned-off-by: Sunil Kumar Kori <skori@marvell.com>\n---\n examples/l3fwd/l3fwd_event.c | 28 +++++-\n examples/l3fwd/l3fwd_event.h | 1 +\n examples/l3fwd/l3fwd_event_generic.c | 103 +++++++++++++++++++++\n examples/l3fwd/l3fwd_event_internal_port.c | 98 ++++++++++++++++++++\n 4 files changed, 229 insertions(+), 1 deletion(-)", "diff": "diff --git a/examples/l3fwd/l3fwd_event.c b/examples/l3fwd/l3fwd_event.c\nindex f9491ecc6..b58f9b79a 100644\n--- a/examples/l3fwd/l3fwd_event.c\n+++ b/examples/l3fwd/l3fwd_event.c\n@@ -188,10 +188,30 @@ l3fwd_event_capability_setup(void)\n \t\tl3fwd_event_set_internal_port_ops(&evt_rsrc->ops);\n }\n \n+int\n+l3fwd_get_free_event_port(struct l3fwd_event_resources *evt_rsrc)\n+{\n+\tstatic int index;\n+\tint port_id;\n+\n+\trte_spinlock_lock(&evt_rsrc->evp.lock);\n+\tif (index >= evt_rsrc->evp.nb_ports) {\n+\t\tprintf(\"No free event port is available\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tport_id = evt_rsrc->evp.event_p_id[index];\n+\tindex++;\n+\trte_spinlock_unlock(&evt_rsrc->evp.lock);\n+\n+\treturn port_id;\n+}\n+\n void\n l3fwd_event_resource_setup(struct rte_eth_conf *port_conf)\n {\n \tstruct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();\n+\tuint32_t event_queue_cfg;\n \n \tif (!evt_rsrc->enabled)\n \t\treturn;\n@@ -206,5 +226,11 @@ l3fwd_event_resource_setup(struct rte_eth_conf *port_conf)\n \tl3fwd_eth_dev_port_setup(port_conf);\n \n \t/* Event device configuration */\n-\tevt_rsrc->ops.event_device_setup();\n+\tevent_queue_cfg = evt_rsrc->ops.event_device_setup();\n+\n+\t/* Event queue configuration */\n+\tevt_rsrc->ops.event_queue_setup(event_queue_cfg);\n+\n+\t/* Event port configuration */\n+\tevt_rsrc->ops.event_port_setup();\n }\ndiff --git a/examples/l3fwd/l3fwd_event.h b/examples/l3fwd/l3fwd_event.h\nindex 53feea069..4bceca920 100644\n--- a/examples/l3fwd/l3fwd_event.h\n+++ b/examples/l3fwd/l3fwd_event.h\n@@ -73,6 +73,7 @@ struct l3fwd_event_resources {\n \n struct l3fwd_event_resources *l3fwd_get_eventdev_rsrc(void);\n void l3fwd_event_resource_setup(struct rte_eth_conf *port_conf);\n+int l3fwd_get_free_event_port(struct l3fwd_event_resources *eventdev_rsrc);\n void l3fwd_event_set_generic_ops(struct l3fwd_event_setup_ops *ops);\n void l3fwd_event_set_internal_port_ops(struct l3fwd_event_setup_ops *ops);\n \ndiff --git a/examples/l3fwd/l3fwd_event_generic.c b/examples/l3fwd/l3fwd_event_generic.c\nindex c831cfd66..2532839bf 100644\n--- a/examples/l3fwd/l3fwd_event_generic.c\n+++ b/examples/l3fwd/l3fwd_event_generic.c\n@@ -81,8 +81,111 @@ l3fwd_event_device_setup_generic(void)\n \treturn event_queue_cfg;\n }\n \n+static void\n+l3fwd_event_port_setup_generic(void)\n+{\n+\tstruct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();\n+\tuint8_t event_d_id = evt_rsrc->event_d_id;\n+\tstruct rte_event_port_conf event_p_conf = {\n+\t\t.dequeue_depth = 32,\n+\t\t.enqueue_depth = 32,\n+\t\t.new_event_threshold = 4096\n+\t};\n+\tstruct rte_event_port_conf def_p_conf;\n+\tuint8_t event_p_id;\n+\tint32_t ret;\n+\n+\tevt_rsrc->evp.event_p_id = (uint8_t *)malloc(sizeof(uint8_t) *\n+\t\t\t\t\tevt_rsrc->evp.nb_ports);\n+\tif (!evt_rsrc->evp.event_p_id)\n+\t\trte_panic(\"No space is available\\n\");\n+\n+\tmemset(&def_p_conf, 0, sizeof(struct rte_event_port_conf));\n+\trte_event_port_default_conf_get(event_d_id, 0, &def_p_conf);\n+\n+\tif (def_p_conf.new_event_threshold < event_p_conf.new_event_threshold)\n+\t\tevent_p_conf.new_event_threshold =\n+\t\t\tdef_p_conf.new_event_threshold;\n+\n+\tif (def_p_conf.dequeue_depth < event_p_conf.dequeue_depth)\n+\t\tevent_p_conf.dequeue_depth = def_p_conf.dequeue_depth;\n+\n+\tif (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth)\n+\t\tevent_p_conf.enqueue_depth = def_p_conf.enqueue_depth;\n+\n+\tevent_p_conf.disable_implicit_release =\n+\t\tevt_rsrc->disable_implicit_release;\n+\tevt_rsrc->deq_depth = def_p_conf.dequeue_depth;\n+\n+\tfor (event_p_id = 0; event_p_id < evt_rsrc->evp.nb_ports;\n+\t\t\t\t\t\t\t\tevent_p_id++) {\n+\t\tret = rte_event_port_setup(event_d_id, event_p_id,\n+\t\t\t\t\t &event_p_conf);\n+\t\tif (ret < 0)\n+\t\t\trte_panic(\"Error in configuring event port %d\\n\",\n+\t\t\t\t event_p_id);\n+\n+\t\tret = rte_event_port_link(event_d_id, event_p_id,\n+\t\t\t\t\t evt_rsrc->evq.event_q_id,\n+\t\t\t\t\t NULL,\n+\t\t\t\t\t evt_rsrc->evq.nb_queues - 1);\n+\t\tif (ret != (evt_rsrc->evq.nb_queues - 1))\n+\t\t\trte_panic(\"Error in linking event port %d to queues\\n\",\n+\t\t\t\t event_p_id);\n+\t\tevt_rsrc->evp.event_p_id[event_p_id] = event_p_id;\n+\t}\n+\t/* init spinlock */\n+\trte_spinlock_init(&evt_rsrc->evp.lock);\n+\n+\tevt_rsrc->def_p_conf = event_p_conf;\n+}\n+\n+static void\n+l3fwd_event_queue_setup_generic(uint32_t event_queue_cfg)\n+{\n+\tstruct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();\n+\tuint8_t event_d_id = evt_rsrc->event_d_id;\n+\tstruct rte_event_queue_conf event_q_conf = {\n+\t\t.nb_atomic_flows = 1024,\n+\t\t.nb_atomic_order_sequences = 1024,\n+\t\t.event_queue_cfg = event_queue_cfg,\n+\t\t.priority = RTE_EVENT_DEV_PRIORITY_NORMAL\n+\t};\n+\tstruct rte_event_queue_conf def_q_conf;\n+\tuint8_t event_q_id;\n+\tint32_t ret;\n+\n+\tevent_q_conf.schedule_type = evt_rsrc->sched_type;\n+\tevt_rsrc->evq.event_q_id = (uint8_t *)malloc(sizeof(uint8_t) *\n+\t\t\t\t\tevt_rsrc->evq.nb_queues);\n+\tif (!evt_rsrc->evq.event_q_id)\n+\t\trte_panic(\"Memory allocation failure\\n\");\n+\n+\trte_event_queue_default_conf_get(event_d_id, 0, &def_q_conf);\n+\tif (def_q_conf.nb_atomic_flows < event_q_conf.nb_atomic_flows)\n+\t\tevent_q_conf.nb_atomic_flows = def_q_conf.nb_atomic_flows;\n+\n+\tfor (event_q_id = 0; event_q_id < (evt_rsrc->evq.nb_queues - 1);\n+\t\t\t\t\t\t\t\tevent_q_id++) {\n+\t\tret = rte_event_queue_setup(event_d_id, event_q_id,\n+\t\t\t\t\t &event_q_conf);\n+\t\tif (ret < 0)\n+\t\t\trte_panic(\"Error in configuring event queue\\n\");\n+\t\tevt_rsrc->evq.event_q_id[event_q_id] = event_q_id;\n+\t}\n+\n+\tevent_q_conf.event_queue_cfg |= RTE_EVENT_QUEUE_CFG_SINGLE_LINK;\n+\tevent_q_conf.priority = RTE_EVENT_DEV_PRIORITY_HIGHEST,\n+\tret = rte_event_queue_setup(event_d_id, event_q_id, &event_q_conf);\n+\tif (ret < 0)\n+\t\trte_panic(\"Error in configuring event queue for Tx adapter\\n\");\n+\tevt_rsrc->evq.event_q_id[event_q_id] = event_q_id;\n+}\n+\n void\n l3fwd_event_set_generic_ops(struct l3fwd_event_setup_ops *ops)\n {\n \tops->event_device_setup = l3fwd_event_device_setup_generic;\n+\tops->event_queue_setup = l3fwd_event_queue_setup_generic;\n+\tops->event_port_setup = l3fwd_event_port_setup_generic;\n }\ndiff --git a/examples/l3fwd/l3fwd_event_internal_port.c b/examples/l3fwd/l3fwd_event_internal_port.c\nindex f3e1ab3a2..59b7d35b7 100644\n--- a/examples/l3fwd/l3fwd_event_internal_port.c\n+++ b/examples/l3fwd/l3fwd_event_internal_port.c\n@@ -80,9 +80,107 @@ l3fwd_event_device_setup_internal_port(void)\n \treturn event_queue_cfg;\n }\n \n+static void\n+l3fwd_event_port_setup_internal_port(void)\n+{\n+\tstruct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();\n+\tuint8_t event_d_id = evt_rsrc->event_d_id;\n+\tstruct rte_event_port_conf event_p_conf = {\n+\t\t.dequeue_depth = 32,\n+\t\t.enqueue_depth = 32,\n+\t\t.new_event_threshold = 4096\n+\t};\n+\tstruct rte_event_port_conf def_p_conf;\n+\tuint8_t event_p_id;\n+\tint32_t ret;\n+\n+\tevt_rsrc->evp.event_p_id = (uint8_t *)malloc(sizeof(uint8_t) *\n+\t\t\t\t\tevt_rsrc->evp.nb_ports);\n+\tif (!evt_rsrc->evp.event_p_id)\n+\t\trte_panic(\"Failed to allocate memory for Event Ports\\n\");\n+\n+\trte_event_port_default_conf_get(event_d_id, 0, &def_p_conf);\n+\tif (def_p_conf.new_event_threshold < event_p_conf.new_event_threshold)\n+\t\tevent_p_conf.new_event_threshold =\n+\t\t\t\t\t\tdef_p_conf.new_event_threshold;\n+\n+\tif (def_p_conf.dequeue_depth < event_p_conf.dequeue_depth)\n+\t\tevent_p_conf.dequeue_depth = def_p_conf.dequeue_depth;\n+\n+\tif (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth)\n+\t\tevent_p_conf.enqueue_depth = def_p_conf.enqueue_depth;\n+\n+\tevent_p_conf.disable_implicit_release =\n+\t\tevt_rsrc->disable_implicit_release;\n+\n+\tfor (event_p_id = 0; event_p_id < evt_rsrc->evp.nb_ports;\n+\t\t\t\t\t\t\t\tevent_p_id++) {\n+\t\tret = rte_event_port_setup(event_d_id, event_p_id,\n+\t\t\t\t\t &event_p_conf);\n+\t\tif (ret < 0)\n+\t\t\trte_panic(\"Error in configuring event port %d\\n\",\n+\t\t\t\t event_p_id);\n+\n+\t\tret = rte_event_port_link(event_d_id, event_p_id, NULL,\n+\t\t\t\t\t NULL, 0);\n+\t\tif (ret < 0)\n+\t\t\trte_panic(\"Error in linking event port %d to queue\\n\",\n+\t\t\t\t event_p_id);\n+\t\tevt_rsrc->evp.event_p_id[event_p_id] = event_p_id;\n+\n+\t\t/* init spinlock */\n+\t\trte_spinlock_init(&evt_rsrc->evp.lock);\n+\t}\n+\n+\tevt_rsrc->def_p_conf = event_p_conf;\n+}\n+\n+static void\n+l3fwd_event_queue_setup_internal_port(uint32_t event_queue_cfg)\n+{\n+\tstruct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();\n+\tuint8_t event_d_id = evt_rsrc->event_d_id;\n+\tstruct rte_event_queue_conf event_q_conf = {\n+\t\t.nb_atomic_flows = 1024,\n+\t\t.nb_atomic_order_sequences = 1024,\n+\t\t.event_queue_cfg = event_queue_cfg,\n+\t\t.priority = RTE_EVENT_DEV_PRIORITY_NORMAL\n+\t};\n+\tstruct rte_event_queue_conf def_q_conf;\n+\tuint8_t event_q_id = 0;\n+\tint32_t ret;\n+\n+\trte_event_queue_default_conf_get(event_d_id, event_q_id, &def_q_conf);\n+\n+\tif (def_q_conf.nb_atomic_flows < event_q_conf.nb_atomic_flows)\n+\t\tevent_q_conf.nb_atomic_flows = def_q_conf.nb_atomic_flows;\n+\n+\tif (def_q_conf.nb_atomic_order_sequences <\n+\t\t\t\t\tevent_q_conf.nb_atomic_order_sequences)\n+\t\tevent_q_conf.nb_atomic_order_sequences =\n+\t\t\t\t\tdef_q_conf.nb_atomic_order_sequences;\n+\n+\tevent_q_conf.event_queue_cfg = event_queue_cfg;\n+\tevent_q_conf.schedule_type = evt_rsrc->sched_type;\n+\tevt_rsrc->evq.event_q_id = (uint8_t *)malloc(sizeof(uint8_t) *\n+\t\t\t\t\tevt_rsrc->evq.nb_queues);\n+\tif (!evt_rsrc->evq.event_q_id)\n+\t\trte_panic(\"Memory allocation failure\\n\");\n+\n+\tfor (event_q_id = 0; event_q_id < evt_rsrc->evq.nb_queues;\n+\t\t\t\t\t\t\t\tevent_q_id++) {\n+\t\tret = rte_event_queue_setup(event_d_id, event_q_id,\n+\t\t\t\t\t &event_q_conf);\n+\t\tif (ret < 0)\n+\t\t\trte_panic(\"Error in configuring event queue\\n\");\n+\t\tevt_rsrc->evq.event_q_id[event_q_id] = event_q_id;\n+\t}\n+}\n \n void\n l3fwd_event_set_internal_port_ops(struct l3fwd_event_setup_ops *ops)\n {\n \tops->event_device_setup = l3fwd_event_device_setup_internal_port;\n+\tops->event_queue_setup = l3fwd_event_queue_setup_internal_port;\n+\tops->event_port_setup = l3fwd_event_port_setup_internal_port;\n }\n", "prefixes": [ "v5", "05/11" ] }