Patch Detail

HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 65093,
    "url": "http://patches.dpdk.org/api/patches/65093/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1579803629-152938-4-git-send-email-akozyrev@mellanox.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1579803629-152938-4-git-send-email-akozyrev@mellanox.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1579803629-152938-4-git-send-email-akozyrev@mellanox.com",
    "date": "2020-01-23T18:20:27",
    "name": "[v2,3/5] net/mlx4: introduce the mlx4 version of the assert",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "1f8cf30d68afa3880647b801fdce019425edf8eb",
    "submitter": {
        "id": 1573,
        "url": "http://patches.dpdk.org/api/people/1573/?format=api",
        "name": "Alexander Kozyrev",
        "email": "akozyrev@mellanox.com"
    },
    "delegate": {
        "id": 3268,
        "url": "http://patches.dpdk.org/api/users/3268/?format=api",
        "username": "rasland",
        "first_name": "Raslan",
        "last_name": "Darawsheh",
        "email": "rasland@nvidia.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1579803629-152938-4-git-send-email-akozyrev@mellanox.com/mbox/",
    "series": [
        {
            "id": 8278,
            "url": "http://patches.dpdk.org/api/series/8278/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8278",
            "date": "2020-01-23T18:20:24",
            "name": "net/mlx: assert cleanup in mlx drivers",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/8278/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/65093/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/65093/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 59967A0530;\n\tThu, 23 Jan 2020 19:21:10 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E99524C87;\n\tThu, 23 Jan 2020 19:20:40 +0100 (CET)",
            "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id B50702956\n for <dev@dpdk.org>; Thu, 23 Jan 2020 19:20:31 +0100 (CET)",
            "from Internal Mail-Server by MTLPINE1 (envelope-from\n akozyrev@mellanox.com)\n with ESMTPS (AES256-SHA encrypted); 23 Jan 2020 20:20:30 +0200",
            "from pegasus02.mtr.labs.mlnx. (pegasus02.mtr.labs.mlnx\n [10.210.16.122])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 00NIKUb3026240;\n Thu, 23 Jan 2020 20:20:30 +0200"
        ],
        "From": "Alexander Kozyrev <akozyrev@mellanox.com>",
        "To": "dev@dpdk.org",
        "Cc": "rasland@mellanox.com, matan@mellanox.com, viacheslavo@mellanox.com,\n ferruh.yigit@intel.com, thomas@monjalon.net",
        "Date": "Thu, 23 Jan 2020 20:20:27 +0200",
        "Message-Id": "<1579803629-152938-4-git-send-email-akozyrev@mellanox.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1579803629-152938-1-git-send-email-akozyrev@mellanox.com>",
        "References": "<1579789555-23239-1-git-send-email-akozyrev@mellanox.com>\n <1579803629-152938-1-git-send-email-akozyrev@mellanox.com>",
        "Subject": "[dpdk-dev] [PATCH v2 3/5] net/mlx4: introduce the mlx4 version of\n\tthe assert",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Use the MLX4_ASSERT macros instead of the standard assert clause.\nDepends on the MLX4_DEBUG configuration option to define it.\nIf MLX4_DEBUG is enabled MLX4_ASSERT is equal to RTE_VERIFY\nto bypass the global CONFIG_RTE_ENABLE_ASSERT option.\nIf MLX4_DEBUG is disabled, the global CONFIG_RTE_ENABLE_ASSERT\ncan still enable this assert by calling RTE_VERIFY inside RTE_ASSERT.\n\nSigned-off-by: Alexander Kozyrev <akozyrev@mellanox.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\n---\n drivers/net/mlx4/mlx4.c        | 25 ++++++++--------\n drivers/net/mlx4/mlx4_ethdev.c |  5 ++--\n drivers/net/mlx4/mlx4_flow.c   | 34 +++++++++++-----------\n drivers/net/mlx4/mlx4_intr.c   |  3 +-\n drivers/net/mlx4/mlx4_mp.c     | 25 ++++++++--------\n drivers/net/mlx4/mlx4_mr.c     | 66 +++++++++++++++++++++---------------------\n drivers/net/mlx4/mlx4_rxq.c    | 53 +++++++++++++++++----------------\n drivers/net/mlx4/mlx4_rxtx.c   | 19 ++++++------\n drivers/net/mlx4/mlx4_txq.c    | 17 +++++------\n drivers/net/mlx4/mlx4_utils.c  |  3 +-\n drivers/net/mlx4/mlx4_utils.h  |  7 +++--\n 11 files changed, 125 insertions(+), 132 deletions(-)",
    "diff": "diff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c\nindex e37ae23..00d4dc4 100644\n--- a/drivers/net/mlx4/mlx4.c\n+++ b/drivers/net/mlx4/mlx4.c\n@@ -8,7 +8,6 @@\n  * mlx4 driver initialization.\n  */\n \n-#include <assert.h>\n #include <dlfcn.h>\n #include <errno.h>\n #include <inttypes.h>\n@@ -162,7 +161,7 @@ struct mlx4_conf {\n \n \t\tsocket = rxq->socket;\n \t}\n-\tassert(data != NULL);\n+\tMLX4_ASSERT(data != NULL);\n \tret = rte_malloc_socket(__func__, size, alignment, socket);\n \tif (!ret && size)\n \t\trte_errno = ENOMEM;\n@@ -180,7 +179,7 @@ struct mlx4_conf {\n static void\n mlx4_free_verbs_buf(void *ptr, void *data __rte_unused)\n {\n-\tassert(data != NULL);\n+\tMLX4_ASSERT(data != NULL);\n \trte_free(ptr);\n }\n #endif\n@@ -392,11 +391,11 @@ struct mlx4_conf {\n \tmlx4_proc_priv_uninit(dev);\n \tmlx4_mr_release(dev);\n \tif (priv->pd != NULL) {\n-\t\tassert(priv->ctx != NULL);\n+\t\tMLX4_ASSERT(priv->ctx != NULL);\n \t\tclaim_zero(mlx4_glue->dealloc_pd(priv->pd));\n \t\tclaim_zero(mlx4_glue->close_device(priv->ctx));\n \t} else\n-\t\tassert(priv->ctx == NULL);\n+\t\tMLX4_ASSERT(priv->ctx == NULL);\n \tmlx4_intr_uninstall(priv);\n \tmemset(priv, 0, sizeof(*priv));\n }\n@@ -705,7 +704,7 @@ struct mlx4_conf {\n \tif (mlx4_init_shared_data())\n \t\treturn -rte_errno;\n \tsd = mlx4_shared_data;\n-\tassert(sd);\n+\tMLX4_ASSERT(sd);\n \trte_spinlock_lock(&sd->lock);\n \tswitch (rte_eal_process_type()) {\n \tcase RTE_PROC_PRIMARY:\n@@ -775,16 +774,16 @@ struct mlx4_conf {\n \t\t      strerror(rte_errno));\n \t\treturn -rte_errno;\n \t}\n-\tassert(pci_drv == &mlx4_driver);\n+\tMLX4_ASSERT(pci_drv == &mlx4_driver);\n \tlist = mlx4_glue->get_device_list(&i);\n \tif (list == NULL) {\n \t\trte_errno = errno;\n-\t\tassert(rte_errno);\n+\t\tMLX4_ASSERT(rte_errno);\n \t\tif (rte_errno == ENOSYS)\n \t\t\tERROR(\"cannot list devices, is ib_uverbs loaded?\");\n \t\treturn -rte_errno;\n \t}\n-\tassert(i >= 0);\n+\tMLX4_ASSERT(i >= 0);\n \t/*\n \t * For each listed device, check related sysfs entry against\n \t * the provided PCI ID.\n@@ -821,7 +820,7 @@ struct mlx4_conf {\n \t\t\tERROR(\"cannot use device, are drivers up to date?\");\n \t\t\treturn -rte_errno;\n \t\t}\n-\t\tassert(err > 0);\n+\t\tMLX4_ASSERT(err > 0);\n \t\trte_errno = err;\n \t\treturn -rte_errno;\n \t}\n@@ -846,7 +845,7 @@ struct mlx4_conf {\n \t\terr = ENODEV;\n \t\tgoto error;\n \t}\n-\tassert(device_attr.max_sge >= MLX4_MAX_SGE);\n+\tMLX4_ASSERT(device_attr.max_sge >= MLX4_MAX_SGE);\n \tfor (i = 0; i < device_attr.phys_port_cnt; i++) {\n \t\tuint32_t port = i + 1; /* ports are indexed from one */\n \t\tstruct ibv_context *ctx = NULL;\n@@ -1303,7 +1302,7 @@ struct mlx4_conf {\n #ifdef RTE_IBVERBS_LINK_DLOPEN\n \tif (mlx4_glue_init())\n \t\treturn;\n-\tassert(mlx4_glue);\n+\tMLX4_ASSERT(mlx4_glue);\n #endif\n #ifdef MLX4_DEBUG\n \t/* Glue structure must not contain any NULL pointers. */\n@@ -1311,7 +1310,7 @@ struct mlx4_conf {\n \t\tunsigned int i;\n \n \t\tfor (i = 0; i != sizeof(*mlx4_glue) / sizeof(void *); ++i)\n-\t\t\tassert(((const void *const *)mlx4_glue)[i]);\n+\t\t\tMLX4_ASSERT(((const void *const *)mlx4_glue)[i]);\n \t}\n #endif\n \tif (strcmp(mlx4_glue->version, MLX4_GLUE_VERSION)) {\ndiff --git a/drivers/net/mlx4/mlx4_ethdev.c b/drivers/net/mlx4/mlx4_ethdev.c\nindex dfb24c2..e500ec4 100644\n--- a/drivers/net/mlx4/mlx4_ethdev.c\n+++ b/drivers/net/mlx4/mlx4_ethdev.c\n@@ -8,7 +8,6 @@\n  * Miscellaneous control operations for mlx4 driver.\n  */\n \n-#include <assert.h>\n #include <dirent.h>\n #include <errno.h>\n #include <linux/ethtool.h>\n@@ -874,7 +873,7 @@ int mlx4_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size)\n \t\tfc_conf->mode = RTE_FC_NONE;\n \tret = 0;\n out:\n-\tassert(ret >= 0);\n+\tMLX4_ASSERT(ret >= 0);\n \treturn -ret;\n }\n \n@@ -920,7 +919,7 @@ int mlx4_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size)\n \t}\n \tret = 0;\n out:\n-\tassert(ret >= 0);\n+\tMLX4_ASSERT(ret >= 0);\n \treturn -ret;\n }\n \ndiff --git a/drivers/net/mlx4/mlx4_flow.c b/drivers/net/mlx4/mlx4_flow.c\nindex 96479b8..793f0b0 100644\n--- a/drivers/net/mlx4/mlx4_flow.c\n+++ b/drivers/net/mlx4/mlx4_flow.c\n@@ -9,7 +9,6 @@\n  */\n \n #include <arpa/inet.h>\n-#include <assert.h>\n #include <errno.h>\n #include <stdalign.h>\n #include <stddef.h>\n@@ -547,7 +546,7 @@ struct mlx4_drop {\n \tmask = item->mask ?\n \t\t(const uint8_t *)item->mask :\n \t\t(const uint8_t *)proc->mask_default;\n-\tassert(mask);\n+\tMLX4_ASSERT(mask);\n \t/*\n \t * Single-pass check to make sure that:\n \t * - Mask is supported, no bits are set outside proc->mask_support.\n@@ -954,8 +953,8 @@ struct mlx4_drop {\n \tstruct mlx4_drop *drop = priv->drop;\n \n \tif (drop) {\n-\t\tassert(drop->refcnt);\n-\t\tassert(drop->priv == priv);\n+\t\tMLX4_ASSERT(drop->refcnt);\n+\t\tMLX4_ASSERT(drop->priv == priv);\n \t\t++drop->refcnt;\n \t\treturn drop;\n \t}\n@@ -1000,7 +999,7 @@ struct mlx4_drop {\n static void\n mlx4_drop_put(struct mlx4_drop *drop)\n {\n-\tassert(drop->refcnt);\n+\tMLX4_ASSERT(drop->refcnt);\n \tif (--drop->refcnt)\n \t\treturn;\n \tdrop->priv->drop = NULL;\n@@ -1045,7 +1044,7 @@ struct mlx4_drop {\n \t\t\tmlx4_rss_detach(flow->rss);\n \t\treturn 0;\n \t}\n-\tassert(flow->ibv_attr);\n+\tMLX4_ASSERT(flow->ibv_attr);\n \tif (!flow->internal &&\n \t    !priv->isolated &&\n \t    flow->ibv_attr->priority == MLX4_FLOW_PRIORITY_LAST) {\n@@ -1111,7 +1110,7 @@ struct mlx4_drop {\n \t\t}\n \t\tqp = priv->drop->qp;\n \t}\n-\tassert(qp);\n+\tMLX4_ASSERT(qp);\n \tif (flow->ibv_flow)\n \t\treturn 0;\n \tflow->ibv_flow = mlx4_glue->create_flow(qp, flow->ibv_attr);\n@@ -1411,10 +1410,11 @@ struct mlx4_drop {\n \n \t\t\tif (!flow->mac)\n \t\t\t\tcontinue;\n-\t\t\tassert(flow->ibv_attr->type == IBV_FLOW_ATTR_NORMAL);\n-\t\t\tassert(flow->ibv_attr->num_of_specs == 1);\n-\t\t\tassert(eth->type == IBV_FLOW_SPEC_ETH);\n-\t\t\tassert(flow->rss);\n+\t\t\tMLX4_ASSERT(flow->ibv_attr->type ==\n+\t\t\t\t    IBV_FLOW_ATTR_NORMAL);\n+\t\t\tMLX4_ASSERT(flow->ibv_attr->num_of_specs == 1);\n+\t\t\tMLX4_ASSERT(eth->type == IBV_FLOW_SPEC_ETH);\n+\t\t\tMLX4_ASSERT(flow->rss);\n \t\t\tif (rule_vlan &&\n \t\t\t    (eth->val.vlan_tag != *rule_vlan ||\n \t\t\t     eth->mask.vlan_tag != RTE_BE16(0x0fff)))\n@@ -1463,13 +1463,13 @@ struct mlx4_drop {\n \t\t\t\tif (flow->promisc)\n \t\t\t\t\tbreak;\n \t\t\t} else {\n-\t\t\t\tassert(ETH_DEV(priv)->data->all_multicast);\n+\t\t\t\tMLX4_ASSERT(ETH_DEV(priv)->data->all_multicast);\n \t\t\t\tif (flow->allmulti)\n \t\t\t\t\tbreak;\n \t\t\t}\n \t\t}\n \t\tif (flow && flow->internal) {\n-\t\t\tassert(flow->rss);\n+\t\t\tMLX4_ASSERT(flow->rss);\n \t\t\tif (flow->rss->queues != queues ||\n \t\t\t    memcmp(flow->rss->queue_id, action_rss.queue,\n \t\t\t\t   queues * sizeof(flow->rss->queue_id[0])))\n@@ -1481,7 +1481,7 @@ struct mlx4_drop {\n \t\t\t\tpattern[1].spec = NULL;\n \t\t\t\tpattern[1].mask = NULL;\n \t\t\t} else {\n-\t\t\t\tassert(ETH_DEV(priv)->data->all_multicast);\n+\t\t\t\tMLX4_ASSERT(ETH_DEV(priv)->data->all_multicast);\n \t\t\t\tpattern[1].spec = &eth_allmulti;\n \t\t\t\tpattern[1].mask = &eth_allmulti;\n \t\t\t}\n@@ -1493,7 +1493,7 @@ struct mlx4_drop {\n \t\t\t\tgoto error;\n \t\t\t}\n \t\t}\n-\t\tassert(flow->promisc || flow->allmulti);\n+\t\tMLX4_ASSERT(flow->promisc || flow->allmulti);\n \t\tflow->select = 1;\n \t}\n error:\n@@ -1557,7 +1557,7 @@ struct mlx4_drop {\n \t\t\treturn ret;\n \t}\n \tif (!priv->started)\n-\t\tassert(!priv->drop);\n+\t\tMLX4_ASSERT(!priv->drop);\n \treturn 0;\n }\n \n@@ -1577,7 +1577,7 @@ struct mlx4_drop {\n \n \twhile ((flow = LIST_FIRST(&priv->flows)))\n \t\tmlx4_flow_destroy(ETH_DEV(priv), flow, NULL);\n-\tassert(LIST_EMPTY(&priv->rss));\n+\tMLX4_ASSERT(LIST_EMPTY(&priv->rss));\n }\n \n static const struct rte_flow_ops mlx4_flow_ops = {\ndiff --git a/drivers/net/mlx4/mlx4_intr.c b/drivers/net/mlx4/mlx4_intr.c\nindex 4f33526..020fc25 100644\n--- a/drivers/net/mlx4/mlx4_intr.c\n+++ b/drivers/net/mlx4/mlx4_intr.c\n@@ -8,7 +8,6 @@\n  * Interrupts handling for mlx4 driver.\n  */\n \n-#include <assert.h>\n #include <errno.h>\n #include <stdint.h>\n #include <stdlib.h>\n@@ -122,7 +121,7 @@\n \tconst struct rte_intr_conf *const intr_conf =\n \t\t&ETH_DEV(priv)->data->dev_conf.intr_conf;\n \n-\tassert(priv->intr_alarm == 1);\n+\tMLX4_ASSERT(priv->intr_alarm == 1);\n \tpriv->intr_alarm = 0;\n \tif (intr_conf->lsc && !mlx4_link_status_check(priv))\n \t\t_rte_eth_dev_callback_process(ETH_DEV(priv),\ndiff --git a/drivers/net/mlx4/mlx4_mp.c b/drivers/net/mlx4/mlx4_mp.c\nindex cdb6485..eca0c20 100644\n--- a/drivers/net/mlx4/mlx4_mp.c\n+++ b/drivers/net/mlx4/mlx4_mp.c\n@@ -3,7 +3,6 @@\n  * Copyright 2019 Mellanox Technologies, Ltd\n  */\n \n-#include <assert.h>\n #include <stdio.h>\n #include <time.h>\n \n@@ -62,7 +61,7 @@\n \tuint32_t lkey;\n \tint ret;\n \n-\tassert(rte_eal_process_type() == RTE_PROC_PRIMARY);\n+\tMLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);\n \tif (!rte_eth_dev_is_valid_port(param->port_id)) {\n \t\trte_errno = ENODEV;\n \t\tERROR(\"port %u invalid port ID\", param->port_id);\n@@ -114,7 +113,7 @@\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n-\tassert(rte_eal_process_type() == RTE_PROC_SECONDARY);\n+\tMLX4_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY);\n \tif (!rte_eth_dev_is_valid_port(param->port_id)) {\n \t\trte_errno = ENODEV;\n \t\tERROR(\"port %u invalid port ID\", param->port_id);\n@@ -167,7 +166,7 @@\n \tint ret;\n \tint i;\n \n-\tassert(rte_eal_process_type() == RTE_PROC_PRIMARY);\n+\tMLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);\n \tif (!mlx4_shared_data->secondary_cnt)\n \t\treturn;\n \tif (type != MLX4_MP_REQ_START_RXTX && type != MLX4_MP_REQ_STOP_RXTX) {\n@@ -249,7 +248,7 @@\n \tstruct timespec ts = {.tv_sec = MLX4_MP_REQ_TIMEOUT_SEC, .tv_nsec = 0};\n \tint ret;\n \n-\tassert(rte_eal_process_type() == RTE_PROC_SECONDARY);\n+\tMLX4_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY);\n \tmp_init_msg(dev, &mp_req, MLX4_MP_REQ_CREATE_MR);\n \treq->args.addr = addr;\n \tret = rte_mp_request_sync(&mp_req, &mp_rep, &ts);\n@@ -258,7 +257,7 @@\n \t\t      dev->data->port_id);\n \t\treturn -rte_errno;\n \t}\n-\tassert(mp_rep.nb_received == 1);\n+\tMLX4_ASSERT(mp_rep.nb_received == 1);\n \tmp_res = &mp_rep.msgs[0];\n \tres = (struct mlx4_mp_param *)mp_res->param;\n \tret = res->result;\n@@ -287,7 +286,7 @@\n \tstruct timespec ts = {.tv_sec = MLX4_MP_REQ_TIMEOUT_SEC, .tv_nsec = 0};\n \tint ret;\n \n-\tassert(rte_eal_process_type() == RTE_PROC_SECONDARY);\n+\tMLX4_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY);\n \tmp_init_msg(dev, &mp_req, MLX4_MP_REQ_VERBS_CMD_FD);\n \tret = rte_mp_request_sync(&mp_req, &mp_rep, &ts);\n \tif (ret) {\n@@ -295,7 +294,7 @@\n \t\t      dev->data->port_id);\n \t\treturn -rte_errno;\n \t}\n-\tassert(mp_rep.nb_received == 1);\n+\tMLX4_ASSERT(mp_rep.nb_received == 1);\n \tmp_res = &mp_rep.msgs[0];\n \tres = (struct mlx4_mp_param *)mp_res->param;\n \tif (res->result) {\n@@ -305,7 +304,7 @@\n \t\tret = -rte_errno;\n \t\tgoto exit;\n \t}\n-\tassert(mp_res->num_fds == 1);\n+\tMLX4_ASSERT(mp_res->num_fds == 1);\n \tret = mp_res->fds[0];\n \tDEBUG(\"port %u command FD from primary is %d\",\n \t      dev->data->port_id, ret);\n@@ -322,7 +321,7 @@\n {\n \tint ret;\n \n-\tassert(rte_eal_process_type() == RTE_PROC_PRIMARY);\n+\tMLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);\n \n \t/* primary is allowed to not support IPC */\n \tret = rte_mp_action_register(MLX4_MP_NAME, mp_primary_handle);\n@@ -337,7 +336,7 @@\n void\n mlx4_mp_uninit_primary(void)\n {\n-\tassert(rte_eal_process_type() == RTE_PROC_PRIMARY);\n+\tMLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);\n \trte_mp_action_unregister(MLX4_MP_NAME);\n }\n \n@@ -347,7 +346,7 @@\n int\n mlx4_mp_init_secondary(void)\n {\n-\tassert(rte_eal_process_type() == RTE_PROC_SECONDARY);\n+\tMLX4_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY);\n \treturn rte_mp_action_register(MLX4_MP_NAME, mp_secondary_handle);\n }\n \n@@ -357,6 +356,6 @@\n void\n mlx4_mp_uninit_secondary(void)\n {\n-\tassert(rte_eal_process_type() == RTE_PROC_SECONDARY);\n+\tMLX4_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY);\n \trte_mp_action_unregister(MLX4_MP_NAME);\n }\ndiff --git a/drivers/net/mlx4/mlx4_mr.c b/drivers/net/mlx4/mlx4_mr.c\nindex 069a450..bacaef1 100644\n--- a/drivers/net/mlx4/mlx4_mr.c\n+++ b/drivers/net/mlx4/mlx4_mr.c\n@@ -8,7 +8,6 @@\n  * Memory management functions for mlx4 driver.\n  */\n \n-#include <assert.h>\n #include <errno.h>\n #include <inttypes.h>\n #include <stddef.h>\n@@ -113,12 +112,12 @@ struct mr_update_mp_data {\n \tuint16_t n;\n \tuint16_t base = 0;\n \n-\tassert(bt != NULL);\n+\tMLX4_ASSERT(bt != NULL);\n \tlkp_tbl = *bt->table;\n \tn = bt->len;\n \t/* First entry must be NULL for comparison. */\n-\tassert(bt->len > 0 || (lkp_tbl[0].start == 0 &&\n-\t\t\t       lkp_tbl[0].lkey == UINT32_MAX));\n+\tMLX4_ASSERT(bt->len > 0 || (lkp_tbl[0].start == 0 &&\n+\t\t\t\t    lkp_tbl[0].lkey == UINT32_MAX));\n \t/* Binary search. */\n \tdo {\n \t\tregister uint16_t delta = n >> 1;\n@@ -130,7 +129,7 @@ struct mr_update_mp_data {\n \t\t\tn -= delta;\n \t\t}\n \t} while (n > 1);\n-\tassert(addr >= lkp_tbl[base].start);\n+\tMLX4_ASSERT(addr >= lkp_tbl[base].start);\n \t*idx = base;\n \tif (addr < lkp_tbl[base].end)\n \t\treturn lkp_tbl[base].lkey;\n@@ -156,9 +155,9 @@ struct mr_update_mp_data {\n \tuint16_t idx = 0;\n \tsize_t shift;\n \n-\tassert(bt != NULL);\n-\tassert(bt->len <= bt->size);\n-\tassert(bt->len > 0);\n+\tMLX4_ASSERT(bt != NULL);\n+\tMLX4_ASSERT(bt->len <= bt->size);\n+\tMLX4_ASSERT(bt->len > 0);\n \tlkp_tbl = *bt->table;\n \t/* Find out the slot for insertion. */\n \tif (mr_btree_lookup(bt, &idx, entry->start) != UINT32_MAX) {\n@@ -294,9 +293,9 @@ struct mr_update_mp_data {\n \tif (mr->msl == NULL) {\n \t\tstruct ibv_mr *ibv_mr = mr->ibv_mr;\n \n-\t\tassert(mr->ms_bmp_n == 1);\n-\t\tassert(mr->ms_n == 1);\n-\t\tassert(base_idx == 0);\n+\t\tMLX4_ASSERT(mr->ms_bmp_n == 1);\n+\t\tMLX4_ASSERT(mr->ms_n == 1);\n+\t\tMLX4_ASSERT(base_idx == 0);\n \t\t/*\n \t\t * Can't search it from memseg list but get it directly from\n \t\t * verbs MR as there's only one chunk.\n@@ -315,7 +314,7 @@ struct mr_update_mp_data {\n \t\t\tmsl = mr->msl;\n \t\t\tms = rte_fbarray_get(&msl->memseg_arr,\n \t\t\t\t\t     mr->ms_base_idx + idx);\n-\t\t\tassert(msl->page_sz == ms->hugepage_sz);\n+\t\t\tMLX4_ASSERT(msl->page_sz == ms->hugepage_sz);\n \t\t\tif (!start)\n \t\t\t\tstart = ms->addr_64;\n \t\t\tend = ms->addr_64 + ms->hugepage_sz;\n@@ -452,8 +451,8 @@ struct mr_update_mp_data {\n \t\tif (mr != NULL)\n \t\t\tlkey = entry->lkey;\n \t}\n-\tassert(lkey == UINT32_MAX || (addr >= entry->start &&\n-\t\t\t\t      addr < entry->end));\n+\tMLX4_ASSERT(lkey == UINT32_MAX || (addr >= entry->start &&\n+\t\t\t\t\t   addr < entry->end));\n \treturn lkey;\n }\n \n@@ -491,7 +490,7 @@ struct mr_update_mp_data {\n \tstruct mlx4_mr_list free_list = LIST_HEAD_INITIALIZER(free_list);\n \n \t/* Must be called from the primary process. */\n-\tassert(rte_eal_process_type() == RTE_PROC_PRIMARY);\n+\tMLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);\n \t/*\n \t * MR can't be freed with holding the lock because rte_free() could call\n \t * memory free callback function. This will be a deadlock situation.\n@@ -564,7 +563,7 @@ struct mr_update_mp_data {\n \t/* Fill in output data. */\n \tmr_lookup_dev(dev, entry, addr);\n \t/* Lookup can't fail. */\n-\tassert(entry->lkey != UINT32_MAX);\n+\tMLX4_ASSERT(entry->lkey != UINT32_MAX);\n \trte_rwlock_read_unlock(&priv->mr.rwlock);\n \tDEBUG(\"port %u MR CREATED by primary process for %p:\\n\"\n \t      \"  [0x%\" PRIxPTR \", 0x%\" PRIxPTR \"), lkey=0x%x\",\n@@ -646,12 +645,12 @@ struct mr_update_mp_data {\n \t}\n alloc_resources:\n \t/* Addresses must be page-aligned. */\n-\tassert(rte_is_aligned((void *)data.start, data.msl->page_sz));\n-\tassert(rte_is_aligned((void *)data.end, data.msl->page_sz));\n+\tMLX4_ASSERT(rte_is_aligned((void *)data.start, data.msl->page_sz));\n+\tMLX4_ASSERT(rte_is_aligned((void *)data.end, data.msl->page_sz));\n \tmsl = data.msl;\n \tms = rte_mem_virt2memseg((void *)data.start, msl);\n \tlen = data.end - data.start;\n-\tassert(msl->page_sz == ms->hugepage_sz);\n+\tMLX4_ASSERT(msl->page_sz == ms->hugepage_sz);\n \t/* Number of memsegs in the range. */\n \tms_n = len / msl->page_sz;\n \tDEBUG(\"port %u extending %p to [0x%\" PRIxPTR \", 0x%\" PRIxPTR \"),\"\n@@ -718,7 +717,7 @@ struct mr_update_mp_data {\n \t\tmr_free(mr);\n \t\tgoto alloc_resources;\n \t}\n-\tassert(data.msl == data_re.msl);\n+\tMLX4_ASSERT(data.msl == data_re.msl);\n \trte_rwlock_write_lock(&priv->mr.rwlock);\n \t/*\n \t * Check the address is really missing. If other thread already created\n@@ -771,7 +770,7 @@ struct mr_update_mp_data {\n \t}\n \tlen = data.end - data.start;\n \tmr->ms_bmp_n = len / msl->page_sz;\n-\tassert(ms_idx_shift + mr->ms_bmp_n <= ms_n);\n+\tMLX4_ASSERT(ms_idx_shift + mr->ms_bmp_n <= ms_n);\n \t/*\n \t * Finally create a verbs MR for the memory chunk. ibv_reg_mr() can be\n \t * called with holding the memory lock because it doesn't use\n@@ -786,8 +785,8 @@ struct mr_update_mp_data {\n \t\trte_errno = EINVAL;\n \t\tgoto err_mrlock;\n \t}\n-\tassert((uintptr_t)mr->ibv_mr->addr == data.start);\n-\tassert(mr->ibv_mr->length == len);\n+\tMLX4_ASSERT((uintptr_t)mr->ibv_mr->addr == data.start);\n+\tMLX4_ASSERT(mr->ibv_mr->length == len);\n \tLIST_INSERT_HEAD(&priv->mr.mr_list, mr, mr);\n \tDEBUG(\"port %u MR CREATED (%p) for %p:\\n\"\n \t      \"  [0x%\" PRIxPTR \", 0x%\" PRIxPTR \"),\"\n@@ -800,7 +799,7 @@ struct mr_update_mp_data {\n \t/* Fill in output data. */\n \tmr_lookup_dev(dev, entry, addr);\n \t/* Lookup can't fail. */\n-\tassert(entry->lkey != UINT32_MAX);\n+\tMLX4_ASSERT(entry->lkey != UINT32_MAX);\n \trte_rwlock_write_unlock(&priv->mr.rwlock);\n \trte_mcfg_mem_read_unlock();\n \treturn entry->lkey;\n@@ -905,8 +904,9 @@ struct mr_update_mp_data {\n \t      dev->data->port_id, addr, len);\n \tmsl = rte_mem_virt2memseg_list(addr);\n \t/* addr and len must be page-aligned. */\n-\tassert((uintptr_t)addr == RTE_ALIGN((uintptr_t)addr, msl->page_sz));\n-\tassert(len == RTE_ALIGN(len, msl->page_sz));\n+\tMLX4_ASSERT((uintptr_t)addr ==\n+\t\t    RTE_ALIGN((uintptr_t)addr, msl->page_sz));\n+\tMLX4_ASSERT(len == RTE_ALIGN(len, msl->page_sz));\n \tms_n = len / msl->page_sz;\n \trte_rwlock_write_lock(&priv->mr.rwlock);\n \t/* Clear bits of freed memsegs from MR. */\n@@ -922,14 +922,14 @@ struct mr_update_mp_data {\n \t\tmr = mr_lookup_dev_list(dev, &entry, start);\n \t\tif (mr == NULL)\n \t\t\tcontinue;\n-\t\tassert(mr->msl); /* Can't be external memory. */\n+\t\tMLX4_ASSERT(mr->msl); /* Can't be external memory. */\n \t\tms = rte_mem_virt2memseg((void *)start, msl);\n-\t\tassert(ms != NULL);\n-\t\tassert(msl->page_sz == ms->hugepage_sz);\n+\t\tMLX4_ASSERT(ms != NULL);\n+\t\tMLX4_ASSERT(msl->page_sz == ms->hugepage_sz);\n \t\tms_idx = rte_fbarray_find_idx(&msl->memseg_arr, ms);\n \t\tpos = ms_idx - mr->ms_base_idx;\n-\t\tassert(rte_bitmap_get(mr->ms_bmp, pos));\n-\t\tassert(pos < mr->ms_bmp_n);\n+\t\tMLX4_ASSERT(rte_bitmap_get(mr->ms_bmp, pos));\n+\t\tMLX4_ASSERT(pos < mr->ms_bmp_n);\n \t\tDEBUG(\"port %u MR(%p): clear bitmap[%u] for addr %p\",\n \t\t      dev->data->port_id, (void *)mr, pos, (void *)start);\n \t\trte_bitmap_clear(mr->ms_bmp, pos);\n@@ -986,7 +986,7 @@ struct mr_update_mp_data {\n \tstruct mlx4_dev_list *dev_list = &mlx4_shared_data->mem_event_cb_list;\n \n \t/* Must be called from the primary process. */\n-\tassert(rte_eal_process_type() == RTE_PROC_PRIMARY);\n+\tMLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);\n \tswitch (event_type) {\n \tcase RTE_MEM_EVENT_FREE:\n \t\trte_rwlock_read_lock(&mlx4_shared_data->mem_event_rwlock);\n@@ -1222,7 +1222,7 @@ struct mr_update_mp_data {\n \tstruct mlx4_mr_cache entry;\n \tuint32_t lkey;\n \n-\tassert(rte_eal_process_type() == RTE_PROC_PRIMARY);\n+\tMLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);\n \t/* If already registered, it should return. */\n \trte_rwlock_read_lock(&priv->mr.rwlock);\n \tlkey = mr_lookup_dev(dev, &entry, addr);\ndiff --git a/drivers/net/mlx4/mlx4_rxq.c b/drivers/net/mlx4/mlx4_rxq.c\nindex 4a6fbd9..0699bdd 100644\n--- a/drivers/net/mlx4/mlx4_rxq.c\n+++ b/drivers/net/mlx4/mlx4_rxq.c\n@@ -8,7 +8,6 @@\n  * Rx queues configuration for mlx4 driver.\n  */\n \n-#include <assert.h>\n #include <errno.h>\n #include <stddef.h>\n #include <stdint.h>\n@@ -140,12 +139,12 @@ struct mlx4_rss *\n void\n mlx4_rss_put(struct mlx4_rss *rss)\n {\n-\tassert(rss->refcnt);\n+\tMLX4_ASSERT(rss->refcnt);\n \tif (--rss->refcnt)\n \t\treturn;\n-\tassert(!rss->usecnt);\n-\tassert(!rss->qp);\n-\tassert(!rss->ind);\n+\tMLX4_ASSERT(!rss->usecnt);\n+\tMLX4_ASSERT(!rss->qp);\n+\tMLX4_ASSERT(!rss->ind);\n \tLIST_REMOVE(rss, next);\n \trte_free(rss);\n }\n@@ -167,10 +166,10 @@ struct mlx4_rss *\n int\n mlx4_rss_attach(struct mlx4_rss *rss)\n {\n-\tassert(rss->refcnt);\n+\tMLX4_ASSERT(rss->refcnt);\n \tif (rss->usecnt++) {\n-\t\tassert(rss->qp);\n-\t\tassert(rss->ind);\n+\t\tMLX4_ASSERT(rss->qp);\n+\t\tMLX4_ASSERT(rss->ind);\n \t\treturn 0;\n \t}\n \n@@ -295,9 +294,9 @@ struct mlx4_rss *\n \tstruct rte_eth_dev *dev = ETH_DEV(priv);\n \tunsigned int i;\n \n-\tassert(rss->refcnt);\n-\tassert(rss->qp);\n-\tassert(rss->ind);\n+\tMLX4_ASSERT(rss->refcnt);\n+\tMLX4_ASSERT(rss->qp);\n+\tMLX4_ASSERT(rss->ind);\n \tif (--rss->usecnt)\n \t\treturn;\n \tclaim_zero(mlx4_glue->destroy_qp(rss->qp));\n@@ -366,7 +365,7 @@ struct mlx4_rss *\n \n \t\t/* Attach the configured Rx queues. */\n \t\tif (rxq) {\n-\t\t\tassert(!rxq->usecnt);\n+\t\t\tMLX4_ASSERT(!rxq->usecnt);\n \t\t\tret = mlx4_rxq_attach(rxq);\n \t\t\tif (!ret) {\n \t\t\t\twq_num = rxq->wq->wq_num;\n@@ -463,7 +462,7 @@ struct mlx4_rss *\n \t\tstruct rxq *rxq = ETH_DEV(priv)->data->rx_queues[i];\n \n \t\tif (rxq) {\n-\t\t\tassert(rxq->usecnt == 1);\n+\t\t\tMLX4_ASSERT(rxq->usecnt == 1);\n \t\t\tmlx4_rxq_detach(rxq);\n \t\t}\n \t}\n@@ -488,10 +487,10 @@ struct mlx4_rss *\n mlx4_rxq_attach(struct rxq *rxq)\n {\n \tif (rxq->usecnt++) {\n-\t\tassert(rxq->cq);\n-\t\tassert(rxq->wq);\n-\t\tassert(rxq->wqes);\n-\t\tassert(rxq->rq_db);\n+\t\tMLX4_ASSERT(rxq->cq);\n+\t\tMLX4_ASSERT(rxq->wq);\n+\t\tMLX4_ASSERT(rxq->wqes);\n+\t\tMLX4_ASSERT(rxq->rq_db);\n \t\treturn 0;\n \t}\n \n@@ -512,7 +511,7 @@ struct mlx4_rss *\n \tunsigned int i;\n \tint ret;\n \n-\tassert(rte_is_power_of_2(elts_n));\n+\tMLX4_ASSERT(rte_is_power_of_2(elts_n));\n \tpriv->verbs_alloc_ctx.type = MLX4_VERBS_ALLOC_TYPE_RX_QUEUE;\n \tpriv->verbs_alloc_ctx.obj = rxq;\n \tcq = mlx4_glue->create_cq(priv->ctx, elts_n / sges_n, NULL,\n@@ -584,10 +583,10 @@ struct mlx4_rss *\n \t\t\tgoto error;\n \t\t}\n \t\t/* Headroom is reserved by rte_pktmbuf_alloc(). */\n-\t\tassert(buf->data_off == RTE_PKTMBUF_HEADROOM);\n+\t\tMLX4_ASSERT(buf->data_off == RTE_PKTMBUF_HEADROOM);\n \t\t/* Buffer is supposed to be empty. */\n-\t\tassert(rte_pktmbuf_data_len(buf) == 0);\n-\t\tassert(rte_pktmbuf_pkt_len(buf) == 0);\n+\t\tMLX4_ASSERT(rte_pktmbuf_data_len(buf) == 0);\n+\t\tMLX4_ASSERT(rte_pktmbuf_pkt_len(buf) == 0);\n \t\t/* Only the first segment keeps headroom. */\n \t\tif (i % sges_n)\n \t\t\tbuf->data_off = 0;\n@@ -828,7 +827,7 @@ struct mlx4_rss *\n \t\t.socket = socket,\n \t};\n \t/* Enable scattered packets support for this queue if necessary. */\n-\tassert(mb_len >= RTE_PKTMBUF_HEADROOM);\n+\tMLX4_ASSERT(mb_len >= RTE_PKTMBUF_HEADROOM);\n \tif (dev->data->dev_conf.rxmode.max_rx_pkt_len <=\n \t    (mb_len - RTE_PKTMBUF_HEADROOM)) {\n \t\t;\n@@ -904,7 +903,7 @@ struct mlx4_rss *\n \tret = rte_errno;\n \tmlx4_rx_queue_release(rxq);\n \trte_errno = ret;\n-\tassert(rte_errno > 0);\n+\tMLX4_ASSERT(rte_errno > 0);\n \treturn -rte_errno;\n }\n \n@@ -931,10 +930,10 @@ struct mlx4_rss *\n \t\t\tETH_DEV(priv)->data->rx_queues[i] = NULL;\n \t\t\tbreak;\n \t\t}\n-\tassert(!rxq->cq);\n-\tassert(!rxq->wq);\n-\tassert(!rxq->wqes);\n-\tassert(!rxq->rq_db);\n+\tMLX4_ASSERT(!rxq->cq);\n+\tMLX4_ASSERT(!rxq->wq);\n+\tMLX4_ASSERT(!rxq->wqes);\n+\tMLX4_ASSERT(!rxq->rq_db);\n \tif (rxq->channel)\n \t\tclaim_zero(mlx4_glue->destroy_comp_channel(rxq->channel));\n \tmlx4_mr_btree_free(&rxq->mr_ctrl.cache_bh);\ndiff --git a/drivers/net/mlx4/mlx4_rxtx.c b/drivers/net/mlx4/mlx4_rxtx.c\nindex a8e880e..cc9bc6b 100644\n--- a/drivers/net/mlx4/mlx4_rxtx.c\n+++ b/drivers/net/mlx4/mlx4_rxtx.c\n@@ -8,7 +8,6 @@\n  * Data plane functions for mlx4 driver.\n  */\n \n-#include <assert.h>\n #include <stdbool.h>\n #include <stdint.h>\n #include <string.h>\n@@ -264,7 +263,7 @@ struct tso_info {\n \tuint32_t stamp = sq->stamp;\n \tint32_t size = (intptr_t)end - (intptr_t)start;\n \n-\tassert(start != end);\n+\tMLX4_ASSERT(start != end);\n \t/* Hold SQ ring wrap around. */\n \tif (size < 0) {\n \t\tsize = (int32_t)sq->size + size;\n@@ -891,12 +890,12 @@ struct tso_info {\n \tvolatile struct mlx4_wqe_ctrl_seg *ctrl;\n \tstruct txq_elt *elt;\n \n-\tassert(txq->elts_comp_cd != 0);\n+\tMLX4_ASSERT(txq->elts_comp_cd != 0);\n \tif (likely(max >= txq->elts_comp_cd_init))\n \t\tmlx4_txq_complete(txq, elts_m, sq);\n \tmax = elts_n - max;\n-\tassert(max >= 1);\n-\tassert(max <= elts_n);\n+\tMLX4_ASSERT(max >= 1);\n+\tMLX4_ASSERT(max <= elts_n);\n \t/* Always leave one free entry in the ring. */\n \t--max;\n \tif (max > pkts_n)\n@@ -1194,9 +1193,9 @@ struct tso_info {\n \t * ownership bit.\n \t */\n \trte_rmb();\n-\tassert(!(cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK));\n-\tassert((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) !=\n-\t       MLX4_CQE_OPCODE_ERROR);\n+\tMLX4_ASSERT(!(cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK));\n+\tMLX4_ASSERT((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) !=\n+\t\t    MLX4_CQE_OPCODE_ERROR);\n \tret = rte_be_to_cpu_32(cqe->byte_cnt);\n \t++cq->cons_index;\n out:\n@@ -1252,7 +1251,7 @@ struct tso_info {\n \t\t\t\tbreak;\n \t\t\t}\n \t\t\twhile (pkt != seg) {\n-\t\t\t\tassert(pkt != (*rxq->elts)[idx]);\n+\t\t\t\tMLX4_ASSERT(pkt != (*rxq->elts)[idx]);\n \t\t\t\trep = pkt->next;\n \t\t\t\tpkt->next = NULL;\n \t\t\t\tpkt->nb_segs = 1;\n@@ -1275,7 +1274,7 @@ struct tso_info {\n \t\t\t\tgoto skip;\n \t\t\t}\n \t\t\tpkt = seg;\n-\t\t\tassert(len >= (rxq->crc_present << 2));\n+\t\t\tMLX4_ASSERT(len >= (rxq->crc_present << 2));\n \t\t\t/* Update packet information. */\n \t\t\tpkt->packet_type =\n \t\t\t\trxq_cq_to_pkt_type(cqe, rxq->l2tun_offload);\ndiff --git a/drivers/net/mlx4/mlx4_txq.c b/drivers/net/mlx4/mlx4_txq.c\nindex 01a5efd..37b8441 100644\n--- a/drivers/net/mlx4/mlx4_txq.c\n+++ b/drivers/net/mlx4/mlx4_txq.c\n@@ -8,7 +8,6 @@\n  * Tx queues configuration for mlx4 driver.\n  */\n \n-#include <assert.h>\n #include <errno.h>\n #include <stddef.h>\n #include <stdint.h>\n@@ -51,8 +50,8 @@\n \tstruct mlx4_priv *priv = txq->priv;\n \tstruct mlx4_proc_priv *ppriv = MLX4_PROC_PRIV(PORT_ID(priv));\n \n-\tassert(rte_eal_process_type() == RTE_PROC_PRIMARY);\n-\tassert(ppriv);\n+\tMLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);\n+\tMLX4_ASSERT(ppriv);\n \tppriv->uar_table[txq->stats.idx] = txq->msq.db;\n }\n \n@@ -81,7 +80,7 @@\n \tuintptr_t offset;\n \tconst size_t page_size = sysconf(_SC_PAGESIZE);\n \n-\tassert(ppriv);\n+\tMLX4_ASSERT(ppriv);\n \t/*\n \t * As rdma-core, UARs are mapped in size of OS page\n \t * size. Ref to libmlx4 function: mlx4_init_context()\n@@ -137,12 +136,12 @@\n \tunsigned int i;\n \tint ret;\n \n-\tassert(rte_eal_process_type() == RTE_PROC_SECONDARY);\n+\tMLX4_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY);\n \tfor (i = 0; i != txqs_n; ++i) {\n \t\ttxq = dev->data->tx_queues[i];\n \t\tif (!txq)\n \t\t\tcontinue;\n-\t\tassert(txq->stats.idx == (uint16_t)i);\n+\t\tMLX4_ASSERT(txq->stats.idx == (uint16_t)i);\n \t\tret = txq_uar_init_secondary(txq, fd);\n \t\tif (ret)\n \t\t\tgoto error;\n@@ -163,7 +162,7 @@\n mlx4_tx_uar_init_secondary(struct rte_eth_dev *dev __rte_unused,\n \t\t\t   int fd __rte_unused)\n {\n-\tassert(rte_eal_process_type() == RTE_PROC_SECONDARY);\n+\tMLX4_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY);\n \tERROR(\"UAR remap is not supported\");\n \trte_errno = ENOTSUP;\n \treturn -rte_errno;\n@@ -188,7 +187,7 @@\n \twhile (elts_tail != elts_head) {\n \t\tstruct txq_elt *elt = &(*elts)[elts_tail++ & elts_m];\n \n-\t\tassert(elt->buf != NULL);\n+\t\tMLX4_ASSERT(elt->buf != NULL);\n \t\trte_pktmbuf_free(elt->buf);\n \t\telt->buf = NULL;\n \t\telt->wqe = NULL;\n@@ -489,7 +488,7 @@\n \tret = rte_errno;\n \tmlx4_tx_queue_release(txq);\n \trte_errno = ret;\n-\tassert(rte_errno > 0);\n+\tMLX4_ASSERT(rte_errno > 0);\n \tpriv->verbs_alloc_ctx.type = MLX4_VERBS_ALLOC_TYPE_NONE;\n \treturn -rte_errno;\n }\ndiff --git a/drivers/net/mlx4/mlx4_utils.c b/drivers/net/mlx4/mlx4_utils.c\nindex a727d70..614dc19 100644\n--- a/drivers/net/mlx4/mlx4_utils.c\n+++ b/drivers/net/mlx4/mlx4_utils.c\n@@ -8,7 +8,6 @@\n  * Utility functions used by the mlx4 driver.\n  */\n \n-#include <assert.h>\n #include <errno.h>\n #include <fcntl.h>\n #include <stddef.h>\n@@ -36,7 +35,7 @@\n \n \tif (ret != -1 && !fcntl(fd, F_SETFL, ret | O_NONBLOCK))\n \t\treturn 0;\n-\tassert(errno);\n+\tMLX4_ASSERT(errno);\n \trte_errno = errno;\n \treturn -rte_errno;\n }\ndiff --git a/drivers/net/mlx4/mlx4_utils.h b/drivers/net/mlx4/mlx4_utils.h\nindex 7f9a826..9137b1b 100644\n--- a/drivers/net/mlx4/mlx4_utils.h\n+++ b/drivers/net/mlx4/mlx4_utils.h\n@@ -6,7 +6,6 @@\n #ifndef MLX4_UTILS_H_\n #define MLX4_UTILS_H_\n \n-#include <assert.h>\n #include <stddef.h>\n #include <stdio.h>\n \n@@ -54,12 +53,13 @@\n \t\t\t__func__, \\\n \t\t\tRTE_FMT_TAIL(__VA_ARGS__,)))\n #define DEBUG(...) PMD_DRV_LOG(DEBUG, __VA_ARGS__)\n-#define claim_zero(...) assert((__VA_ARGS__) == 0)\n+#define MLX4_ASSERT(exp) RTE_VERIFY(exp)\n+#define claim_zero(...) MLX4_ASSERT((__VA_ARGS__) == 0)\n \n #else /* MLX4_DEBUG */\n \n /*\n- * Like assert(), DEBUG() becomes a no-op and claim_zero() does not perform\n+ * Like MLX4_ASSERT(), DEBUG() becomes a no-op and claim_zero() does not perform\n  * any check when debugging is disabled.\n  */\n \n@@ -69,6 +69,7 @@\n \t\t\tRTE_FMT_HEAD(__VA_ARGS__,) \"\\n\", \\\n \t\tRTE_FMT_TAIL(__VA_ARGS__,)))\n #define DEBUG(...) (void)0\n+#define MLX4_ASSERT(exp) RTE_ASSERT(exp)\n #define claim_zero(...) (__VA_ARGS__)\n \n #endif /* MLX4_DEBUG */\n",
    "prefixes": [
        "v2",
        "3/5"
    ]
}