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GET /api/patches/64929/?format=api
{ "id": 64929, "url": "http://patches.dpdk.org/api/patches/64929/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1579527918-360-11-git-send-email-anoobj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1579527918-360-11-git-send-email-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1579527918-360-11-git-send-email-anoobj@marvell.com", "date": "2020-01-20T13:45:16", "name": "[v2,10/12] examples/ipsec-secgw: add driver mode worker", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "60209f8d04b79b2bd764e52d2857c4380e9396c0", "submitter": { "id": 1205, "url": "http://patches.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1579527918-360-11-git-send-email-anoobj@marvell.com/mbox/", "series": [ { "id": 8219, "url": "http://patches.dpdk.org/api/series/8219/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8219", "date": "2020-01-20T13:45:06", "name": "add eventmode to ipsec-secgw", "version": 2, "mbox": "http://patches.dpdk.org/series/8219/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/64929/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/64929/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 240B9A0528;\n\tMon, 20 Jan 2020 14:47:32 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id BA8FF378B;\n\tMon, 20 Jan 2020 14:46:39 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 6EA4D1BEA5\n for <dev@dpdk.org>; Mon, 20 Jan 2020 14:46:38 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 00KDjs3Q018920; Mon, 20 Jan 2020 05:46:37 -0800", "from sc-exch02.marvell.com ([199.233.58.182])\n by mx0a-0016f401.pphosted.com with ESMTP id 2xm08v6jm8-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 20 Jan 2020 05:46:37 -0800", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH02.marvell.com\n (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 20 Jan\n 2020 05:46:36 -0800", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n (10.93.176.83) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Mon, 20 Jan 2020 05:46:35 -0800", "from ajoseph83.caveonetworks.com (unknown [10.29.45.60])\n by maili.marvell.com (Postfix) with ESMTP id 4CC2A3F703F;\n Mon, 20 Jan 2020 05:46:32 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0818;\n bh=MuqQ4HM9fo5NkyzAGTN6hz1f8VtDa4zvtqdy6wcAj8M=;\n b=AlaQzPbhDeuRr+C9PkhPjERNseigjR4C5ZHUV2RZrTw7skMAChpNzTtooVyj1UogT3b/\n ZfO9Y5foyubVTdL283Iyln8UszhqlSOalwk6dBpMeI5vMlRurfse+ursEn4LrPBig5xS\n CEaabMPgZGAKZz2SXNU0XtcaF7RWMKaH/4yfLHEelkgmo+x34bwN9BrM/f6hpNb+9Don\n 37ai1Z+YRH+Z70WIuWyp8VwHp2xxJTD/q/xlIIfWnQ3K9pQGFQ8eqm4ihixkivXQDD31\n NFGRLjuUz7t1Tw8agGA8WvDmg0kJZOyu2N2i/zbv1srBUxjQl0fAY6OoHn8F0+B+lxm7 Sg==", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Akhil Goyal <akhil.goyal@nxp.com>, Radu Nicolau <radu.nicolau@intel.com>,\n Thomas Monjalon <thomas@monjalon.net>", "CC": "Lukasz Bartosik <lbartosik@marvell.com>, Jerin Jacob <jerinj@marvell.com>,\n Narayana Prasad <pathreya@marvell.com>,\n Ankur Dwivedi <adwivedi@marvell.com>, Anoob Joseph <anoobj@marvell.com>,\n Archana Muniganti <marchana@marvell.com>,\n Tejasree Kondoj <ktejasree@marvell.com>, Vamsi Attunuru\n <vattunuru@marvell.com>,\n Konstantin Ananyev <konstantin.ananyev@intel.com>, <dev@dpdk.org>", "Date": "Mon, 20 Jan 2020 19:15:16 +0530", "Message-ID": "<1579527918-360-11-git-send-email-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1579527918-360-1-git-send-email-anoobj@marvell.com>", "References": "<1575808249-31135-1-git-send-email-anoobj@marvell.com>\n <1579527918-360-1-git-send-email-anoobj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572\n definitions=2020-01-20_02:2020-01-20,\n 2020-01-20 signatures=0", "Subject": "[dpdk-dev] [PATCH v2 10/12] examples/ipsec-secgw: add driver mode\n\tworker", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Lukasz Bartosik <lbartosik@marvell.com>\n\nAdd driver inbound and outbound worker thread for ipsec-secgw. In driver\nmode application does as little as possible. It simply forwards packets\nback to port from which traffic was received instructing HW to apply\ninline security processing using first outbound SA configured for\na given port. If a port does not have SA configured outbound traffic\non that port will be silently dropped. The aim of this mode is to\nmeasure HW capabilities. Driver mode is selected with single-sa option.\nThe single-sa option accepts SA index however in event mode the SA\nindex is ignored.\n\nExample command to run ipsec-secgw in driver mode:\nipsec-secgw -w 0002:02:00.0,ipsec_in_max_spi=128\n-w 0002:03:00.0,ipsec_in_max_spi=128 -w 0002:0e:00.0 -w 0002:10:00.1\n--log-level=8 -c 0x1 -- -P -p 0x3 -u 0x1 --config \"(1,0,0),(0,0,0)\"\n-f aes-gcm.cfg --transfer-mode event --schedule-type parallel\n--single-sa 0\n\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Ankur Dwivedi <adwivedi@marvell.com>\nSigned-off-by: Lukasz Bartosik <lbartosik@marvell.com>\n---\n examples/ipsec-secgw/Makefile | 1 +\n examples/ipsec-secgw/ipsec-secgw.c | 36 +++---\n examples/ipsec-secgw/ipsec-secgw.h | 17 +++\n examples/ipsec-secgw/ipsec.h | 11 ++\n examples/ipsec-secgw/ipsec_worker.c | 240 ++++++++++++++++++++++++++++++++++++\n examples/ipsec-secgw/meson.build | 2 +-\n 6 files changed, 291 insertions(+), 16 deletions(-)\n create mode 100644 examples/ipsec-secgw/ipsec-secgw.h\n create mode 100644 examples/ipsec-secgw/ipsec_worker.c", "diff": "diff --git a/examples/ipsec-secgw/Makefile b/examples/ipsec-secgw/Makefile\nindex 09e3c5a..f6fd94c 100644\n--- a/examples/ipsec-secgw/Makefile\n+++ b/examples/ipsec-secgw/Makefile\n@@ -15,6 +15,7 @@ SRCS-y += sa.c\n SRCS-y += rt.c\n SRCS-y += ipsec_process.c\n SRCS-y += ipsec-secgw.c\n+SRCS-y += ipsec_worker.c\n SRCS-y += event_helper.c\n \n CFLAGS += -gdwarf-2\ndiff --git a/examples/ipsec-secgw/ipsec-secgw.c b/examples/ipsec-secgw/ipsec-secgw.c\nindex f1cc3fb..86215fb 100644\n--- a/examples/ipsec-secgw/ipsec-secgw.c\n+++ b/examples/ipsec-secgw/ipsec-secgw.c\n@@ -70,8 +70,6 @@ volatile bool force_quit;\n \n #define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */\n \n-#define NB_SOCKETS 4\n-\n /* Configure how many packets ahead to prefetch, when reading packets */\n #define PREFETCH_OFFSET\t3\n \n@@ -79,8 +77,6 @@ volatile bool force_quit;\n \n #define MAX_LCORE_PARAMS 1024\n \n-#define UNPROTECTED_PORT(port) (unprotected_port_mask & (1 << portid))\n-\n /*\n * Configurable number of RX/TX ring descriptors\n */\n@@ -190,12 +186,10 @@ static const struct option lgopts[] = {\n /* mask of enabled ports */\n static uint32_t enabled_port_mask;\n static uint64_t enabled_cryptodev_mask = UINT64_MAX;\n-static uint32_t unprotected_port_mask;\n static int32_t promiscuous_on = 1;\n static int32_t numa_on = 1; /**< NUMA is enabled by default. */\n static uint32_t nb_lcores;\n static uint32_t single_sa;\n-static uint32_t single_sa_idx;\n static uint32_t schedule_type;\n \n /*\n@@ -279,8 +273,6 @@ static struct rte_eth_conf port_conf = {\n \t},\n };\n \n-static struct socket_ctx socket_ctx[NB_SOCKETS];\n-\n /*\n * Determine is multi-segment support required:\n * - either frame buffer size is smaller then mtu\n@@ -1114,8 +1106,8 @@ drain_outbound_crypto_queues(const struct lcore_conf *qconf,\n }\n \n /* main processing loop */\n-static int32_t\n-main_loop(__attribute__((unused)) void *dummy)\n+void\n+ipsec_poll_mode_worker(void)\n {\n \tstruct rte_mbuf *pkts[MAX_PKT_BURST];\n \tuint32_t lcore_id;\n@@ -1157,7 +1149,7 @@ main_loop(__attribute__((unused)) void *dummy)\n \tif (qconf->nb_rx_queue == 0) {\n \t\tRTE_LOG(DEBUG, IPSEC, \"lcore %u has nothing to do\\n\",\n \t\t\tlcore_id);\n-\t\treturn 0;\n+\t\treturn;\n \t}\n \n \tRTE_LOG(INFO, IPSEC, \"entering main loop on lcore %u\\n\", lcore_id);\n@@ -1170,7 +1162,7 @@ main_loop(__attribute__((unused)) void *dummy)\n \t\t\tlcore_id, portid, queueid);\n \t}\n \n-\twhile (1) {\n+\twhile (!force_quit) {\n \t\tcur_tsc = rte_rdtsc();\n \n \t\t/* TX queue buffer drain */\n@@ -1324,8 +1316,10 @@ print_usage(const char *prgname)\n \t\t\" -a enables SA SQN atomic behaviour\\n\"\n \t\t\" -f CONFIG_FILE: Configuration file\\n\"\n \t\t\" --config (port,queue,lcore): Rx queue configuration\\n\"\n-\t\t\" --single-sa SAIDX: Use single SA index for outbound traffic,\\n\"\n-\t\t\" bypassing the SP\\n\"\n+\t\t\" --single-sa SAIDX: In poll mode use single SA index for\\n\"\n+\t\t\" outbound traffic, bypassing the SP\\n\"\n+\t\t\" In event mode selects driver mode,\\n\"\n+\t\t\" SA index value is ignored\\n\"\n \t\t\" --cryptodev_mask MASK: Hexadecimal bitmask of the crypto\\n\"\n \t\t\" devices to configure\\n\"\n \t\t\" --transfer-mode MODE\\n\"\n@@ -1980,6 +1974,18 @@ cryptodevs_init(void)\n \t\t\ti++;\n \t\t}\n \n+\t\t/*\n+\t\t * Set the queue pair to at least the number of ethernet\n+\t\t * devices for inline outbound.\n+\t\t */\n+\t\tqp = RTE_MAX(rte_eth_dev_count_avail(), qp);\n+\n+\t\t/*\n+\t\t * The requested number of queues should never exceed\n+\t\t * the max available\n+\t\t */\n+\t\tqp = RTE_MIN(qp, max_nb_qps);\n+\n \t\tif (qp == 0)\n \t\t\tcontinue;\n \n@@ -2871,7 +2877,7 @@ main(int32_t argc, char **argv)\n \tcheck_all_ports_link_status(enabled_port_mask);\n \n \t/* launch per-lcore init on every lcore */\n-\trte_eal_mp_remote_launch(main_loop, NULL, CALL_MASTER);\n+\trte_eal_mp_remote_launch(ipsec_launch_one_lcore, eh_conf, CALL_MASTER);\n \n \tRTE_LCORE_FOREACH_SLAVE(lcore_id) {\n \t\tif (rte_eal_wait_lcore(lcore_id) < 0)\ndiff --git a/examples/ipsec-secgw/ipsec-secgw.h b/examples/ipsec-secgw/ipsec-secgw.h\nnew file mode 100644\nindex 0000000..5b19e29\n--- /dev/null\n+++ b/examples/ipsec-secgw/ipsec-secgw.h\n@@ -0,0 +1,17 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (C) 2020 Marvell International Ltd.\n+ */\n+#ifndef _IPSEC_SECGW_H_\n+#define _IPSEC_SECGW_H_\n+\n+#define NB_SOCKETS 4\n+\n+#define UNPROTECTED_PORT(portid) (unprotected_port_mask & (1 << portid))\n+\n+/* Port mask to identify the unprotected ports */\n+uint32_t unprotected_port_mask;\n+\n+/* Index of SA in single mode */\n+uint32_t single_sa_idx;\n+\n+#endif /* _IPSEC_SECGW_H_ */\ndiff --git a/examples/ipsec-secgw/ipsec.h b/examples/ipsec-secgw/ipsec.h\nindex 0539aec..65be2ac 100644\n--- a/examples/ipsec-secgw/ipsec.h\n+++ b/examples/ipsec-secgw/ipsec.h\n@@ -13,6 +13,8 @@\n #include <rte_flow.h>\n #include <rte_ipsec.h>\n \n+#include \"ipsec-secgw.h\"\n+\n #define RTE_LOGTYPE_IPSEC RTE_LOGTYPE_USER1\n #define RTE_LOGTYPE_IPSEC_ESP RTE_LOGTYPE_USER2\n #define RTE_LOGTYPE_IPSEC_IPIP RTE_LOGTYPE_USER3\n@@ -258,6 +260,15 @@ struct ipsec_traffic {\n \tstruct traffic_type ip6;\n };\n \n+/* Socket ctx */\n+struct socket_ctx socket_ctx[NB_SOCKETS];\n+\n+void\n+ipsec_poll_mode_worker(void);\n+\n+int\n+ipsec_launch_one_lcore(void *args);\n+\n uint16_t\n ipsec_inbound(struct ipsec_ctx *ctx, struct rte_mbuf *pkts[],\n \t\tuint16_t nb_pkts, uint16_t len);\ndiff --git a/examples/ipsec-secgw/ipsec_worker.c b/examples/ipsec-secgw/ipsec_worker.c\nnew file mode 100644\nindex 0000000..876ec68\n--- /dev/null\n+++ b/examples/ipsec-secgw/ipsec_worker.c\n@@ -0,0 +1,240 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2016 Intel Corporation\n+ * Copyright (C) 2020 Marvell International Ltd.\n+ */\n+#include <stdio.h>\n+#include <stdlib.h>\n+#include <string.h>\n+#include <stdint.h>\n+#include <inttypes.h>\n+#include <sys/types.h>\n+#include <sys/queue.h>\n+#include <netinet/in.h>\n+#include <setjmp.h>\n+#include <stdarg.h>\n+#include <ctype.h>\n+#include <stdbool.h>\n+\n+#include <rte_common.h>\n+#include <rte_log.h>\n+#include <rte_memcpy.h>\n+#include <rte_atomic.h>\n+#include <rte_cycles.h>\n+#include <rte_prefetch.h>\n+#include <rte_lcore.h>\n+#include <rte_branch_prediction.h>\n+#include <rte_event_eth_tx_adapter.h>\n+#include <rte_ether.h>\n+#include <rte_ethdev.h>\n+#include <rte_eventdev.h>\n+#include <rte_malloc.h>\n+#include <rte_mbuf.h>\n+\n+#include \"event_helper.h\"\n+#include \"ipsec.h\"\n+#include \"ipsec-secgw.h\"\n+\n+extern volatile bool force_quit;\n+\n+static inline void\n+ipsec_event_pre_forward(struct rte_mbuf *m, unsigned int port_id)\n+{\n+\t/* Save the destination port in the mbuf */\n+\tm->port = port_id;\n+\n+\t/* Save eth queue for Tx */\n+\trte_event_eth_tx_adapter_txq_set(m, 0);\n+}\n+\n+static inline void\n+prepare_out_sessions_tbl(struct sa_ctx *sa_out,\n+\t\tstruct rte_security_session **sess_tbl, uint16_t size)\n+{\n+\tstruct rte_ipsec_session *pri_sess;\n+\tstruct ipsec_sa *sa;\n+\tint i;\n+\n+\tfor (i = 0; i < IPSEC_SA_MAX_ENTRIES; i++) {\n+\n+\t\tsa = &sa_out->sa[i];\n+\t\tif (!sa->spi)\n+\t\t\tcontinue;\n+\n+\t\tpri_sess = ipsec_get_primary_session(sa);\n+\t\tif (pri_sess->type !=\n+\t\t\tRTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL) {\n+\n+\t\t\tRTE_LOG(ERR, IPSEC, \"Invalid session type %d\\n\",\n+\t\t\t\tpri_sess->type);\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\tif (sa->portid >= size) {\n+\t\t\tRTE_LOG(ERR, IPSEC,\n+\t\t\t\t\"Port id >= than table size %d, %d\\n\",\n+\t\t\t\tsa->portid, size);\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\t/* Use only first inline session found for a given port */\n+\t\tif (sess_tbl[sa->portid])\n+\t\t\tcontinue;\n+\t\tsess_tbl[sa->portid] = pri_sess->security.ses;\n+\t}\n+}\n+\n+/*\n+ * Event mode exposes various operating modes depending on the\n+ * capabilities of the event device and the operating mode\n+ * selected.\n+ */\n+\n+/* Workers registered */\n+#define IPSEC_EVENTMODE_WORKERS\t\t1\n+\n+/*\n+ * Event mode worker\n+ * Operating parameters : non-burst - Tx internal port - driver mode\n+ */\n+static void\n+ipsec_wrkr_non_burst_int_port_drv_mode(struct eh_event_link_info *links,\n+\t\tuint8_t nb_links)\n+{\n+\tstruct rte_security_session *sess_tbl[RTE_MAX_ETHPORTS] = { NULL };\n+\tunsigned int nb_rx = 0;\n+\tstruct rte_mbuf *pkt;\n+\tstruct rte_event ev;\n+\tuint32_t lcore_id;\n+\tint32_t socket_id;\n+\tint16_t port_id;\n+\n+\t/* Check if we have links registered for this lcore */\n+\tif (nb_links == 0) {\n+\t\t/* No links registered - exit */\n+\t\treturn;\n+\t}\n+\n+\t/* Get core ID */\n+\tlcore_id = rte_lcore_id();\n+\n+\t/* Get socket ID */\n+\tsocket_id = rte_lcore_to_socket_id(lcore_id);\n+\n+\t/*\n+\t * Prepare security sessions table. In outbound driver mode\n+\t * we always use first session configured for a given port\n+\t */\n+\tprepare_out_sessions_tbl(socket_ctx[socket_id].sa_out, sess_tbl,\n+\t\t\tRTE_MAX_ETHPORTS);\n+\n+\tRTE_LOG(INFO, IPSEC,\n+\t\t\"Launching event mode worker (non-burst - Tx internal port - \"\n+\t\t\"driver mode) on lcore %d\\n\", lcore_id);\n+\n+\t/* We have valid links */\n+\n+\t/* Check if it's single link */\n+\tif (nb_links != 1) {\n+\t\tRTE_LOG(INFO, IPSEC,\n+\t\t\t\"Multiple links not supported. Using first link\\n\");\n+\t}\n+\n+\tRTE_LOG(INFO, IPSEC, \" -- lcoreid=%u event_port_id=%u\\n\", lcore_id,\n+\t\t\tlinks[0].event_port_id);\n+\twhile (!force_quit) {\n+\t\t/* Read packet from event queues */\n+\t\tnb_rx = rte_event_dequeue_burst(links[0].eventdev_id,\n+\t\t\t\tlinks[0].event_port_id,\n+\t\t\t\t&ev,\t/* events */\n+\t\t\t\t1,\t/* nb_events */\n+\t\t\t\t0\t/* timeout_ticks */);\n+\n+\t\tif (nb_rx == 0)\n+\t\t\tcontinue;\n+\n+\t\tpkt = ev.mbuf;\n+\t\tport_id = pkt->port;\n+\n+\t\trte_prefetch0(rte_pktmbuf_mtod(pkt, void *));\n+\n+\t\t/* Process packet */\n+\t\tipsec_event_pre_forward(pkt, port_id);\n+\n+\t\tif (!UNPROTECTED_PORT(port_id)) {\n+\n+\t\t\tif (unlikely(!sess_tbl[port_id])) {\n+\t\t\t\trte_pktmbuf_free(pkt);\n+\t\t\t\tcontinue;\n+\t\t\t}\n+\n+\t\t\t/* Save security session */\n+\t\t\tpkt->udata64 = (uint64_t) sess_tbl[port_id];\n+\n+\t\t\t/* Mark the packet for Tx security offload */\n+\t\t\tpkt->ol_flags |= PKT_TX_SEC_OFFLOAD;\n+\t\t}\n+\n+\t\t/*\n+\t\t * Since tx internal port is available, events can be\n+\t\t * directly enqueued to the adapter and it would be\n+\t\t * internally submitted to the eth device.\n+\t\t */\n+\t\trte_event_eth_tx_adapter_enqueue(links[0].eventdev_id,\n+\t\t\t\tlinks[0].event_port_id,\n+\t\t\t\t&ev,\t/* events */\n+\t\t\t\t1,\t/* nb_events */\n+\t\t\t\t0\t/* flags */);\n+\t}\n+}\n+\n+static uint8_t\n+ipsec_eventmode_populate_wrkr_params(struct eh_app_worker_params *wrkrs)\n+{\n+\tstruct eh_app_worker_params *wrkr;\n+\tuint8_t nb_wrkr_param = 0;\n+\n+\t/* Save workers */\n+\twrkr = wrkrs;\n+\n+\t/* Non-burst - Tx internal port - driver mode */\n+\twrkr->cap.burst = EH_RX_TYPE_NON_BURST;\n+\twrkr->cap.tx_internal_port = EH_TX_TYPE_INTERNAL_PORT;\n+\twrkr->cap.ipsec_mode = EH_IPSEC_MODE_TYPE_DRIVER;\n+\twrkr->worker_thread = ipsec_wrkr_non_burst_int_port_drv_mode;\n+\twrkr++;\n+\n+\treturn nb_wrkr_param;\n+}\n+\n+static void\n+ipsec_eventmode_worker(struct eh_conf *conf)\n+{\n+\tstruct eh_app_worker_params ipsec_wrkr[IPSEC_EVENTMODE_WORKERS] = {\n+\t\t\t\t\t{{{0} }, NULL } };\n+\tuint8_t nb_wrkr_param;\n+\n+\t/* Populate l2fwd_wrkr params */\n+\tnb_wrkr_param = ipsec_eventmode_populate_wrkr_params(ipsec_wrkr);\n+\n+\t/*\n+\t * Launch correct worker after checking\n+\t * the event device's capabilities.\n+\t */\n+\teh_launch_worker(conf, ipsec_wrkr, nb_wrkr_param);\n+}\n+\n+int ipsec_launch_one_lcore(void *args)\n+{\n+\tstruct eh_conf *conf;\n+\n+\tconf = (struct eh_conf *)args;\n+\n+\tif (conf->mode == EH_PKT_TRANSFER_MODE_POLL) {\n+\t\t/* Run in poll mode */\n+\t\tipsec_poll_mode_worker();\n+\t} else if (conf->mode == EH_PKT_TRANSFER_MODE_EVENT) {\n+\t\t/* Run in event mode */\n+\t\tipsec_eventmode_worker(conf);\n+\t}\n+\treturn 0;\n+}\ndiff --git a/examples/ipsec-secgw/meson.build b/examples/ipsec-secgw/meson.build\nindex 20f4064..ab40ca5 100644\n--- a/examples/ipsec-secgw/meson.build\n+++ b/examples/ipsec-secgw/meson.build\n@@ -10,5 +10,5 @@ deps += ['security', 'lpm', 'acl', 'hash', 'ip_frag', 'ipsec', 'eventdev']\n allow_experimental_apis = true\n sources = files(\n \t'esp.c', 'ipsec.c', 'ipsec_process.c', 'ipsec-secgw.c',\n-\t'parser.c', 'rt.c', 'sa.c', 'sp4.c', 'sp6.c', 'event_helper.c'\n+\t'parser.c', 'rt.c', 'sa.c', 'sp4.c', 'sp6.c', 'event_helper.c', 'ipsec_worker.c'\n )\n", "prefixes": [ "v2", "10/12" ] }