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GET /api/patches/64928/?format=api
{ "id": 64928, "url": "http://patches.dpdk.org/api/patches/64928/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1579527918-360-10-git-send-email-anoobj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1579527918-360-10-git-send-email-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1579527918-360-10-git-send-email-anoobj@marvell.com", "date": "2020-01-20T13:45:15", "name": "[v2,09/12] examples/ipsec-secgw: add eventmode to ipsec-secgw", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "01056358c7b34611e46e3f2bef100ecdbb1a1dad", "submitter": { "id": 1205, "url": "http://patches.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1579527918-360-10-git-send-email-anoobj@marvell.com/mbox/", "series": [ { "id": 8219, "url": "http://patches.dpdk.org/api/series/8219/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8219", "date": "2020-01-20T13:45:06", "name": "add eventmode to ipsec-secgw", "version": 2, "mbox": "http://patches.dpdk.org/series/8219/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/64928/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/64928/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 09292A0528;\n\tMon, 20 Jan 2020 14:47:20 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id BD31144C7;\n\tMon, 20 Jan 2020 14:46:35 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id DC45C1BE81\n for <dev@dpdk.org>; Mon, 20 Jan 2020 14:46:33 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 00KDjJ8e023710; Mon, 20 Jan 2020 05:46:33 -0800", "from sc-exch04.marvell.com ([199.233.58.184])\n by mx0b-0016f401.pphosted.com with ESMTP id 2xm2dsx4a0-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 20 Jan 2020 05:46:33 -0800", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH04.marvell.com\n (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 20 Jan\n 2020 05:46:30 -0800", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n (10.93.176.81) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Mon, 20 Jan 2020 05:46:30 -0800", "from ajoseph83.caveonetworks.com (unknown [10.29.45.60])\n by maili.marvell.com (Postfix) with ESMTP id E1A573F703F;\n Mon, 20 Jan 2020 05:46:26 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0818;\n bh=2/ZITXrCguOx/JuUg3AwagOIjdi7QxEchBVCkcjI/cw=;\n b=ESuM9o947iTSDDLkjrwBWijWrS10FXVECtw6HgNqvlg4Wytxd0Yt+pOm8CYNxfezhdYb\n 1ujPOOjqNiwoofPio1RUyRy63xa1Lr/TS2x/ciEy3ha8i3DqoBq5fCt8aRLdY3dJo/2O\n 4RV4vbSkX0O2GD/NjbJQ5UIJ1NIAXLssZhpflIF/1wLHQXyaYP4hTtgMkpO7WGePcS2v\n eT8ESKnPoOGqY7JFFfDidF0c3Xy5xJ0LqtVrYiCQZoCvF/RNwt02yHL/5XrGoioj2cSI\n BwXzKhWToggNf+PQHeTf5qVJFATY1asYCUWCyoY6yIWG28b4ddIA1Vsd9+z4OQuFcjkL 1w==", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Akhil Goyal <akhil.goyal@nxp.com>, Radu Nicolau <radu.nicolau@intel.com>,\n Thomas Monjalon <thomas@monjalon.net>", "CC": "Lukasz Bartosik <lbartosik@marvell.com>, Jerin Jacob <jerinj@marvell.com>,\n Narayana Prasad <pathreya@marvell.com>,\n Ankur Dwivedi <adwivedi@marvell.com>, Anoob Joseph <anoobj@marvell.com>,\n Archana Muniganti <marchana@marvell.com>,\n Tejasree Kondoj <ktejasree@marvell.com>, Vamsi Attunuru\n <vattunuru@marvell.com>,\n Konstantin Ananyev <konstantin.ananyev@intel.com>, <dev@dpdk.org>", "Date": "Mon, 20 Jan 2020 19:15:15 +0530", "Message-ID": "<1579527918-360-10-git-send-email-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1579527918-360-1-git-send-email-anoobj@marvell.com>", "References": "<1575808249-31135-1-git-send-email-anoobj@marvell.com>\n <1579527918-360-1-git-send-email-anoobj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572\n definitions=2020-01-20_02:2020-01-20,\n 2020-01-20 signatures=0", "Subject": "[dpdk-dev] [PATCH v2 09/12] examples/ipsec-secgw: add eventmode to\n\tipsec-secgw", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Lukasz Bartosik <lbartosik@marvell.com>\n\nAdd eventmode support to ipsec-secgw. With the aid of event helper\nconfigure and use the eventmode capabilities.\n\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Lukasz Bartosik <lbartosik@marvell.com>\n---\n examples/ipsec-secgw/event_helper.c | 4 +-\n examples/ipsec-secgw/event_helper.h | 14 ++\n examples/ipsec-secgw/ipsec-secgw.c | 341 +++++++++++++++++++++++++++++++++++-\n examples/ipsec-secgw/ipsec.h | 11 ++\n examples/ipsec-secgw/sa.c | 11 --\n 5 files changed, 365 insertions(+), 16 deletions(-)", "diff": "diff --git a/examples/ipsec-secgw/event_helper.c b/examples/ipsec-secgw/event_helper.c\nindex 9719ab4..54a98c9 100644\n--- a/examples/ipsec-secgw/event_helper.c\n+++ b/examples/ipsec-secgw/event_helper.c\n@@ -966,6 +966,8 @@ eh_find_worker(uint32_t lcore_id, struct eh_conf *conf,\n \telse\n \t\tcurr_conf.cap.burst = EH_RX_TYPE_NON_BURST;\n \n+\tcurr_conf.cap.ipsec_mode = conf->ipsec_mode;\n+\n \t/* Parse the passed list and see if we have matching capabilities */\n \n \t/* Initialize the pointer used to traverse the list */\n@@ -1625,7 +1627,7 @@ eh_launch_worker(struct eh_conf *conf, struct eh_app_worker_params *app_wrkr,\n \t}\n \n \t/* Get eventmode conf */\n-\tem_conf = (struct eventmode_conf *)(conf->mode_params);\n+\tem_conf = conf->mode_params;\n \n \t/* Get core ID */\n \tlcore_id = rte_lcore_id();\ndiff --git a/examples/ipsec-secgw/event_helper.h b/examples/ipsec-secgw/event_helper.h\nindex 15a7bd6..cf5d346 100644\n--- a/examples/ipsec-secgw/event_helper.h\n+++ b/examples/ipsec-secgw/event_helper.h\n@@ -74,6 +74,14 @@ enum eh_tx_types {\n \tEH_TX_TYPE_NO_INTERNAL_PORT\n };\n \n+/**\n+ * Event mode ipsec mode types\n+ */\n+enum eh_ipsec_mode_types {\n+\tEH_IPSEC_MODE_TYPE_APP = 0,\n+\tEH_IPSEC_MODE_TYPE_DRIVER\n+};\n+\n /* Event dev params */\n struct eventdev_params {\n \tuint8_t eventdev_id;\n@@ -183,6 +191,10 @@ struct eh_conf {\n \t\t */\n \tvoid *mode_params;\n \t\t/**< Mode specific parameters */\n+\n+\t\t/** Application specific params */\n+\tenum eh_ipsec_mode_types ipsec_mode;\n+\t\t/**< Mode of ipsec run */\n };\n \n /* Workers registered by the application */\n@@ -194,6 +206,8 @@ struct eh_app_worker_params {\n \t\t\t/**< Specify status of rx type burst */\n \t\t\tuint64_t tx_internal_port : 1;\n \t\t\t/**< Specify whether tx internal port is available */\n+\t\t\tuint64_t ipsec_mode : 1;\n+\t\t\t/**< Specify ipsec processing level */\n \t\t};\n \t\tuint64_t u64;\n \t} cap;\ndiff --git a/examples/ipsec-secgw/ipsec-secgw.c b/examples/ipsec-secgw/ipsec-secgw.c\nindex d5e8fe5..f1cc3fb 100644\n--- a/examples/ipsec-secgw/ipsec-secgw.c\n+++ b/examples/ipsec-secgw/ipsec-secgw.c\n@@ -2,6 +2,7 @@\n * Copyright(c) 2016 Intel Corporation\n */\n \n+#include <stdbool.h>\n #include <stdio.h>\n #include <stdlib.h>\n #include <stdint.h>\n@@ -14,6 +15,7 @@\n #include <sys/queue.h>\n #include <stdarg.h>\n #include <errno.h>\n+#include <signal.h>\n #include <getopt.h>\n \n #include <rte_common.h>\n@@ -41,12 +43,17 @@\n #include <rte_jhash.h>\n #include <rte_cryptodev.h>\n #include <rte_security.h>\n+#include <rte_bitmap.h>\n+#include <rte_eventdev.h>\n #include <rte_ip.h>\n #include <rte_ip_frag.h>\n \n+#include \"event_helper.h\"\n #include \"ipsec.h\"\n #include \"parser.h\"\n \n+volatile bool force_quit;\n+\n #define RTE_LOGTYPE_IPSEC RTE_LOGTYPE_USER1\n \n #define MAX_JUMBO_PKT_LEN 9600\n@@ -133,12 +140,20 @@ struct flow_info flow_info_tbl[RTE_MAX_ETHPORTS];\n #define CMD_LINE_OPT_CONFIG\t\t\"config\"\n #define CMD_LINE_OPT_SINGLE_SA\t\t\"single-sa\"\n #define CMD_LINE_OPT_CRYPTODEV_MASK\t\"cryptodev_mask\"\n+#define CMD_LINE_OPT_TRANSFER_MODE\t\"transfer-mode\"\n+#define CMD_LINE_OPT_SCHEDULE_TYPE\t\"schedule-type\"\n #define CMD_LINE_OPT_RX_OFFLOAD\t\t\"rxoffload\"\n #define CMD_LINE_OPT_TX_OFFLOAD\t\t\"txoffload\"\n #define CMD_LINE_OPT_REASSEMBLE\t\t\"reassemble\"\n #define CMD_LINE_OPT_MTU\t\t\"mtu\"\n #define CMD_LINE_OPT_FRAG_TTL\t\t\"frag-ttl\"\n \n+#define CMD_LINE_ARG_EVENT\t\"event\"\n+#define CMD_LINE_ARG_POLL\t\"poll\"\n+#define CMD_LINE_ARG_ORDERED\t\"ordered\"\n+#define CMD_LINE_ARG_ATOMIC\t\"atomic\"\n+#define CMD_LINE_ARG_PARALLEL\t\"parallel\"\n+\n enum {\n \t/* long options mapped to a short option */\n \n@@ -149,6 +164,8 @@ enum {\n \tCMD_LINE_OPT_CONFIG_NUM,\n \tCMD_LINE_OPT_SINGLE_SA_NUM,\n \tCMD_LINE_OPT_CRYPTODEV_MASK_NUM,\n+\tCMD_LINE_OPT_TRANSFER_MODE_NUM,\n+\tCMD_LINE_OPT_SCHEDULE_TYPE_NUM,\n \tCMD_LINE_OPT_RX_OFFLOAD_NUM,\n \tCMD_LINE_OPT_TX_OFFLOAD_NUM,\n \tCMD_LINE_OPT_REASSEMBLE_NUM,\n@@ -160,6 +177,8 @@ static const struct option lgopts[] = {\n \t{CMD_LINE_OPT_CONFIG, 1, 0, CMD_LINE_OPT_CONFIG_NUM},\n \t{CMD_LINE_OPT_SINGLE_SA, 1, 0, CMD_LINE_OPT_SINGLE_SA_NUM},\n \t{CMD_LINE_OPT_CRYPTODEV_MASK, 1, 0, CMD_LINE_OPT_CRYPTODEV_MASK_NUM},\n+\t{CMD_LINE_OPT_TRANSFER_MODE, 1, 0, CMD_LINE_OPT_TRANSFER_MODE_NUM},\n+\t{CMD_LINE_OPT_SCHEDULE_TYPE, 1, 0, CMD_LINE_OPT_SCHEDULE_TYPE_NUM},\n \t{CMD_LINE_OPT_RX_OFFLOAD, 1, 0, CMD_LINE_OPT_RX_OFFLOAD_NUM},\n \t{CMD_LINE_OPT_TX_OFFLOAD, 1, 0, CMD_LINE_OPT_TX_OFFLOAD_NUM},\n \t{CMD_LINE_OPT_REASSEMBLE, 1, 0, CMD_LINE_OPT_REASSEMBLE_NUM},\n@@ -177,6 +196,7 @@ static int32_t numa_on = 1; /**< NUMA is enabled by default. */\n static uint32_t nb_lcores;\n static uint32_t single_sa;\n static uint32_t single_sa_idx;\n+static uint32_t schedule_type;\n \n /*\n * RX/TX HW offload capabilities to enable/use on ethernet ports.\n@@ -1185,7 +1205,7 @@ main_loop(__attribute__((unused)) void *dummy)\n }\n \n static int32_t\n-check_params(void)\n+check_params(struct eh_conf *eh_conf)\n {\n \tuint8_t lcore;\n \tuint16_t portid;\n@@ -1220,6 +1240,14 @@ check_params(void)\n \t\t\treturn -1;\n \t\t}\n \t}\n+\n+\tif (eh_conf->mode == EH_PKT_TRANSFER_MODE_POLL) {\n+\t\tif (schedule_type) {\n+\t\t\tprintf(\"error: option --schedule-type applies only to event mode\\n\");\n+\t\t\treturn -1;\n+\t\t}\n+\t}\n+\n \treturn 0;\n }\n \n@@ -1277,6 +1305,8 @@ print_usage(const char *prgname)\n \t\t\" --config (port,queue,lcore)[,(port,queue,lcore)]\"\n \t\t\" [--single-sa SAIDX]\"\n \t\t\" [--cryptodev_mask MASK]\"\n+\t\t\" [--transfer-mode MODE]\"\n+\t\t\" [--schedule-type TYPE]\"\n \t\t\" [--\" CMD_LINE_OPT_RX_OFFLOAD \" RX_OFFLOAD_MASK]\"\n \t\t\" [--\" CMD_LINE_OPT_TX_OFFLOAD \" TX_OFFLOAD_MASK]\"\n \t\t\" [--\" CMD_LINE_OPT_REASSEMBLE \" REASSEMBLE_TABLE_SIZE]\"\n@@ -1298,6 +1328,14 @@ print_usage(const char *prgname)\n \t\t\" bypassing the SP\\n\"\n \t\t\" --cryptodev_mask MASK: Hexadecimal bitmask of the crypto\\n\"\n \t\t\" devices to configure\\n\"\n+\t\t\" --transfer-mode MODE\\n\"\n+\t\t\" \\\"poll\\\" : Packet transfer via polling (default)\\n\"\n+\t\t\" \\\"event\\\" : Packet transfer via event device\\n\"\n+\t\t\" --schedule-type TYPE queue schedule type, used only when\\n\"\n+\t\t\" transfer mode is set to event\\n\"\n+\t\t\" \\\"ordered\\\" : Ordered (default)\\n\"\n+\t\t\" \\\"atomic\\\" : Atomic\\n\"\n+\t\t\" \\\"parallel\\\" : Parallel\\n\"\n \t\t\" --\" CMD_LINE_OPT_RX_OFFLOAD\n \t\t\": bitmask of the RX HW offload capabilities to enable/use\\n\"\n \t\t\" (DEV_RX_OFFLOAD_*)\\n\"\n@@ -1432,8 +1470,45 @@ print_app_sa_prm(const struct app_sa_prm *prm)\n \tprintf(\"Frag TTL: %\" PRIu64 \" ns\\n\", frag_ttl_ns);\n }\n \n+static int\n+parse_transfer_mode(struct eh_conf *conf, const char *optarg)\n+{\n+\tif (!strcmp(CMD_LINE_ARG_POLL, optarg))\n+\t\tconf->mode = EH_PKT_TRANSFER_MODE_POLL;\n+\telse if (!strcmp(CMD_LINE_ARG_EVENT, optarg))\n+\t\tconf->mode = EH_PKT_TRANSFER_MODE_EVENT;\n+\telse {\n+\t\tprintf(\"Unsupported packet transfer mode\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+parse_schedule_type(struct eh_conf *conf, const char *optarg)\n+{\n+\tstruct eventmode_conf *em_conf = NULL;\n+\n+\t/* Get eventmode conf */\n+\tem_conf = conf->mode_params;\n+\n+\tif (!strcmp(CMD_LINE_ARG_ORDERED, optarg))\n+\t\tem_conf->ext_params.sched_type = RTE_SCHED_TYPE_ORDERED;\n+\telse if (!strcmp(CMD_LINE_ARG_ATOMIC, optarg))\n+\t\tem_conf->ext_params.sched_type = RTE_SCHED_TYPE_ATOMIC;\n+\telse if (!strcmp(CMD_LINE_ARG_PARALLEL, optarg))\n+\t\tem_conf->ext_params.sched_type = RTE_SCHED_TYPE_PARALLEL;\n+\telse {\n+\t\tprintf(\"Unsupported queue schedule type\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn 0;\n+}\n+\n static int32_t\n-parse_args(int32_t argc, char **argv)\n+parse_args(int32_t argc, char **argv, struct eh_conf *eh_conf)\n {\n \tint opt;\n \tint64_t ret;\n@@ -1522,6 +1597,7 @@ parse_args(int32_t argc, char **argv)\n \t\t\t/* else */\n \t\t\tsingle_sa = 1;\n \t\t\tsingle_sa_idx = ret;\n+\t\t\teh_conf->ipsec_mode = EH_IPSEC_MODE_TYPE_DRIVER;\n \t\t\tprintf(\"Configured with single SA index %u\\n\",\n \t\t\t\t\tsingle_sa_idx);\n \t\t\tbreak;\n@@ -1536,6 +1612,26 @@ parse_args(int32_t argc, char **argv)\n \t\t\t/* else */\n \t\t\tenabled_cryptodev_mask = ret;\n \t\t\tbreak;\n+\n+\t\tcase CMD_LINE_OPT_TRANSFER_MODE_NUM:\n+\t\t\tret = parse_transfer_mode(eh_conf, optarg);\n+\t\t\tif (ret < 0) {\n+\t\t\t\tprintf(\"Invalid packet transfer mode\\n\");\n+\t\t\t\tprint_usage(prgname);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t\tbreak;\n+\n+\t\tcase CMD_LINE_OPT_SCHEDULE_TYPE_NUM:\n+\t\t\tret = parse_schedule_type(eh_conf, optarg);\n+\t\t\tif (ret < 0) {\n+\t\t\t\tprintf(\"Invalid queue schedule type\\n\");\n+\t\t\t\tprint_usage(prgname);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t\tschedule_type = 1;\n+\t\t\tbreak;\n+\n \t\tcase CMD_LINE_OPT_RX_OFFLOAD_NUM:\n \t\t\tret = parse_mask(optarg, &dev_rx_offload);\n \t\t\tif (ret != 0) {\n@@ -2450,16 +2546,176 @@ create_default_ipsec_flow(uint16_t port_id, uint64_t rx_offloads)\n \t\tport_id);\n }\n \n+static struct eh_conf *\n+eh_conf_init(void)\n+{\n+\tstruct eventmode_conf *em_conf = NULL;\n+\tstruct eh_conf *conf = NULL;\n+\tunsigned int eth_core_id;\n+\tuint32_t nb_bytes;\n+\tvoid *mem = NULL;\n+\n+\t/* Allocate memory for config */\n+\tconf = calloc(1, sizeof(struct eh_conf));\n+\tif (conf == NULL) {\n+\t\tprintf(\"Failed to allocate memory for eventmode helper conf\");\n+\t\tgoto err;\n+\t}\n+\n+\t/* Set default conf */\n+\n+\t/* Packet transfer mode: poll */\n+\tconf->mode = EH_PKT_TRANSFER_MODE_POLL;\n+\tconf->ipsec_mode = EH_IPSEC_MODE_TYPE_APP;\n+\n+\t/* Keep all ethernet ports enabled by default */\n+\tconf->eth_portmask = -1;\n+\n+\t/* Allocate memory for event mode params */\n+\tconf->mode_params = calloc(1, sizeof(struct eventmode_conf));\n+\tif (conf->mode_params == NULL) {\n+\t\tprintf(\"Failed to allocate memory for event mode params\");\n+\t\tgoto err;\n+\t}\n+\n+\t/* Get eventmode conf */\n+\tem_conf = conf->mode_params;\n+\n+\t/* Allocate and initialize bitmap for eth cores */\n+\tnb_bytes = rte_bitmap_get_memory_footprint(RTE_MAX_LCORE);\n+\tif (!nb_bytes) {\n+\t\tprintf(\"Failed to get bitmap footprint\");\n+\t\tgoto err;\n+\t}\n+\n+\tmem = rte_zmalloc(\"event-helper-ethcore-bitmap\", nb_bytes,\n+\t\t\t RTE_CACHE_LINE_SIZE);\n+\tif (!mem) {\n+\t\tprintf(\"Failed to allocate memory for eth cores bitmap\\n\");\n+\t\tgoto err;\n+\t}\n+\n+\tem_conf->eth_core_mask = rte_bitmap_init(RTE_MAX_LCORE, mem, nb_bytes);\n+\tif (!em_conf->eth_core_mask) {\n+\t\tprintf(\"Failed to initialize bitmap\");\n+\t\tgoto err;\n+\t}\n+\n+\t/* Schedule type: ordered */\n+\tem_conf->ext_params.sched_type = RTE_SCHED_TYPE_ORDERED;\n+\n+\t/* Set two cores as eth cores for Rx & Tx */\n+\n+\t/* Use first core other than master core as Rx core */\n+\teth_core_id = rte_get_next_lcore(0,\t/* curr core */\n+\t\t\t\t\t 1,\t/* skip master core */\n+\t\t\t\t\t 0\t/* wrap */);\n+\n+\trte_bitmap_set(em_conf->eth_core_mask, eth_core_id);\n+\n+\t/* Use next core as Tx core */\n+\teth_core_id = rte_get_next_lcore(eth_core_id,\t/* curr core */\n+\t\t\t\t\t 1,\t\t/* skip master core */\n+\t\t\t\t\t 0\t\t/* wrap */);\n+\n+\trte_bitmap_set(em_conf->eth_core_mask, eth_core_id);\n+\n+\treturn conf;\n+err:\n+\trte_free(mem);\n+\tfree(em_conf);\n+\tfree(conf);\n+\treturn NULL;\n+}\n+\n+static void\n+eh_conf_uninit(struct eh_conf *conf)\n+{\n+\tstruct eventmode_conf *em_conf = NULL;\n+\n+\t/* Get eventmode conf */\n+\tem_conf = conf->mode_params;\n+\n+\t/* Free evenmode configuration memory */\n+\trte_free(em_conf->eth_core_mask);\n+\tfree(em_conf);\n+\tfree(conf);\n+}\n+\n+static void\n+signal_handler(int signum)\n+{\n+\tif (signum == SIGINT || signum == SIGTERM) {\n+\t\tprintf(\"\\n\\nSignal %d received, preparing to exit...\\n\",\n+\t\t\t\tsignum);\n+\t\tforce_quit = true;\n+\t}\n+}\n+\n+static void\n+inline_sessions_free(struct sa_ctx *sa_ctx)\n+{\n+\tstruct rte_ipsec_session *ips;\n+\tstruct ipsec_sa *sa;\n+\tint32_t i, ret;\n+\n+\tfor (i = 0; i < IPSEC_SA_MAX_ENTRIES; i++) {\n+\n+\t\tsa = &sa_ctx->sa[i];\n+\t\tif (!sa->spi)\n+\t\t\tcontinue;\n+\n+\t\tips = ipsec_get_primary_session(sa);\n+\t\tif (ips->type != RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL &&\n+\t\t ips->type != RTE_SECURITY_ACTION_TYPE_INLINE_CRYPTO)\n+\t\t\tcontinue;\n+\n+\t\tret = rte_security_session_destroy(\n+\t\t\t\trte_eth_dev_get_sec_ctx(sa->portid),\n+\t\t\t\tips->security.ses);\n+\t\tif (ret)\n+\t\t\tRTE_LOG(ERR, IPSEC, \"Failed to destroy security \"\n+\t\t\t\t\t \"session type %d, spi %d\\n\",\n+\t\t\t\t\t ips->type, sa->spi);\n+\t}\n+}\n+\n+static void\n+ev_mode_sess_verify(struct sa_ctx *sa_ctx)\n+{\n+\tstruct rte_ipsec_session *ips;\n+\tstruct ipsec_sa *sa;\n+\tint32_t i;\n+\n+\tif (!sa_ctx)\n+\t\treturn;\n+\n+\tfor (i = 0; i < IPSEC_SA_MAX_ENTRIES; i++) {\n+\n+\t\tsa = &sa_ctx->sa[i];\n+\t\tif (!sa->spi)\n+\t\t\tcontinue;\n+\n+\t\tips = ipsec_get_primary_session(sa);\n+\t\tif (ips->type != RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL)\n+\t\t\trte_exit(EXIT_FAILURE, \"Event mode supports only \"\n+\t\t\t\t \"inline protocol sessions\\n\");\n+\t}\n+\n+}\n+\n int32_t\n main(int32_t argc, char **argv)\n {\n \tint32_t ret;\n \tuint32_t lcore_id;\n+\tuint32_t cdev_id;\n \tuint32_t i;\n \tuint8_t socket_id;\n \tuint16_t portid;\n \tuint64_t req_rx_offloads[RTE_MAX_ETHPORTS];\n \tuint64_t req_tx_offloads[RTE_MAX_ETHPORTS];\n+\tstruct eh_conf *eh_conf = NULL;\n \tsize_t sess_sz;\n \n \t/* init EAL */\n@@ -2469,8 +2725,17 @@ main(int32_t argc, char **argv)\n \targc -= ret;\n \targv += ret;\n \n+\tforce_quit = false;\n+\tsignal(SIGINT, signal_handler);\n+\tsignal(SIGTERM, signal_handler);\n+\n+\t/* initialize event helper configuration */\n+\teh_conf = eh_conf_init();\n+\tif (eh_conf == NULL)\n+\t\trte_exit(EXIT_FAILURE, \"Failed to init event helper config\");\n+\n \t/* parse application arguments (after the EAL ones) */\n-\tret = parse_args(argc, argv);\n+\tret = parse_args(argc, argv, eh_conf);\n \tif (ret < 0)\n \t\trte_exit(EXIT_FAILURE, \"Invalid parameters\\n\");\n \n@@ -2487,7 +2752,7 @@ main(int32_t argc, char **argv)\n \t\trte_exit(EXIT_FAILURE, \"Invalid unprotected portmask 0x%x\\n\",\n \t\t\t\tunprotected_port_mask);\n \n-\tif (check_params() < 0)\n+\tif (check_params(eh_conf) < 0)\n \t\trte_exit(EXIT_FAILURE, \"check_params failed\\n\");\n \n \tret = init_lcore_rx_queues();\n@@ -2529,6 +2794,18 @@ main(int32_t argc, char **argv)\n \n \tcryptodevs_init();\n \n+\t/*\n+\t * Set the enabled port mask in helper config for use by helper\n+\t * sub-system. This will be used while initializing devices using\n+\t * helper sub-system.\n+\t */\n+\teh_conf->eth_portmask = enabled_port_mask;\n+\n+\t/* Initialize eventmode components */\n+\tret = eh_devs_init(eh_conf);\n+\tif (ret < 0)\n+\t\trte_exit(EXIT_FAILURE, \"eh_devs_init failed, err=%d\\n\", ret);\n+\n \t/* start ports */\n \tRTE_ETH_FOREACH_DEV(portid) {\n \t\tif ((enabled_port_mask & (1 << portid)) == 0)\n@@ -2576,6 +2853,18 @@ main(int32_t argc, char **argv)\n \t\t\tsp4_init(&socket_ctx[socket_id], socket_id);\n \t\t\tsp6_init(&socket_ctx[socket_id], socket_id);\n \t\t\trt_init(&socket_ctx[socket_id], socket_id);\n+\n+\t\t\t/*\n+\t\t\t * Event mode currently supports only inline protocol\n+\t\t\t * sessions. If there are other types of sessions\n+\t\t\t * configured then exit with error.\n+\t\t\t */\n+\t\t\tif (eh_conf->mode == EH_PKT_TRANSFER_MODE_EVENT) {\n+\t\t\t\tev_mode_sess_verify(\n+\t\t\t\t\t\tsocket_ctx[socket_id].sa_in);\n+\t\t\t\tev_mode_sess_verify(\n+\t\t\t\t\t\tsocket_ctx[socket_id].sa_out);\n+\t\t\t}\n \t\t}\n \t}\n \n@@ -2583,10 +2872,54 @@ main(int32_t argc, char **argv)\n \n \t/* launch per-lcore init on every lcore */\n \trte_eal_mp_remote_launch(main_loop, NULL, CALL_MASTER);\n+\n \tRTE_LCORE_FOREACH_SLAVE(lcore_id) {\n \t\tif (rte_eal_wait_lcore(lcore_id) < 0)\n \t\t\treturn -1;\n \t}\n \n+\t/* Uninitialize eventmode components */\n+\tret = eh_devs_uninit(eh_conf);\n+\tif (ret < 0)\n+\t\trte_exit(EXIT_FAILURE, \"eh_devs_uninit failed, err=%d\\n\", ret);\n+\n+\t/* Free eventmode configuration memory */\n+\teh_conf_uninit(eh_conf);\n+\n+\t/* Destroy inline inbound and outbound sessions */\n+\tfor (i = 0; i < NB_SOCKETS && i < rte_socket_count(); i++) {\n+\t\tsocket_id = rte_socket_id_by_idx(i);\n+\t\tinline_sessions_free(socket_ctx[socket_id].sa_in);\n+\t\tinline_sessions_free(socket_ctx[socket_id].sa_out);\n+\t}\n+\n+\tfor (cdev_id = 0; cdev_id < rte_cryptodev_count(); cdev_id++) {\n+\t\tprintf(\"Closing cryptodev %d...\", cdev_id);\n+\t\trte_cryptodev_stop(cdev_id);\n+\t\trte_cryptodev_close(cdev_id);\n+\t\tprintf(\" Done\\n\");\n+\t}\n+\n+\tRTE_ETH_FOREACH_DEV(portid) {\n+\t\tif ((enabled_port_mask & (1 << portid)) == 0)\n+\t\t\tcontinue;\n+\n+\t\tprintf(\"Closing port %d...\", portid);\n+\t\tif (flow_info_tbl[portid].rx_def_flow) {\n+\t\t\tstruct rte_flow_error err;\n+\n+\t\t\tret = rte_flow_destroy(portid,\n+\t\t\t\tflow_info_tbl[portid].rx_def_flow, &err);\n+\t\t\tif (ret)\n+\t\t\t\tRTE_LOG(ERR, IPSEC, \"Failed to destroy flow \"\n+\t\t\t\t\t\" for port %u, err msg: %s\\n\", portid,\n+\t\t\t\t\terr.message);\n+\t\t}\n+\t\trte_eth_dev_stop(portid);\n+\t\trte_eth_dev_close(portid);\n+\t\tprintf(\" Done\\n\");\n+\t}\n+\tprintf(\"Bye...\\n\");\n+\n \treturn 0;\n }\ndiff --git a/examples/ipsec-secgw/ipsec.h b/examples/ipsec-secgw/ipsec.h\nindex 28ff07d..0539aec 100644\n--- a/examples/ipsec-secgw/ipsec.h\n+++ b/examples/ipsec-secgw/ipsec.h\n@@ -153,6 +153,17 @@ struct ipsec_sa {\n \tstruct rte_security_session_conf sess_conf;\n } __rte_cache_aligned;\n \n+struct sa_ctx {\n+\tvoid *satbl; /* pointer to array of rte_ipsec_sa objects*/\n+\tstruct ipsec_sa sa[IPSEC_SA_MAX_ENTRIES];\n+\tunion {\n+\t\tstruct {\n+\t\t\tstruct rte_crypto_sym_xform a;\n+\t\t\tstruct rte_crypto_sym_xform b;\n+\t\t};\n+\t} xf[IPSEC_SA_MAX_ENTRIES];\n+};\n+\n struct ipsec_mbuf_metadata {\n \tstruct ipsec_sa *sa;\n \tstruct rte_crypto_op cop;\ndiff --git a/examples/ipsec-secgw/sa.c b/examples/ipsec-secgw/sa.c\nindex c75a5a1..2ec3e17 100644\n--- a/examples/ipsec-secgw/sa.c\n+++ b/examples/ipsec-secgw/sa.c\n@@ -781,17 +781,6 @@ print_one_sa_rule(const struct ipsec_sa *sa, int inbound)\n \tprintf(\"\\n\");\n }\n \n-struct sa_ctx {\n-\tvoid *satbl; /* pointer to array of rte_ipsec_sa objects*/\n-\tstruct ipsec_sa sa[IPSEC_SA_MAX_ENTRIES];\n-\tunion {\n-\t\tstruct {\n-\t\t\tstruct rte_crypto_sym_xform a;\n-\t\t\tstruct rte_crypto_sym_xform b;\n-\t\t};\n-\t} xf[IPSEC_SA_MAX_ENTRIES];\n-};\n-\n static struct sa_ctx *\n sa_create(const char *name, int32_t socket_id)\n {\n", "prefixes": [ "v2", "09/12" ] }