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GET /api/patches/64709/?format=api
{ "id": 64709, "url": "http://patches.dpdk.org/api/patches/64709/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200115143211.6176-5-arkadiuszx.kusztal@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200115143211.6176-5-arkadiuszx.kusztal@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200115143211.6176-5-arkadiuszx.kusztal@intel.com", "date": "2020-01-15T14:32:11", "name": "[v5,4/4] crypto/qat: add minimum enq threshold to qat pmd", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "e60b5cffc6c409fb1f6130788db937cc553a7906", "submitter": { "id": 452, "url": "http://patches.dpdk.org/api/people/452/?format=api", "name": "Arkadiusz Kusztal", "email": "arkadiuszx.kusztal@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200115143211.6176-5-arkadiuszx.kusztal@intel.com/mbox/", "series": [ { "id": 8137, "url": "http://patches.dpdk.org/api/series/8137/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8137", "date": "2020-01-15T14:32:07", "name": "Add dual threading in QAT PMD", "version": 5, "mbox": "http://patches.dpdk.org/series/8137/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/64709/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/64709/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id CC155A0513;\n\tWed, 15 Jan 2020 15:32:59 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id A5AE61C13B;\n\tWed, 15 Jan 2020 15:32:30 +0100 (CET)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by dpdk.org (Postfix) with ESMTP id D3C421C128\n for <dev@dpdk.org>; Wed, 15 Jan 2020 15:32:27 +0100 (CET)", "from fmsmga004.fm.intel.com ([10.253.24.48])\n by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 15 Jan 2020 06:32:27 -0800", "from akusztax-mobl.ger.corp.intel.com ([10.103.102.194])\n by fmsmga004.fm.intel.com with ESMTP; 15 Jan 2020 06:32:24 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.70,322,1574150400\"; d=\"scan'208\";a=\"248428385\"", "From": "Arek Kusztal <arkadiuszx.kusztal@intel.com>", "To": "dev@dpdk.org", "Cc": "akhil.goyal@nxp.com, fiona.trahe@intel.com, declan.doherty@intel.com,\n Arek Kusztal <arkadiuszx.kusztal@intel.com>", "Date": "Wed, 15 Jan 2020 15:32:11 +0100", "Message-Id": "<20200115143211.6176-5-arkadiuszx.kusztal@intel.com>", "X-Mailer": "git-send-email 2.19.1.windows.1", "In-Reply-To": "<20200115143211.6176-1-arkadiuszx.kusztal@intel.com>", "References": "<20200115143211.6176-1-arkadiuszx.kusztal@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v5 4/4] crypto/qat: add minimum enq threshold to\n\tqat pmd", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds minimum enqueue threshold to Intel\nQuickAssist Technology PMD.\nIt is an optimisation, configured by a command line option,\nwhich can be used to reduce MMIO write occurrences.\n\nSigned-off-by: Fiona Trahe <fiona.trahe@intel.com>\nSigned-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>\n---\n doc/guides/cryptodevs/qat.rst | 18 +++++++\n drivers/common/qat/qat_common.c | 3 ++\n drivers/common/qat/qat_common.h | 3 ++\n drivers/common/qat/qat_device.c | 99 ++++++++++++++++++++++++++++++++-----\n drivers/common/qat/qat_device.h | 22 +++++++--\n drivers/common/qat/qat_qp.c | 11 +++++\n drivers/common/qat/qat_qp.h | 3 ++\n drivers/compress/qat/qat_comp_pmd.c | 14 +++++-\n drivers/compress/qat/qat_comp_pmd.h | 4 +-\n drivers/crypto/qat/qat_asym_pmd.c | 14 +++++-\n drivers/crypto/qat/qat_asym_pmd.h | 4 +-\n drivers/crypto/qat/qat_sym_pmd.c | 14 +++++-\n drivers/crypto/qat/qat_sym_pmd.h | 4 +-\n 13 files changed, 191 insertions(+), 22 deletions(-)", "diff": "diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst\nindex 3a4a189..dc79b60 100644\n--- a/doc/guides/cryptodevs/qat.rst\n+++ b/doc/guides/cryptodevs/qat.rst\n@@ -243,6 +243,24 @@ allocated while for GEN1 devices, 12 buffers are allocated, plus 1472 bytes over\n \tlarger than the input size).\n \n \n+Running QAT PMD with minimum threshold for burst size\n+~~~~~~~~~~~~~~~~~~~~~~~~\n+\n+If only a small number or packets can be enqueued. Each enqueue causes an expensive MMIO write.\n+These MMIO write occurrences can be optimised by setting any of the following parameters\n+- qat_sym_enq_threshold\n+- qat_asym_enq_threshold\n+- qat_comp_enq_threshold\n+When any of these parameters is set rte_cryptodev_enqueue_burst function will\n+return 0 (thereby avoiding an MMIO) if the device is congested and number of packets\n+possible to enqueue is smaller.\n+To use this feature the user must set the parameter on process start as a device additional parameter:\n+ .example: '-w 03:01.1,qat_sym_enq_threshold=32,qat_comp_enq_threshold=16'\n+All parameters can be used with the same device regardless of order. Parameters are separated\n+by comma. When the same parameter is used more than once first occurrence of the parameter\n+is used.\n+Maximum threshold that can be set is 32.\n+\n Device and driver naming\n ~~~~~~~~~~~~~~~~~~~~~~~~\n \ndiff --git a/drivers/common/qat/qat_common.c b/drivers/common/qat/qat_common.c\nindex 4753866..5343a14 100644\n--- a/drivers/common/qat/qat_common.c\n+++ b/drivers/common/qat/qat_common.c\n@@ -94,6 +94,9 @@ void qat_stats_get(struct qat_pci_device *dev,\n \t\tstats->dequeued_count += qp[i]->stats.dequeued_count;\n \t\tstats->enqueue_err_count += qp[i]->stats.enqueue_err_count;\n \t\tstats->dequeue_err_count += qp[i]->stats.dequeue_err_count;\n+\t\tstats->threshold_hit_count += qp[i]->stats.threshold_hit_count;\n+\t\tQAT_LOG(DEBUG, \"Threshold was used for qp %d %\"PRIu64\" times\",\n+\t\t\t\ti, stats->threshold_hit_count);\n \t}\n }\n \ndiff --git a/drivers/common/qat/qat_common.h b/drivers/common/qat/qat_common.h\nindex de9a3ba..cf840fe 100644\n--- a/drivers/common/qat/qat_common.h\n+++ b/drivers/common/qat/qat_common.h\n@@ -61,6 +61,9 @@ struct qat_common_stats {\n \t/**< Total error count on operations enqueued */\n \tuint64_t dequeue_err_count;\n \t/**< Total error count on operations dequeued */\n+\tuint64_t threshold_hit_count;\n+\t/**< Total number of times min qp threshold condition was fulfilled */\n+\n };\n \n struct qat_pci_device;\ndiff --git a/drivers/common/qat/qat_device.c b/drivers/common/qat/qat_device.c\nindex 2a1cf3e..2b41d9a 100644\n--- a/drivers/common/qat/qat_device.c\n+++ b/drivers/common/qat/qat_device.c\n@@ -3,6 +3,8 @@\n */\n \n #include <rte_string_fns.h>\n+#include <rte_devargs.h>\n+#include <ctype.h>\n \n #include \"qat_device.h\"\n #include \"adf_transport_access_macros.h\"\n@@ -105,12 +107,71 @@ qat_get_qat_dev_from_pci_dev(struct rte_pci_device *pci_dev)\n \treturn qat_pci_get_named_dev(name);\n }\n \n+static void qat_dev_parse_cmd(const char *str, struct qat_dev_cmd_param\n+\t\t*qat_dev_cmd_param)\n+{\n+\tint i = 0;\n+\tconst char *param;\n+\n+\twhile (1) {\n+\t\tchar value_str[4] = { };\n+\n+\t\tparam = qat_dev_cmd_param[i].name;\n+\t\tif (param == NULL)\n+\t\t\treturn;\n+\t\tlong value = 0;\n+\t\tconst char *arg = strstr(str, param);\n+\t\tconst char *arg2 = NULL;\n+\n+\t\tif (arg) {\n+\t\t\targ2 = arg + strlen(param);\n+\t\t\tif (*arg2 != '=') {\n+\t\t\t\tQAT_LOG(DEBUG, \"parsing error '=' sign\"\n+\t\t\t\t\t\t\" should immediately follow %s\",\n+\t\t\t\t\t\tparam);\n+\t\t\t\targ2 = NULL;\n+\t\t\t} else\n+\t\t\t\targ2++;\n+\t\t} else {\n+\t\t\tQAT_LOG(DEBUG, \"%s not provided\", param);\n+\t\t}\n+\t\tif (arg2) {\n+\t\t\tint iter = 0;\n+\t\t\twhile (iter < 2) {\n+\t\t\t\tif (!isdigit(*(arg2 + iter)))\n+\t\t\t\t\tbreak;\n+\t\t\t\titer++;\n+\t\t\t}\n+\t\t\tif (!iter) {\n+\t\t\t\tQAT_LOG(DEBUG, \"parsing error %s\"\n+\t\t\t\t\t \" no number provided\",\n+\t\t\t\t\t param);\n+\t\t\t} else {\n+\t\t\t\tmemcpy(value_str, arg2, iter);\n+\t\t\t\tvalue = strtol(value_str, NULL, 10);\n+\t\t\t\tif (value > MAX_QP_THRESHOLD_SIZE) {\n+\t\t\t\t\tQAT_LOG(DEBUG, \"Exceeded max size of\"\n+\t\t\t\t\t\t\" threshold, setting to %d\",\n+\t\t\t\t\t\tMAX_QP_THRESHOLD_SIZE);\n+\t\t\t\t\tvalue = MAX_QP_THRESHOLD_SIZE;\n+\t\t\t\t}\n+\t\t\t\tQAT_LOG(DEBUG, \"parsing %s = %ld\",\n+\t\t\t\t\t\tparam, value);\n+\t\t\t}\n+\t\t}\n+\t\tqat_dev_cmd_param[i].val = value;\n+\t\ti++;\n+\t}\n+}\n+\n struct qat_pci_device *\n-qat_pci_device_allocate(struct rte_pci_device *pci_dev)\n+qat_pci_device_allocate(struct rte_pci_device *pci_dev,\n+\t\tstruct qat_dev_cmd_param *qat_dev_cmd_param)\n {\n \tstruct qat_pci_device *qat_dev;\n \tuint8_t qat_dev_id;\n \tchar name[QAT_DEV_NAME_MAX_LEN];\n+\tstruct rte_devargs *devargs = pci_dev->device.devargs;\n \n \trte_pci_device_name(&pci_dev->addr, name, sizeof(name));\n \tsnprintf(name+strlen(name), QAT_DEV_NAME_MAX_LEN-strlen(name), \"_qat\");\n@@ -148,6 +209,9 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev)\n \t\treturn NULL;\n \t}\n \n+\tif (devargs && devargs->drv_str)\n+\t\tqat_dev_parse_cmd(devargs->drv_str, qat_dev_cmd_param);\n+\n \trte_spinlock_init(&qat_dev->arb_csr_lock);\n \n \tqat_dev->attached = QAT_ATTACHED;\n@@ -199,37 +263,45 @@ qat_pci_dev_destroy(struct qat_pci_device *qat_pci_dev,\n static int qat_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \t\tstruct rte_pci_device *pci_dev)\n {\n-\tint ret = 0;\n+\tint sym_ret = 0, asym_ret = 0, comp_ret = 0;\n \tint num_pmds_created = 0;\n \tstruct qat_pci_device *qat_pci_dev;\n+\tstruct qat_dev_cmd_param qat_dev_cmd_param[] = {\n+\t\t\t{ SYM_ENQ_THRESHOLD_NAME, 0 },\n+\t\t\t{ ASYM_ENQ_THRESHOLD_NAME, 0 },\n+\t\t\t{ COMP_ENQ_THRESHOLD_NAME, 0 },\n+\t\t\t{ NULL, 0 },\n+\t};\n \n \tQAT_LOG(DEBUG, \"Found QAT device at %02x:%02x.%x\",\n \t\t\tpci_dev->addr.bus,\n \t\t\tpci_dev->addr.devid,\n \t\t\tpci_dev->addr.function);\n \n-\tqat_pci_dev = qat_pci_device_allocate(pci_dev);\n+\tqat_pci_dev = qat_pci_device_allocate(pci_dev, qat_dev_cmd_param);\n \tif (qat_pci_dev == NULL)\n \t\treturn -ENODEV;\n \n-\tret = qat_sym_dev_create(qat_pci_dev);\n-\tif (ret == 0)\n+\tsym_ret = qat_sym_dev_create(qat_pci_dev, qat_dev_cmd_param);\n+\tif (sym_ret == 0) {\n \t\tnum_pmds_created++;\n+\n+\t}\n \telse\n \t\tQAT_LOG(WARNING,\n \t\t\t\t\"Failed to create QAT SYM PMD on device %s\",\n \t\t\t\tqat_pci_dev->name);\n \n-\tret = qat_comp_dev_create(qat_pci_dev);\n-\tif (ret == 0)\n+\tcomp_ret = qat_comp_dev_create(qat_pci_dev, qat_dev_cmd_param);\n+\tif (comp_ret == 0)\n \t\tnum_pmds_created++;\n \telse\n \t\tQAT_LOG(WARNING,\n \t\t\t\t\"Failed to create QAT COMP PMD on device %s\",\n \t\t\t\tqat_pci_dev->name);\n \n-\tret = qat_asym_dev_create(qat_pci_dev);\n-\tif (ret == 0)\n+\tasym_ret = qat_asym_dev_create(qat_pci_dev, qat_dev_cmd_param);\n+\tif (asym_ret == 0)\n \t\tnum_pmds_created++;\n \telse\n \t\tQAT_LOG(WARNING,\n@@ -264,13 +336,15 @@ static struct rte_pci_driver rte_qat_pmd = {\n };\n \n __rte_weak int\n-qat_sym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused)\n+qat_sym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused,\n+\t\tstruct qat_dev_cmd_param *qat_dev_cmd_param __rte_unused)\n {\n \treturn 0;\n }\n \n __rte_weak int\n-qat_asym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused)\n+qat_asym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused,\n+\t\tstruct qat_dev_cmd_param *qat_dev_cmd_param __rte_unused)\n {\n \treturn 0;\n }\n@@ -288,7 +362,8 @@ qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused)\n }\n \n __rte_weak int\n-qat_comp_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused)\n+qat_comp_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused,\n+\t\tstruct qat_dev_cmd_param *qat_dev_cmd_param __rte_unused)\n {\n \treturn 0;\n }\ndiff --git a/drivers/common/qat/qat_device.h b/drivers/common/qat/qat_device.h\nindex 131375e..09a4c55 100644\n--- a/drivers/common/qat/qat_device.h\n+++ b/drivers/common/qat/qat_device.h\n@@ -16,6 +16,16 @@\n \n #define QAT_DEV_NAME_MAX_LEN\t64\n \n+#define SYM_ENQ_THRESHOLD_NAME \"qat_sym_enq_threshold\"\n+#define ASYM_ENQ_THRESHOLD_NAME \"qat_asym_enq_threshold\"\n+#define COMP_ENQ_THRESHOLD_NAME \"qat_comp_enq_threshold\"\n+#define MAX_QP_THRESHOLD_SIZE\t32\n+\n+struct qat_dev_cmd_param {\n+\tconst char *name;\n+\tuint16_t val;\n+};\n+\n enum qat_comp_num_im_buffers {\n \tQAT_NUM_INTERM_BUFS_GEN1 = 12,\n \tQAT_NUM_INTERM_BUFS_GEN2 = 20,\n@@ -94,7 +104,8 @@ struct qat_gen_hw_data {\n extern struct qat_gen_hw_data qat_gen_config[];\n \n struct qat_pci_device *\n-qat_pci_device_allocate(struct rte_pci_device *pci_dev);\n+qat_pci_device_allocate(struct rte_pci_device *pci_dev,\n+\t\tstruct qat_dev_cmd_param *qat_dev_cmd_param);\n \n int\n qat_pci_device_release(struct rte_pci_device *pci_dev);\n@@ -104,10 +115,12 @@ qat_get_qat_dev_from_pci_dev(struct rte_pci_device *pci_dev);\n \n /* declaration needed for weak functions */\n int\n-qat_sym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused);\n+qat_sym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused,\n+\t\tstruct qat_dev_cmd_param *qat_dev_cmd_param);\n \n int\n-qat_asym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused);\n+qat_asym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused,\n+\t\tstruct qat_dev_cmd_param *qat_dev_cmd_param);\n \n int\n qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused);\n@@ -116,7 +129,8 @@ int\n qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused);\n \n int\n-qat_comp_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused);\n+qat_comp_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused,\n+\t\tstruct qat_dev_cmd_param *qat_dev_cmd_param);\n \n int\n qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused);\ndiff --git a/drivers/common/qat/qat_qp.c b/drivers/common/qat/qat_qp.c\nindex 30cdc61..9958789 100644\n--- a/drivers/common/qat/qat_qp.c\n+++ b/drivers/common/qat/qat_qp.c\n@@ -608,8 +608,19 @@ qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops)\n \t\t\tif (nb_ops_possible == 0)\n \t\t\t\treturn 0;\n \t\t}\n+\t\t/* QAT has plenty of work queued already, so don't waste cycles\n+\t\t * enqueueing, wait til the application has gathered a bigger\n+\t\t * burst or some completed ops have been dequeued\n+\t\t */\n+\t\tif (tmp_qp->min_enq_burst_threshold && inflights >\n+\t\t\t\tQAT_QP_MIN_INFL_THRESHOLD && nb_ops_possible <\n+\t\t\t\ttmp_qp->min_enq_burst_threshold) {\n+\t\t\ttmp_qp->stats.threshold_hit_count++;\n+\t\t\treturn 0;\n+\t\t}\n \t}\n \n+\n \twhile (nb_ops_sent != nb_ops_possible) {\n \t\tret = tmp_qp->build_request(*ops, base_addr + tail,\n \t\t\t\ttmp_qp->op_cookies[tail / queue->msg_size],\ndiff --git a/drivers/common/qat/qat_qp.h b/drivers/common/qat/qat_qp.h\nindex 8b9ab79..0b95ea3 100644\n--- a/drivers/common/qat/qat_qp.h\n+++ b/drivers/common/qat/qat_qp.h\n@@ -12,6 +12,8 @@ struct qat_pci_device;\n #define QAT_CSR_HEAD_WRITE_THRESH 32U\n /* number of requests to accumulate before writing head CSR */\n \n+#define QAT_QP_MIN_INFL_THRESHOLD\t256\n+\n typedef int (*build_request_t)(void *op,\n \t\tuint8_t *req, void *op_cookie,\n \t\tenum qat_device_gen qat_dev_gen);\n@@ -77,6 +79,7 @@ struct qat_qp {\n \tuint32_t enqueued;\n \tuint32_t dequeued __rte_aligned(4);\n \tuint16_t max_inflights;\n+\tuint16_t min_enq_burst_threshold;\n } __rte_cache_aligned;\n \n extern const struct qat_qp_hw_data qat_gen1_qps[][ADF_MAX_QPS_ON_ANY_SERVICE];\ndiff --git a/drivers/compress/qat/qat_comp_pmd.c b/drivers/compress/qat/qat_comp_pmd.c\nindex 05b7dfe..7d4fdf1 100644\n--- a/drivers/compress/qat/qat_comp_pmd.c\n+++ b/drivers/compress/qat/qat_comp_pmd.c\n@@ -139,6 +139,7 @@ qat_comp_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,\n \t\t\t\t\t\t\t\t= *qp_addr;\n \n \tqp = (struct qat_qp *)*qp_addr;\n+\tqp->min_enq_burst_threshold = qat_private->min_enq_burst_threshold;\n \n \tfor (i = 0; i < qp->nb_descriptors; i++) {\n \n@@ -660,8 +661,10 @@ static const struct rte_driver compdev_qat_driver = {\n \t.alias = qat_comp_drv_name\n };\n int\n-qat_comp_dev_create(struct qat_pci_device *qat_pci_dev)\n+qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,\n+\t\tstruct qat_dev_cmd_param *qat_dev_cmd_param)\n {\n+\tint i = 0;\n \tif (qat_pci_dev->qat_dev_gen == QAT_GEN3) {\n \t\tQAT_LOG(ERR, \"Compression PMD not supported on QAT c4xxx\");\n \t\treturn 0;\n@@ -719,6 +722,15 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev)\n \t\tbreak;\n \t}\n \n+\twhile (1) {\n+\t\tif (qat_dev_cmd_param[i].name == NULL)\n+\t\t\tbreak;\n+\t\tif (!strcmp(qat_dev_cmd_param[i].name, COMP_ENQ_THRESHOLD_NAME))\n+\t\t\tcomp_dev->min_enq_burst_threshold =\n+\t\t\t\t\tqat_dev_cmd_param[i].val;\n+\t\ti++;\n+\t}\n+\n \tQAT_LOG(DEBUG,\n \t\t \"Created QAT COMP device %s as compressdev instance %d\",\n \t\t\tname, compressdev->data->dev_id);\ndiff --git a/drivers/compress/qat/qat_comp_pmd.h b/drivers/compress/qat/qat_comp_pmd.h\nindex 6979de1..5c7fa9f 100644\n--- a/drivers/compress/qat/qat_comp_pmd.h\n+++ b/drivers/compress/qat/qat_comp_pmd.h\n@@ -32,10 +32,12 @@ struct qat_comp_dev_private {\n \t/**< The device's pool for qat_comp_xforms */\n \tstruct rte_mempool *streampool;\n \t/**< The device's pool for qat_comp_streams */\n+\tuint16_t min_enq_burst_threshold;\n };\n \n int\n-qat_comp_dev_create(struct qat_pci_device *qat_pci_dev);\n+qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,\n+\t\tstruct qat_dev_cmd_param *qat_dev_cmd_param);\n \n int\n qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev);\ndiff --git a/drivers/crypto/qat/qat_asym_pmd.c b/drivers/crypto/qat/qat_asym_pmd.c\nindex c8a52b6..cdf10de 100644\n--- a/drivers/crypto/qat/qat_asym_pmd.c\n+++ b/drivers/crypto/qat/qat_asym_pmd.c\n@@ -160,6 +160,7 @@ static int qat_asym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n \t\t\t\t\t\t\t= *qp_addr;\n \n \tqp = (struct qat_qp *)*qp_addr;\n+\tqp->min_enq_burst_threshold = qat_private->min_enq_burst_threshold;\n \n \tfor (i = 0; i < qp->nb_descriptors; i++) {\n \t\tint j;\n@@ -235,8 +236,10 @@ static const struct rte_driver cryptodev_qat_asym_driver = {\n };\n \n int\n-qat_asym_dev_create(struct qat_pci_device *qat_pci_dev)\n+qat_asym_dev_create(struct qat_pci_device *qat_pci_dev,\n+\t\tstruct qat_dev_cmd_param *qat_dev_cmd_param)\n {\n+\tint i = 0;\n \tstruct rte_cryptodev_pmd_init_params init_params = {\n \t\t\t.name = \"\",\n \t\t\t.socket_id = qat_pci_dev->pci_dev->device.numa_node,\n@@ -281,6 +284,15 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev)\n \tinternals->asym_dev_id = cryptodev->data->dev_id;\n \tinternals->qat_dev_capabilities = qat_gen1_asym_capabilities;\n \n+\twhile (1) {\n+\t\tif (qat_dev_cmd_param[i].name == NULL)\n+\t\t\tbreak;\n+\t\tif (!strcmp(qat_dev_cmd_param[i].name, ASYM_ENQ_THRESHOLD_NAME))\n+\t\t\tinternals->min_enq_burst_threshold =\n+\t\t\t\t\tqat_dev_cmd_param[i].val;\n+\t\ti++;\n+\t}\n+\n \tQAT_LOG(DEBUG, \"Created QAT ASYM device %s as cryptodev instance %d\",\n \t\t\tcryptodev->data->name, internals->asym_dev_id);\n \treturn 0;\ndiff --git a/drivers/crypto/qat/qat_asym_pmd.h b/drivers/crypto/qat/qat_asym_pmd.h\nindex 895d0f6..0535bc6 100644\n--- a/drivers/crypto/qat/qat_asym_pmd.h\n+++ b/drivers/crypto/qat/qat_asym_pmd.h\n@@ -26,6 +26,7 @@ struct qat_asym_dev_private {\n \t/**< Device instance for this rte_cryptodev */\n \tconst struct rte_cryptodev_capabilities *qat_dev_capabilities;\n \t/* QAT device asymmetric crypto capabilities */\n+\tuint16_t min_enq_burst_threshold;\n };\n \n uint16_t\n@@ -42,7 +43,8 @@ int qat_asym_session_configure(struct rte_cryptodev *dev,\n \t\tstruct rte_mempool *mempool);\n \n int\n-qat_asym_dev_create(struct qat_pci_device *qat_pci_dev);\n+qat_asym_dev_create(struct qat_pci_device *qat_pci_dev,\n+\t\tstruct qat_dev_cmd_param *qat_dev_cmd_param);\n \n int\n qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev);\ndiff --git a/drivers/crypto/qat/qat_sym_pmd.c b/drivers/crypto/qat/qat_sym_pmd.c\nindex 71f21ce..666ede7 100644\n--- a/drivers/crypto/qat/qat_sym_pmd.c\n+++ b/drivers/crypto/qat/qat_sym_pmd.c\n@@ -169,6 +169,7 @@ static int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n \t\t\t\t\t\t\t= *qp_addr;\n \n \tqp = (struct qat_qp *)*qp_addr;\n+\tqp->min_enq_burst_threshold = qat_private->min_enq_burst_threshold;\n \n \tfor (i = 0; i < qp->nb_descriptors; i++) {\n \n@@ -237,8 +238,10 @@ static const struct rte_driver cryptodev_qat_sym_driver = {\n };\n \n int\n-qat_sym_dev_create(struct qat_pci_device *qat_pci_dev)\n+qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,\n+\t\tstruct qat_dev_cmd_param *qat_dev_cmd_param __rte_unused)\n {\n+\tint i = 0;\n \tstruct rte_cryptodev_pmd_init_params init_params = {\n \t\t\t.name = \"\",\n \t\t\t.socket_id = qat_pci_dev->pci_dev->device.numa_node,\n@@ -302,6 +305,15 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev)\n \t\tbreak;\n \t}\n \n+\twhile (1) {\n+\t\tif (qat_dev_cmd_param[i].name == NULL)\n+\t\t\tbreak;\n+\t\tif (!strcmp(qat_dev_cmd_param[i].name, SYM_ENQ_THRESHOLD_NAME))\n+\t\t\tinternals->min_enq_burst_threshold =\n+\t\t\t\t\tqat_dev_cmd_param[i].val;\n+\t\ti++;\n+\t}\n+\n \tQAT_LOG(DEBUG, \"Created QAT SYM device %s as cryptodev instance %d\",\n \t\t\tcryptodev->data->name, internals->sym_dev_id);\n \treturn 0;\ndiff --git a/drivers/crypto/qat/qat_sym_pmd.h b/drivers/crypto/qat/qat_sym_pmd.h\nindex 7ddaf45..a32c25a 100644\n--- a/drivers/crypto/qat/qat_sym_pmd.h\n+++ b/drivers/crypto/qat/qat_sym_pmd.h\n@@ -28,10 +28,12 @@ struct qat_sym_dev_private {\n \t/**< Device instance for this rte_cryptodev */\n \tconst struct rte_cryptodev_capabilities *qat_dev_capabilities;\n \t/* QAT device symmetric crypto capabilities */\n+\tuint16_t min_enq_burst_threshold;\n };\n \n int\n-qat_sym_dev_create(struct qat_pci_device *qat_pci_dev);\n+qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,\n+\t\tstruct qat_dev_cmd_param *qat_dev_cmd_param);\n \n int\n qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev);\n", "prefixes": [ "v5", "4/4" ] }