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GET /api/patches/64630/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 64630,
    "url": "http://patches.dpdk.org/api/patches/64630/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1578993305-15165-5-git-send-email-viacheslavo@mellanox.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1578993305-15165-5-git-send-email-viacheslavo@mellanox.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1578993305-15165-5-git-send-email-viacheslavo@mellanox.com",
    "date": "2020-01-14T09:15:05",
    "name": "[v3,4/4] net/mlx5: allow use allocated mbuf with external buffer",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "7b15e5325263235ede0b9d40615b981533d68125",
    "submitter": {
        "id": 1102,
        "url": "http://patches.dpdk.org/api/people/1102/?format=api",
        "name": "Slava Ovsiienko",
        "email": "viacheslavo@mellanox.com"
    },
    "delegate": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1578993305-15165-5-git-send-email-viacheslavo@mellanox.com/mbox/",
    "series": [
        {
            "id": 8105,
            "url": "http://patches.dpdk.org/api/series/8105/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8105",
            "date": "2020-01-14T09:15:01",
            "name": "mbuf: detach mbuf with pinned external buffer",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/8105/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/64630/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/64630/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 85B46A04FD;\n\tTue, 14 Jan 2020 10:15:49 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 06DA91C2B3;\n\tTue, 14 Jan 2020 10:15:24 +0100 (CET)",
            "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 05F6C1C2A3\n for <dev@dpdk.org>; Tue, 14 Jan 2020 10:15:19 +0100 (CET)",
            "from Internal Mail-Server by MTLPINE1 (envelope-from\n viacheslavo@mellanox.com)\n with ESMTPS (AES256-SHA encrypted); 14 Jan 2020 11:15:18 +0200",
            "from pegasus11.mtr.labs.mlnx (pegasus11.mtr.labs.mlnx\n [10.210.16.104])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 00E9FHKq027577;\n Tue, 14 Jan 2020 11:15:17 +0200",
            "from pegasus11.mtr.labs.mlnx (localhost [127.0.0.1])\n by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id 00E9FHYp015231;\n Tue, 14 Jan 2020 09:15:17 GMT",
            "(from viacheslavo@localhost)\n by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id 00E9FHij015230;\n Tue, 14 Jan 2020 09:15:17 GMT"
        ],
        "X-Authentication-Warning": "pegasus11.mtr.labs.mlnx: viacheslavo set sender to\n viacheslavo@mellanox.com using -f",
        "From": "Viacheslav Ovsiienko <viacheslavo@mellanox.com>",
        "To": "dev@dpdk.org",
        "Cc": "matan@mellanox.com, rasland@mellanox.com, orika@mellanox.com,\n shahafs@mellanox.com, olivier.matz@6wind.com, stephen@networkplumber.org",
        "Date": "Tue, 14 Jan 2020 09:15:05 +0000",
        "Message-Id": "<1578993305-15165-5-git-send-email-viacheslavo@mellanox.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1578993305-15165-1-git-send-email-viacheslavo@mellanox.com>",
        "References": "<20191118094938.192850-1-shahafs@mellanox.com>\n <1578993305-15165-1-git-send-email-viacheslavo@mellanox.com>",
        "Subject": "[dpdk-dev] [PATCH v3 4/4] net/mlx5: allow use allocated mbuf with\n\texternal buffer",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "In the Rx datapath the flags in the newly allocated mbufs\nare all explicitly cleared but the EXT_ATTACHED_MBUF must be\npreserved. It would allow to use mbuf pools with pre-attached\nexternal data buffers.\n\nThe vectorized rx_burst routines are updated in order to\ninherit the EXT_ATTACHED_MBUF from mbuf pool private\nRTE_PKTMBUF_POOL_F_PINNED_EXT_BUF flag.\n\nSigned-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\n---\n drivers/net/mlx5/mlx5_rxq.c              |  7 ++++++-\n drivers/net/mlx5/mlx5_rxtx.c             |  2 +-\n drivers/net/mlx5/mlx5_rxtx.h             |  2 +-\n drivers/net/mlx5/mlx5_rxtx_vec.h         | 14 ++++----------\n drivers/net/mlx5/mlx5_rxtx_vec_altivec.h |  5 ++---\n drivers/net/mlx5/mlx5_rxtx_vec_neon.h    | 29 +++++++++++++++--------------\n drivers/net/mlx5/mlx5_rxtx_vec_sse.h     |  2 +-\n 7 files changed, 30 insertions(+), 31 deletions(-)",
    "diff": "diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex ca25e32..c87ce15 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -225,6 +225,9 @@\n \tif (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {\n \t\tstruct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;\n \t\tstruct rte_mbuf *mbuf_init = &rxq->fake_mbuf;\n+\t\tstruct rte_pktmbuf_pool_private *priv =\n+\t\t\t(struct rte_pktmbuf_pool_private *)\n+\t\t\t\trte_mempool_get_priv(rxq_ctrl->rxq.mp);\n \t\tint j;\n \n \t\t/* Initialize default rearm_data for vPMD. */\n@@ -232,13 +235,15 @@\n \t\trte_mbuf_refcnt_set(mbuf_init, 1);\n \t\tmbuf_init->nb_segs = 1;\n \t\tmbuf_init->port = rxq->port_id;\n+\t\tif (priv->flags & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF)\n+\t\t\tmbuf_init->ol_flags = EXT_ATTACHED_MBUF;\n \t\t/*\n \t\t * prevent compiler reordering:\n \t\t * rearm_data covers previous fields.\n \t\t */\n \t\trte_compiler_barrier();\n \t\trxq->mbuf_initializer =\n-\t\t\t*(uint64_t *)&mbuf_init->rearm_data;\n+\t\t\t*(rte_xmm_t *)&mbuf_init->rearm_data;\n \t\t/* Padding with a fake mbuf for vectorized Rx. */\n \t\tfor (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)\n \t\t\t(*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c\nindex b11c5eb..fdc7529 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.c\n+++ b/drivers/net/mlx5/mlx5_rxtx.c\n@@ -1337,7 +1337,7 @@ enum mlx5_txcmp_code {\n \t\t\t}\n \t\t\tpkt = seg;\n \t\t\tassert(len >= (rxq->crc_present << 2));\n-\t\t\tpkt->ol_flags = 0;\n+\t\t\tpkt->ol_flags &= EXT_ATTACHED_MBUF;\n \t\t\t/* If compressed, take hash result from mini-CQE. */\n \t\t\trss_hash_res = rte_be_to_cpu_32(mcqe == NULL ?\n \t\t\t\t\t\t\tcqe->rx_hash_res :\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex e362b4a..24fa038 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -144,7 +144,7 @@ struct mlx5_rxq_data {\n \tstruct mlx5_mprq_buf *mprq_repl; /* Stashed mbuf for replenish. */\n \tuint16_t idx; /* Queue index. */\n \tstruct mlx5_rxq_stats stats;\n-\tuint64_t mbuf_initializer; /* Default rearm_data for vectorized Rx. */\n+\trte_xmm_t mbuf_initializer; /* Default rearm/flags for vectorized Rx. */\n \tstruct rte_mbuf fake_mbuf; /* elts padding for vectorized Rx. */\n \tvoid *cq_uar; /* CQ user access region. */\n \tuint32_t cqn; /* CQ number. */\ndiff --git a/drivers/net/mlx5/mlx5_rxtx_vec.h b/drivers/net/mlx5/mlx5_rxtx_vec.h\nindex 85e0bd5..d8c07f2 100644\n--- a/drivers/net/mlx5/mlx5_rxtx_vec.h\n+++ b/drivers/net/mlx5/mlx5_rxtx_vec.h\n@@ -97,18 +97,12 @@\n \t\tvoid *buf_addr;\n \n \t\t/*\n-\t\t * Load the virtual address for Rx WQE. non-x86 processors\n-\t\t * (mostly RISC such as ARM and Power) are more vulnerable to\n-\t\t * load stall. For x86, reducing the number of instructions\n-\t\t * seems to matter most.\n+\t\t * In order to support the mbufs with external attached\n+\t\t * data buffer we should use the buf_addr pointer instead of\n+\t\t * rte_mbuf_buf_addr(). It touches the mbuf itself and may\n+\t\t * impact the performance.\n \t\t */\n-#ifdef RTE_ARCH_X86_64\n \t\tbuf_addr = elts[i]->buf_addr;\n-\t\tassert(buf_addr == rte_mbuf_buf_addr(elts[i], rxq->mp));\n-#else\n-\t\tbuf_addr = rte_mbuf_buf_addr(elts[i], rxq->mp);\n-\t\tassert(buf_addr == elts[i]->buf_addr);\n-#endif\n \t\twq[i].addr = rte_cpu_to_be_64((uintptr_t)buf_addr +\n \t\t\t\t\t      RTE_PKTMBUF_HEADROOM);\n \t\t/* If there's only one MR, no need to replace LKey in WQE. */\ndiff --git a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h\nindex 8e79883..9e5c6ee 100644\n--- a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h\n+++ b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h\n@@ -344,9 +344,8 @@\n \t\tPKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_GOOD |\n \t\tPKT_RX_VLAN | PKT_RX_VLAN_STRIPPED};\n \tconst vector unsigned char mbuf_init =\n-\t\t(vector unsigned char)(vector unsigned long){\n-\t\t*(__attribute__((__aligned__(8))) unsigned long *)\n-\t\t&rxq->mbuf_initializer, 0LL};\n+\t\t(vector unsigned char)vec_vsx_ld\n+\t\t\t(0, (vector unsigned char *)&rxq->mbuf_initializer);\n \tconst vector unsigned short rearm_sel_mask =\n \t\t(vector unsigned short){0, 0, 0, 0, 0xffff, 0xffff, 0, 0};\n \tvector unsigned char rearm0, rearm1, rearm2, rearm3;\ndiff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h\nindex 86785c7..332e9ac 100644\n--- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h\n+++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h\n@@ -264,8 +264,8 @@\n \tconst uint32x4_t cv_mask =\n \t\tvdupq_n_u32(PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_GOOD |\n \t\t\t    PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED);\n-\tconst uint64x1_t mbuf_init = vld1_u64(&rxq->mbuf_initializer);\n-\tconst uint64x1_t r32_mask = vcreate_u64(0xffffffff);\n+\tconst uint64x2_t mbuf_init = vld1q_u64\n+\t\t\t\t((const uint64_t *)&rxq->mbuf_initializer);\n \tuint64x2_t rearm0, rearm1, rearm2, rearm3;\n \tuint8_t pt_idx0, pt_idx1, pt_idx2, pt_idx3;\n \n@@ -326,18 +326,19 @@\n \t/* Merge to ol_flags. */\n \tol_flags = vorrq_u32(ol_flags, cv_flags);\n \t/* Merge mbuf_init and ol_flags, and store. */\n-\trearm0 = vcombine_u64(mbuf_init,\n-\t\t\t      vshr_n_u64(vget_high_u64(vreinterpretq_u64_u32(\n-\t\t\t\t\t\t       ol_flags)), 32));\n-\trearm1 = vcombine_u64(mbuf_init,\n-\t\t\t      vand_u64(vget_high_u64(vreinterpretq_u64_u32(\n-\t\t\t\t\t\t     ol_flags)), r32_mask));\n-\trearm2 = vcombine_u64(mbuf_init,\n-\t\t\t      vshr_n_u64(vget_low_u64(vreinterpretq_u64_u32(\n-\t\t\t\t\t\t      ol_flags)), 32));\n-\trearm3 = vcombine_u64(mbuf_init,\n-\t\t\t      vand_u64(vget_low_u64(vreinterpretq_u64_u32(\n-\t\t\t\t\t\t    ol_flags)), r32_mask));\n+\trearm0 = vreinterpretq_u64_u32(vsetq_lane_u32\n+\t\t\t\t\t(vgetq_lane_u32(ol_flags, 3),\n+\t\t\t\t\t vreinterpretq_u32_u64(mbuf_init), 2));\n+\trearm1 = vreinterpretq_u64_u32(vsetq_lane_u32\n+\t\t\t\t\t(vgetq_lane_u32(ol_flags, 2),\n+\t\t\t\t\t vreinterpretq_u32_u64(mbuf_init), 2));\n+\trearm2 = vreinterpretq_u64_u32(vsetq_lane_u32\n+\t\t\t\t\t(vgetq_lane_u32(ol_flags, 1),\n+\t\t\t\t\t vreinterpretq_u32_u64(mbuf_init), 2));\n+\trearm3 = vreinterpretq_u64_u32(vsetq_lane_u32\n+\t\t\t\t\t(vgetq_lane_u32(ol_flags, 0),\n+\t\t\t\t\t vreinterpretq_u32_u64(mbuf_init), 2));\n+\n \tvst1q_u64((void *)&pkts[0]->rearm_data, rearm0);\n \tvst1q_u64((void *)&pkts[1]->rearm_data, rearm1);\n \tvst1q_u64((void *)&pkts[2]->rearm_data, rearm2);\ndiff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\nindex 35b7761..07d40d5 100644\n--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\n+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\n@@ -259,7 +259,7 @@\n \t\t\t      PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_GOOD |\n \t\t\t      PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED);\n \tconst __m128i mbuf_init =\n-\t\t_mm_loadl_epi64((__m128i *)&rxq->mbuf_initializer);\n+\t\t_mm_load_si128((__m128i *)&rxq->mbuf_initializer);\n \t__m128i rearm0, rearm1, rearm2, rearm3;\n \tuint8_t pt_idx0, pt_idx1, pt_idx2, pt_idx3;\n \n",
    "prefixes": [
        "v3",
        "4/4"
    ]
}