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GET /api/patches/64483/?format=api
{ "id": 64483, "url": "http://patches.dpdk.org/api/patches/64483/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200113023949.26718-20-xiaolong.ye@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200113023949.26718-20-xiaolong.ye@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200113023949.26718-20-xiaolong.ye@intel.com", "date": "2020-01-13T02:39:31", "name": "[v4,19/36] net/i40e/base: extend PHY access AQ command", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "526f9ca2cb0f7aac5fcb8b89c241dca0f2823091", "submitter": { "id": 1120, "url": "http://patches.dpdk.org/api/people/1120/?format=api", "name": "Xiaolong Ye", "email": "xiaolong.ye@intel.com" }, "delegate": { "id": 31221, "url": "http://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200113023949.26718-20-xiaolong.ye@intel.com/mbox/", "series": [ { "id": 8064, "url": "http://patches.dpdk.org/api/series/8064/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8064", "date": "2020-01-13T02:39:12", "name": "update for i40e base code", "version": 4, "mbox": "http://patches.dpdk.org/series/8064/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/64483/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/64483/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 913E3A04F0;\n\tMon, 13 Jan 2020 03:49:55 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B9B7B1D5FA;\n\tMon, 13 Jan 2020 03:47:52 +0100 (CET)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by dpdk.org (Postfix) with ESMTP id 776281D5AF\n for <dev@dpdk.org>; Mon, 13 Jan 2020 03:47:26 +0100 (CET)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 12 Jan 2020 18:47:26 -0800", "from dpdk_yexl_af_xdp.sh.intel.com ([10.67.119.206])\n by FMSMGA003.fm.intel.com with ESMTP; 12 Jan 2020 18:47:24 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.69,427,1571727600\"; d=\"scan'208\";a=\"272916372\"", "From": "Xiaolong Ye <xiaolong.ye@intel.com>", "To": "Beilei Xing <beilei.xing@intel.com>,\n\tQi Zhang <qi.z.zhang@intel.com>", "Cc": "dev@dpdk.org, Xiaolong Ye <xiaolong.ye@intel.com>,\n Piotr Azarewicz <piotr.azarewicz@intel.com>", "Date": "Mon, 13 Jan 2020 10:39:31 +0800", "Message-Id": "<20200113023949.26718-20-xiaolong.ye@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200113023949.26718-1-xiaolong.ye@intel.com>", "References": "<20191202074935.97629-1-xiaolong.ye@intel.com>\n <20200113023949.26718-1-xiaolong.ye@intel.com>", "Subject": "[dpdk-dev] [PATCH v4 19/36] net/i40e/base: extend PHY access AQ\n\tcommand", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Currently FW use MDIO I/F number corresponded with current PF for PHY\naccess. This code allow to specify used MDIO I/F number.\n\nSigned-off-by: Piotr Azarewicz <piotr.azarewicz@intel.com>\nSigned-off-by: Xiaolong Ye <xiaolong.ye@intel.com>\n---\n drivers/net/i40e/base/i40e_adminq.c | 57 +++++++++++++++++++++++\n drivers/net/i40e/base/i40e_adminq_cmd.h | 6 ++-\n drivers/net/i40e/base/i40e_common.c | 62 ++++++++++++++++++++-----\n drivers/net/i40e/base/i40e_prototype.h | 27 +++++++----\n drivers/net/i40e/base/i40e_type.h | 1 +\n 5 files changed, 132 insertions(+), 21 deletions(-)", "diff": "diff --git a/drivers/net/i40e/base/i40e_adminq.c b/drivers/net/i40e/base/i40e_adminq.c\nindex 52bea842f..96e170e12 100644\n--- a/drivers/net/i40e/base/i40e_adminq.c\n+++ b/drivers/net/i40e/base/i40e_adminq.c\n@@ -569,6 +569,57 @@ STATIC void i40e_resume_aq(struct i40e_hw *hw)\n }\n #endif /* PF_DRIVER */\n \n+/**\n+ * i40e_set_hw_flags - set HW flags\n+ * @hw: pointer to the hardware structure\n+ **/\n+STATIC void i40e_set_hw_flags(struct i40e_hw *hw)\n+{\n+\tstruct i40e_adminq_info *aq = &hw->aq;\n+\n+\thw->flags = 0;\n+\n+\tswitch (hw->mac.type) {\n+\tcase I40E_MAC_XL710:\n+\t\tif (aq->api_maj_ver > 1 ||\n+\t\t (aq->api_maj_ver == 1 &&\n+\t\t aq->api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710)) {\n+\t\t\thw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE;\n+\t\t\thw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE;\n+\t\t\t/* The ability to RX (not drop) 802.1ad frames */\n+\t\t\thw->flags |= I40E_HW_FLAG_802_1AD_CAPABLE;\n+\t\t}\n+\t\tbreak;\n+\tcase I40E_MAC_X722:\n+\t\thw->flags |= I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE |\n+\t\t\t I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK;\n+\n+\t\tif (aq->api_maj_ver > 1 ||\n+\t\t (aq->api_maj_ver == 1 &&\n+\t\t aq->api_min_ver >= I40E_MINOR_VER_FW_LLDP_STOPPABLE_X722))\n+\t\t\thw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE;\n+\t\t/* fall through */\n+\tdefault:\n+\t\tbreak;\n+\t}\n+\n+\t/* Newer versions of firmware require lock when reading the NVM */\n+\tif (aq->api_maj_ver > 1 ||\n+\t (aq->api_maj_ver == 1 &&\n+\t aq->api_min_ver >= 5))\n+\t\thw->flags |= I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK;\n+\n+\tif (aq->api_maj_ver > 1 ||\n+\t (aq->api_maj_ver == 1 &&\n+\t aq->api_min_ver >= 8))\n+\t\thw->flags |= I40E_HW_FLAG_FW_LLDP_PERSISTENT;\n+\n+\tif (aq->api_maj_ver > 1 ||\n+\t (aq->api_maj_ver == 1 &&\n+\t aq->api_min_ver >= 9))\n+\t\thw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_EXTENDED;\n+}\n+\n /**\n * i40e_init_adminq - main initialization routine for Admin Queue\n * @hw: pointer to the hardware structure\n@@ -636,6 +687,12 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw)\n \tif (ret_code != I40E_SUCCESS)\n \t\tgoto init_adminq_free_arq;\n \n+\t/*\n+\t * Some features were introduced in different FW API version\n+\t * for different MAC type.\n+\t */\n+\ti40e_set_hw_flags(hw);\n+\n \t/* get the NVM version info */\n \ti40e_read_nvm_word(hw, I40E_SR_NVM_DEV_STARTER_VERSION,\n \t\t\t &hw->nvm.version);\ndiff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h\nindex d718c7326..7181e0f58 100644\n--- a/drivers/net/i40e/base/i40e_adminq_cmd.h\n+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h\n@@ -2310,7 +2310,11 @@ struct i40e_aqc_phy_register_access {\n #define I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE\t2\n \tu8\tdev_addres;\n \tu8\tcmd_flags;\n-#define I40E_AQ_PHY_REG_ACCESS_DONT_CHANGE_QSFP_PAGE\t1\n+#define I40E_AQ_PHY_REG_ACCESS_DONT_CHANGE_QSFP_PAGE\t0x01\n+#define I40E_AQ_PHY_REG_ACCESS_SET_MDIO_IF_NUMBER\t0x02\n+#define I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_SHIFT\t2\n+#define I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_MASK\t(0x3 << \\\n+\t\tI40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_SHIFT)\n \tu8\treserved1;\n \t__le32\treg_address;\n \t__le32\treg_value;\ndiff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c\nindex 9d76b6824..ee081d6ad 100644\n--- a/drivers/net/i40e/base/i40e_common.c\n+++ b/drivers/net/i40e/base/i40e_common.c\n@@ -7239,23 +7239,52 @@ void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val)\n \t\twr32(hw, reg_addr, reg_val);\n }\n \n-#ifdef PF_DRIVER\n /**\n- * i40e_aq_set_phy_register\n+ * i40e_mdio_if_number_selection - MDIO I/F number selection\n+ * @hw: pointer to the hw struct\n+ * @set_mdio: use MDIO I/F number specified by mdio_num\n+ * @mdio_num: MDIO I/F number\n+ * @cmd: pointer to PHY Register command structure\n+ **/\n+static void\n+i40e_mdio_if_number_selection(struct i40e_hw *hw, bool set_mdio, u8 mdio_num,\n+\t\t\t struct i40e_aqc_phy_register_access *cmd)\n+{\n+\tif (set_mdio && cmd->phy_interface == I40E_AQ_PHY_REG_ACCESS_EXTERNAL) {\n+\t\tif (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_EXTENDED)\n+\t\t\tcmd->cmd_flags |=\n+\t\t\t\tI40E_AQ_PHY_REG_ACCESS_SET_MDIO_IF_NUMBER |\n+\t\t\t\t((mdio_num <<\n+\t\t\t\tI40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_SHIFT) &\n+\t\t\t\tI40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_MASK);\n+\t\telse\n+\t\t\ti40e_debug(hw, I40E_DEBUG_PHY,\n+\t\t\t\t \"MDIO I/F number selection not supported by current FW version.\\n\");\n+\t}\n+}\n+\n+/**\n+ * i40e_aq_set_phy_register_ext\n * @hw: pointer to the hw struct\n * @phy_select: select which phy should be accessed\n * @dev_addr: PHY device address\n * @page_change: enable auto page change\n+ * @set_mdio: use MDIO I/F number specified by mdio_num\n+ * @mdio_num: MDIO I/F number\n * @reg_addr: PHY register address\n * @reg_val: new register value\n * @cmd_details: pointer to command details structure or NULL\n *\n * Write the external PHY register.\n+ * NOTE: In common cases MDIO I/F number should not be changed, thats why you\n+ * may use simple wrapper i40e_aq_set_phy_register.\n **/\n-enum i40e_status_code i40e_aq_set_phy_register(struct i40e_hw *hw,\n-\t\t\t\tu8 phy_select, u8 dev_addr, bool page_change,\n-\t\t\t\tu32 reg_addr, u32 reg_val,\n-\t\t\t\tstruct i40e_asq_cmd_details *cmd_details)\n+enum i40e_status_code\n+i40e_aq_set_phy_register_ext(struct i40e_hw *hw,\n+\t\t\t u8 phy_select, u8 dev_addr, bool page_change,\n+\t\t\t bool set_mdio, u8 mdio_num,\n+\t\t\t u32 reg_addr, u32 reg_val,\n+\t\t\t struct i40e_asq_cmd_details *cmd_details)\n {\n \tstruct i40e_aq_desc desc;\n \tstruct i40e_aqc_phy_register_access *cmd =\n@@ -7273,27 +7302,35 @@ enum i40e_status_code i40e_aq_set_phy_register(struct i40e_hw *hw,\n \tif (!page_change)\n \t\tcmd->cmd_flags = I40E_AQ_PHY_REG_ACCESS_DONT_CHANGE_QSFP_PAGE;\n \n+\ti40e_mdio_if_number_selection(hw, set_mdio, mdio_num, cmd);\n+\n \tstatus = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);\n \n \treturn status;\n }\n \n /**\n- * i40e_aq_get_phy_register\n+ * i40e_aq_get_phy_register_ext\n * @hw: pointer to the hw struct\n * @phy_select: select which phy should be accessed\n * @dev_addr: PHY device address\n * @page_change: enable auto page change\n+ * @set_mdio: use MDIO I/F number specified by mdio_num\n+ * @mdio_num: MDIO I/F number\n * @reg_addr: PHY register address\n * @reg_val: read register value\n * @cmd_details: pointer to command details structure or NULL\n *\n * Read the external PHY register.\n+ * NOTE: In common cases MDIO I/F number should not be changed, thats why you\n+ * may use simple wrapper i40e_aq_get_phy_register.\n **/\n-enum i40e_status_code i40e_aq_get_phy_register(struct i40e_hw *hw,\n-\t\t\t\tu8 phy_select, u8 dev_addr, bool page_change,\n-\t\t\t\tu32 reg_addr, u32 *reg_val,\n-\t\t\t\tstruct i40e_asq_cmd_details *cmd_details)\n+enum i40e_status_code\n+i40e_aq_get_phy_register_ext(struct i40e_hw *hw,\n+\t\t\t u8 phy_select, u8 dev_addr, bool page_change,\n+\t\t\t bool set_mdio, u8 mdio_num,\n+\t\t\t u32 reg_addr, u32 *reg_val,\n+\t\t\t struct i40e_asq_cmd_details *cmd_details)\n {\n \tstruct i40e_aq_desc desc;\n \tstruct i40e_aqc_phy_register_access *cmd =\n@@ -7310,6 +7347,8 @@ enum i40e_status_code i40e_aq_get_phy_register(struct i40e_hw *hw,\n \tif (!page_change)\n \t\tcmd->cmd_flags = I40E_AQ_PHY_REG_ACCESS_DONT_CHANGE_QSFP_PAGE;\n \n+\ti40e_mdio_if_number_selection(hw, set_mdio, mdio_num, cmd);\n+\n \tstatus = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);\n \tif (!status)\n \t\t*reg_val = LE32_TO_CPU(cmd->reg_value);\n@@ -7317,7 +7356,6 @@ enum i40e_status_code i40e_aq_get_phy_register(struct i40e_hw *hw,\n \treturn status;\n }\n \n-#endif /* PF_DRIVER */\n /**\n * i40e_aq_run_phy_activity\n * @hw: pointer to the hw struct\ndiff --git a/drivers/net/i40e/base/i40e_prototype.h b/drivers/net/i40e/base/i40e_prototype.h\nindex 748a7a275..fcfe497f1 100644\n--- a/drivers/net/i40e/base/i40e_prototype.h\n+++ b/drivers/net/i40e/base/i40e_prototype.h\n@@ -548,14 +548,25 @@ enum i40e_status_code i40e_aq_rx_ctl_write_register(struct i40e_hw *hw,\n \t\t\t\tu32 reg_addr, u32 reg_val,\n \t\t\t\tstruct i40e_asq_cmd_details *cmd_details);\n void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val);\n-enum i40e_status_code i40e_aq_set_phy_register(struct i40e_hw *hw,\n-\t\t\t\tu8 phy_select, u8 dev_addr, bool page_change,\n-\t\t\t\tu32 reg_addr, u32 reg_val,\n-\t\t\t\tstruct i40e_asq_cmd_details *cmd_details);\n-enum i40e_status_code i40e_aq_get_phy_register(struct i40e_hw *hw,\n-\t\t\t\tu8 phy_select, u8 dev_addr, bool page_change,\n-\t\t\t\tu32 reg_addr, u32 *reg_val,\n-\t\t\t\tstruct i40e_asq_cmd_details *cmd_details);\n+enum i40e_status_code\n+i40e_aq_set_phy_register_ext(struct i40e_hw *hw,\n+\t\t\t u8 phy_select, u8 dev_addr, bool page_change,\n+\t\t\t bool set_mdio, u8 mdio_num,\n+\t\t\t u32 reg_addr, u32 reg_val,\n+\t\t\t struct i40e_asq_cmd_details *cmd_details);\n+enum i40e_status_code\n+i40e_aq_get_phy_register_ext(struct i40e_hw *hw,\n+\t\t\t u8 phy_select, u8 dev_addr, bool page_change,\n+\t\t\t bool set_mdio, u8 mdio_num,\n+\t\t\t u32 reg_addr, u32 *reg_val,\n+\t\t\t struct i40e_asq_cmd_details *cmd_details);\n+\n+/* Convenience wrappers for most common use case */\n+#define i40e_aq_set_phy_register(hw, ps, da, pc, ra, rv, cd) \\\n+\ti40e_aq_set_phy_register_ext(hw, ps, da, pc, false, 0, ra, rv, cd)\n+#define i40e_aq_get_phy_register(hw, ps, da, pc, ra, rv, cd) \\\n+\ti40e_aq_get_phy_register_ext(hw, ps, da, pc, false, 0, ra, rv, cd)\n+\n enum i40e_status_code\n i40e_aq_run_phy_activity(struct i40e_hw *hw, u16 activity_id, u32 opcode,\n \t\t\t u32 *cmd_status, u32 *data0, u32 *data1,\ndiff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h\nindex f0e4b667a..b380193f7 100644\n--- a/drivers/net/i40e/base/i40e_type.h\n+++ b/drivers/net/i40e/base/i40e_type.h\n@@ -743,6 +743,7 @@ struct i40e_hw {\n #define I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK BIT_ULL(3)\n #define I40E_HW_FLAG_FW_LLDP_STOPPABLE\t BIT_ULL(4)\n #define I40E_HW_FLAG_FW_LLDP_PERSISTENT BIT_ULL(5)\n+#define I40E_HW_FLAG_AQ_PHY_ACCESS_EXTENDED BIT_ULL(6)\n \tu64 flags;\n \n \t/* Used in set switch config AQ command */\n", "prefixes": [ "v4", "19/36" ] }