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GET /api/patches/64393/?format=api
{ "id": 64393, "url": "http://patches.dpdk.org/api/patches/64393/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200110083604.25864-1-ssardar@amd.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200110083604.25864-1-ssardar@amd.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200110083604.25864-1-ssardar@amd.com", "date": "2020-01-10T08:36:04", "name": "[v1,2/2] net/axgbe: auto-negotiation support enabled for 1Gbps", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "f558e65fca49792fcaaa4cf5e725f6b4609d7e08", "submitter": { "id": 1564, "url": "http://patches.dpdk.org/api/people/1564/?format=api", "name": null, "email": "ssardar@amd.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200110083604.25864-1-ssardar@amd.com/mbox/", "series": [ { "id": 8045, "url": "http://patches.dpdk.org/api/series/8045/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8045", "date": "2020-01-10T08:35:28", "name": "[v1,1/2] net/axgbe: 1/2.5Gbps support enabled for axgbe", "version": 1, "mbox": "http://patches.dpdk.org/series/8045/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/64393/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/64393/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", 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"X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM6PR12MB3052", "Subject": "[dpdk-dev] [PATCH v1 2/2] net/axgbe: auto-negotiation support\n\tenabled for 1Gbps", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Sardar Shamsher Singh <Shamshersingh.Sardar@amd.com>\n\nAdded CL37 Auto-neg support for 1Gbps interface\nin axgbe driver\n\nSigned-off-by: Sardar Shamsher Singh <Shamshersingh.Sardar@amd.com>\n---\n drivers/net/axgbe/axgbe_common.h | 1 +\n drivers/net/axgbe/axgbe_mdio.c | 192 +++++++++++++++++++++++++++--\n drivers/net/axgbe/axgbe_phy_impl.c | 37 ++++++\n 3 files changed, 219 insertions(+), 11 deletions(-)", "diff": "diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h\nindex 34f60f156..99fa92d5c 100644\n--- a/drivers/net/axgbe/axgbe_common.h\n+++ b/drivers/net/axgbe/axgbe_common.h\n@@ -1296,6 +1296,7 @@\n #define AXGBE_AN_CL37_PCS_MODE_BASEX\t0x00\n #define AXGBE_AN_CL37_PCS_MODE_SGMII\t0x04\n #define AXGBE_AN_CL37_TX_CONFIG_MASK\t0x08\n+#define AXGBE_AN_CL37_MII_CTRL_8BIT 0x0100\n \n #define AXGBE_PMA_CDR_TRACK_EN_MASK\t0x01\n #define AXGBE_PMA_CDR_TRACK_EN_OFF\t0x00\ndiff --git a/drivers/net/axgbe/axgbe_mdio.c b/drivers/net/axgbe/axgbe_mdio.c\nindex 2721e5cc9..3902b1ec3 100644\n--- a/drivers/net/axgbe/axgbe_mdio.c\n+++ b/drivers/net/axgbe/axgbe_mdio.c\n@@ -29,6 +29,19 @@ static void axgbe_an37_disable_interrupts(struct axgbe_port *pdata)\n \tXMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL, reg);\n }\n \n+static void axgbe_an37_enable_interrupts(struct axgbe_port *pdata)\n+{\n+\tunsigned int reg;\n+\n+\treg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL);\n+\treg |= AXGBE_PCS_CL37_BP;\n+\tXMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL, reg);\n+\n+\treg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL);\n+\treg |= AXGBE_AN_CL37_INT_MASK;\n+\tXMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL, reg);\n+}\n+\n static void axgbe_an73_clear_interrupts(struct axgbe_port *pdata)\n {\n \tXMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, 0);\n@@ -54,7 +67,7 @@ static void axgbe_an_enable_interrupts(struct axgbe_port *pdata)\n \t\tbreak;\n \tcase AXGBE_AN_MODE_CL37:\n \tcase AXGBE_AN_MODE_CL37_SGMII:\n-\t\tPMD_DRV_LOG(ERR, \"Unsupported AN_MOD_37\\n\");\n+\t\taxgbe_an37_enable_interrupts(pdata);\n \t\tbreak;\n \tdefault:\n \t\tbreak;\n@@ -254,6 +267,12 @@ static void axgbe_an37_set(struct axgbe_port *pdata, bool enable,\n \tXMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_CTRL1, reg);\n }\n \n+static void axgbe_an37_restart(struct axgbe_port *pdata)\n+{\n+\taxgbe_an37_enable_interrupts(pdata);\n+\taxgbe_an37_set(pdata, true, true);\n+}\n+\n static void axgbe_an37_disable(struct axgbe_port *pdata)\n {\n \taxgbe_an37_set(pdata, false, false);\n@@ -302,7 +321,7 @@ static void axgbe_an_restart(struct axgbe_port *pdata)\n \t\tbreak;\n \tcase AXGBE_AN_MODE_CL37:\n \tcase AXGBE_AN_MODE_CL37_SGMII:\n-\t\tPMD_DRV_LOG(ERR, \"Unsupported AN_MODE_CL37\\n\");\n+\t\taxgbe_an37_restart(pdata);\n \t\tbreak;\n \tdefault:\n \t\tbreak;\n@@ -321,7 +340,7 @@ static void axgbe_an_disable(struct axgbe_port *pdata)\n \t\tbreak;\n \tcase AXGBE_AN_MODE_CL37:\n \tcase AXGBE_AN_MODE_CL37_SGMII:\n-\t\tPMD_DRV_LOG(ERR, \"Unsupported AN_MODE_CL37\\n\");\n+\t\taxgbe_an37_disable(pdata);\n \t\tbreak;\n \tdefault:\n \t\tbreak;\n@@ -573,6 +592,53 @@ static void axgbe_an73_state_machine(struct axgbe_port *pdata)\n \taxgbe_an73_enable_interrupts(pdata);\n }\n \n+static void axgbe_an37_state_machine(struct axgbe_port *pdata)\n+{\n+\tenum axgbe_an cur_state = pdata->an_state;\n+\n+\tif (!pdata->an_int)\n+\t\treturn;\n+\tif (pdata->an_int & AXGBE_AN_CL37_INT_CMPLT) {\n+\t\tpdata->an_state = AXGBE_AN_COMPLETE;\n+\t\tpdata->an_int &= ~AXGBE_AN_CL37_INT_CMPLT;\n+\n+\t/* If SGMII is enabled, check the link status */\n+\t\tif (pdata->an_mode == AXGBE_AN_MODE_CL37_SGMII &&\n+\t\t !(pdata->an_status & AXGBE_SGMII_AN_LINK_STATUS))\n+\t\t\tpdata->an_state = AXGBE_AN_NO_LINK;\n+\t}\n+\n+\tcur_state = pdata->an_state;\n+\n+\tswitch (pdata->an_state) {\n+\tcase AXGBE_AN_READY:\n+\t\tbreak;\n+\tcase AXGBE_AN_COMPLETE:\n+\t\tbreak;\n+\tcase AXGBE_AN_NO_LINK:\n+\t\tbreak;\n+\tdefault:\n+\t\tpdata->an_state = AXGBE_AN_ERROR;\n+\t\tbreak;\n+\t}\n+\n+\tif (pdata->an_state == AXGBE_AN_ERROR) {\n+\t\tPMD_DRV_LOG(ERR, \"error during auto-negotiation, state=%u\\n\",\n+\t\t\t cur_state);\n+\t\tpdata->an_int = 0;\n+\t\taxgbe_an37_clear_interrupts(pdata);\n+\t}\n+\n+\tif (pdata->an_state >= AXGBE_AN_COMPLETE) {\n+\t\tpdata->an_result = pdata->an_state;\n+\t\tpdata->an_state = AXGBE_AN_READY;\n+\t\tif (pdata->phy_if.phy_impl.an_post)\n+\t\t\tpdata->phy_if.phy_impl.an_post(pdata);\n+\t}\n+\n+\taxgbe_an37_enable_interrupts(pdata);\n+}\n+\n static void axgbe_an73_isr(struct axgbe_port *pdata)\n {\n \t/* Disable AN interrupts */\n@@ -580,6 +646,7 @@ static void axgbe_an73_isr(struct axgbe_port *pdata)\n \n \t/* Save the interrupt(s) that fired */\n \tpdata->an_int = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_INT);\n+\taxgbe_an73_clear_interrupts(pdata);\n \n \tif (pdata->an_int) {\n \t\t/* Clear the interrupt(s) that fired and process them */\n@@ -593,6 +660,29 @@ static void axgbe_an73_isr(struct axgbe_port *pdata)\n \t}\n }\n \n+static void axgbe_an37_isr(struct axgbe_port *pdata)\n+{\n+\tunsigned int reg = 0;\n+\t/* Disable AN interrupts */\n+\taxgbe_an37_disable_interrupts(pdata);\n+\n+\t/* Save the interrupt(s) that fired */\n+\treg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_STAT);\n+\tpdata->an_int = reg & AXGBE_AN_CL37_INT_MASK;\n+\tpdata->an_status = reg & ~AXGBE_AN_CL37_INT_MASK;\n+\taxgbe_an37_clear_interrupts(pdata);\n+\n+\tif (pdata->an_int & 0x01) {\n+\t\t/* Clear the interrupt(s) that fired and process them */\n+\t\treg &= ~AXGBE_AN_CL37_INT_MASK;\n+\t\tXMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_STAT, reg);\n+\t\taxgbe_an37_state_machine(pdata);\n+\t} else {\n+\t\t/* Enable AN interrupts */\n+\t\taxgbe_an37_enable_interrupts(pdata);\n+\t}\n+}\n+\n static void axgbe_an_isr(struct axgbe_port *pdata)\n {\n \tswitch (pdata->an_mode) {\n@@ -602,7 +692,7 @@ static void axgbe_an_isr(struct axgbe_port *pdata)\n \t\tbreak;\n \tcase AXGBE_AN_MODE_CL37:\n \tcase AXGBE_AN_MODE_CL37_SGMII:\n-\t\tPMD_DRV_LOG(ERR, \"AN_MODE_37 not supported\\n\");\n+\t\taxgbe_an37_isr(pdata);\n \t\tbreak;\n \tdefault:\n \t\tbreak;\n@@ -614,6 +704,48 @@ static void axgbe_an_combined_isr(struct axgbe_port *pdata)\n \taxgbe_an_isr(pdata);\n }\n \n+static void axgbe_an37_init(struct axgbe_port *pdata)\n+{\n+\tunsigned int advertising;\n+\tunsigned int reg = 0;\n+\n+\tadvertising = pdata->phy_if.phy_impl.an_advertising(pdata);\n+\n+\treg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_ADVERTISE);\n+\tif (advertising & ADVERTISED_Pause)\n+\t\treg |= 0x100;\n+\telse\n+\t\treg &= ~0x100;\n+\tif (advertising & ADVERTISED_Asym_Pause)\n+\t\treg |= 0x80;\n+\telse\n+\t\treg &= ~0x80;\n+\n+\t/* Full duplex, but not half */\n+\treg |= AXGBE_AN_CL37_FD_MASK;\n+\treg &= ~AXGBE_AN_CL37_HD_MASK;\n+\n+\tXMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_ADVERTISE, reg);\n+\n+\t/* Set up the Control register */\n+\treg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL);\n+\treg &= ~AXGBE_AN_CL37_TX_CONFIG_MASK;\n+\treg &= ~AXGBE_AN_CL37_PCS_MODE_MASK;\n+\n+\tswitch (pdata->an_mode) {\n+\tcase AXGBE_AN_MODE_CL37:\n+\t\treg |= AXGBE_AN_CL37_PCS_MODE_BASEX;\n+\t\tbreak;\n+\tcase AXGBE_AN_MODE_CL37_SGMII:\n+\t\treg |= AXGBE_AN_CL37_PCS_MODE_SGMII;\n+\t\tbreak;\n+\tdefault:\n+\t\tbreak;\n+\t}\n+\treg |= AXGBE_AN_CL37_MII_CTRL_8BIT;\n+\tXMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL, reg);\n+}\n+\n static void axgbe_an73_init(struct axgbe_port *pdata)\n {\n \tunsigned int advertising, reg;\n@@ -673,7 +805,7 @@ static void axgbe_an_init(struct axgbe_port *pdata)\n \t\tbreak;\n \tcase AXGBE_AN_MODE_CL37:\n \tcase AXGBE_AN_MODE_CL37_SGMII:\n-\t\tPMD_DRV_LOG(ERR, \"Unsupported AN_CL37\\n\");\n+\t\taxgbe_an37_init(pdata);\n \t\tbreak;\n \tdefault:\n \t\tbreak;\n@@ -782,9 +914,6 @@ static int __axgbe_phy_config_aneg(struct axgbe_port *pdata)\n \t/* Disable and stop any in progress auto-negotiation */\n \taxgbe_an_disable_all(pdata);\n \n-\t/* Clear any auto-negotitation interrupts */\n-\taxgbe_an_clear_interrupts_all(pdata);\n-\n \tpdata->an_result = AXGBE_AN_READY;\n \tpdata->an_state = AXGBE_AN_READY;\n \tpdata->kr_state = AXGBE_RX_BPA;\n@@ -792,6 +921,7 @@ static int __axgbe_phy_config_aneg(struct axgbe_port *pdata)\n \n \t/* Re-enable auto-negotiation interrupt */\n \trte_intr_enable(&pdata->pci_dev->intr_handle);\n+\taxgbe_an37_enable_interrupts(pdata);\n \n \taxgbe_an_init(pdata);\n \taxgbe_an_restart(pdata);\n@@ -875,10 +1005,26 @@ static void axgbe_phy_status_result(struct axgbe_port *pdata)\n \taxgbe_set_mode(pdata, mode);\n }\n \n+static int autoneg_time_out(unsigned long autoneg_start_time)\n+{\n+\tunsigned long autoneg_timeout;\n+\tunsigned long ticks;\n+\n+\tautoneg_timeout = autoneg_start_time + (AXGBE_LINK_TIMEOUT *\n+\t\t\t\t\t\t2 * rte_get_timer_hz());\n+\tticks = rte_get_timer_cycles();\n+\tif (time_after(ticks, autoneg_timeout))\n+\t\treturn 1;\n+\telse\n+\t\treturn 0;\n+}\n+\n static void axgbe_phy_status(struct axgbe_port *pdata)\n {\n \tunsigned int link_aneg;\n-\tint an_restart;\n+\tint an_restart, ret;\n+\tunsigned int reg = 0;\n+\tunsigned long autoneg_start_time;\n \n \tif (axgbe_test_bit(AXGBE_LINK_ERR, &pdata->dev_state)) {\n \t\tpdata->phy.link = 0;\n@@ -896,8 +1042,32 @@ static void axgbe_phy_status(struct axgbe_port *pdata)\n \n \tif (pdata->phy.link) {\n \t\tif (link_aneg && !axgbe_phy_aneg_done(pdata)) {\n-\t\t\taxgbe_check_link_timeout(pdata);\n-\t\t\treturn;\n+\t\t\tif (axgbe_cur_mode(pdata) == AXGBE_MODE_SGMII_1000) {\n+\t\t\t\t/*autoneg not complete, so re-intializing*/\n+\t\t\t\t/* and restarting it*/\n+\t\t\t\taxgbe_an_init(pdata);\n+\t\t\t\taxgbe_an_restart(pdata);\n+\t\t\t\treg = XMDIO_READ(pdata, MDIO_MMD_VEND2,\n+\t\t\t\t\t\t MDIO_VEND2_AN_STAT);\n+\t\t\t\tautoneg_start_time = rte_get_timer_cycles();\n+\t\t\t\t/*poll for autoneg to complete*/\n+\t\t\t\twhile (!(reg & AXGBE_AN_CL37_INT_CMPLT)) {\n+\t\t\t\t\tret =\n+\t\t\t\t\tautoneg_time_out(autoneg_start_time);\n+\t\t\t\t\tif (ret)\n+\t\t\t\t\t\tbreak;\n+\t\t\t\t\treg = XMDIO_READ(pdata,\n+\t\t\t\t\t\t\t MDIO_MMD_VEND2,\n+\t\t\t\t\t\t\t MDIO_VEND2_AN_STAT);\n+\t\t\t\t\tif (reg & AXGBE_AN_CL37_INT_CMPLT) {\n+\t\t\t\t\t\taxgbe_an37_isr(pdata);\n+\t\t\t\t\t\tbreak;\n+\t\t\t\t\t}\n+\t\t\t\t}\n+\t\t\t} else {\n+\t\t\t\taxgbe_check_link_timeout(pdata);\n+\t\t\t\treturn;\n+\t\t\t}\n \t\t}\n \t\taxgbe_phy_status_result(pdata);\n \t\tif (axgbe_test_bit(AXGBE_LINK_INIT, &pdata->dev_state))\ndiff --git a/drivers/net/axgbe/axgbe_phy_impl.c b/drivers/net/axgbe/axgbe_phy_impl.c\nindex f0dc11695..a324a2bc9 100644\n--- a/drivers/net/axgbe/axgbe_phy_impl.c\n+++ b/drivers/net/axgbe/axgbe_phy_impl.c\n@@ -957,6 +957,41 @@ static enum axgbe_mode axgbe_phy_an73_outcome(struct axgbe_port *pdata)\n \treturn mode;\n }\n \n+static enum axgbe_mode axgbe_phy_an37_sgmii_outcome(struct axgbe_port *pdata)\n+{\n+\tenum axgbe_mode mode;\n+\n+\tpdata->phy.lp_advertising |= ADVERTISED_Autoneg;\n+\tpdata->phy.lp_advertising |= ADVERTISED_1000baseT_Full;\n+\n+\tif (pdata->phy.pause_autoneg)\n+\t\taxgbe_phy_phydev_flowctrl(pdata);\n+\n+\tswitch (pdata->an_status & AXGBE_SGMII_AN_LINK_SPEED) {\n+\tcase AXGBE_SGMII_AN_LINK_SPEED_100:\n+\t\tif (pdata->an_status & AXGBE_SGMII_AN_LINK_DUPLEX) {\n+\t\t\tpdata->phy.lp_advertising |= ADVERTISED_100baseT_Full;\n+\t\t\tmode = AXGBE_MODE_SGMII_100;\n+\t\t} else {\n+\t\t\tmode = AXGBE_MODE_UNKNOWN;\n+\t\t}\n+\t\tbreak;\n+\tcase AXGBE_SGMII_AN_LINK_SPEED_1000:\n+\t\tif (pdata->an_status & AXGBE_SGMII_AN_LINK_DUPLEX) {\n+\t\t\tpdata->phy.lp_advertising |= ADVERTISED_1000baseT_Full;\n+\t\t\tmode = AXGBE_MODE_SGMII_1000;\n+\t\t} else {\n+\t\t\t/* Half-duplex not supported */\n+\t\t\tmode = AXGBE_MODE_UNKNOWN;\n+\t\t}\n+\t\tbreak;\n+\tdefault:\n+\t\tmode = AXGBE_MODE_UNKNOWN;\n+\t\tbreak;\n+\t}\n+\treturn mode;\n+}\n+\n static enum axgbe_mode axgbe_phy_an_outcome(struct axgbe_port *pdata)\n {\n \tswitch (pdata->an_mode) {\n@@ -966,6 +1001,7 @@ static enum axgbe_mode axgbe_phy_an_outcome(struct axgbe_port *pdata)\n \t\treturn axgbe_phy_an73_redrv_outcome(pdata);\n \tcase AXGBE_AN_MODE_CL37:\n \tcase AXGBE_AN_MODE_CL37_SGMII:\n+\t\treturn axgbe_phy_an37_sgmii_outcome(pdata);\n \tdefault:\n \t\treturn AXGBE_MODE_UNKNOWN;\n \t}\n@@ -1957,6 +1993,7 @@ static int axgbe_phy_start(struct axgbe_port *pdata)\n \tdefault:\n \t\tbreak;\n \t}\n+\tpdata->phy.advertising &= axgbe_phy_an_advertising(pdata);\n \n \treturn ret;\n }\n", "prefixes": [ "v1", "2/2" ] }