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GET /api/patches/64360/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 64360,
    "url": "http://patches.dpdk.org/api/patches/64360/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1578572194-594-6-git-send-email-bernard.iremonger@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1578572194-594-6-git-send-email-bernard.iremonger@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1578572194-594-6-git-send-email-bernard.iremonger@intel.com",
    "date": "2020-01-09T12:16:30",
    "name": "[v3,5/9] net/i40e: process ESP flows",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "45dd6f0ba6d6e91329f7e8ef7e072dc0b45568b9",
    "submitter": {
        "id": 91,
        "url": "http://patches.dpdk.org/api/people/91/?format=api",
        "name": "Iremonger, Bernard",
        "email": "bernard.iremonger@intel.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1578572194-594-6-git-send-email-bernard.iremonger@intel.com/mbox/",
    "series": [
        {
            "id": 7862,
            "url": "http://patches.dpdk.org/api/series/7862/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7862",
            "date": "2019-12-17T10:15:46",
            "name": "net/i40e: ESP support",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/7862/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/64360/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/64360/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 91E49A046B;\n\tThu,  9 Jan 2020 13:17:29 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 5427A1DD2C;\n\tThu,  9 Jan 2020 13:17:02 +0100 (CET)",
            "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n by dpdk.org (Postfix) with ESMTP id 55D371DD05\n for <dev@dpdk.org>; Thu,  9 Jan 2020 13:17:00 +0100 (CET)",
            "from fmsmga001.fm.intel.com ([10.253.24.23])\n by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 09 Jan 2020 04:17:00 -0800",
            "from sivswdev08.ir.intel.com (HELO localhost.localdomain)\n ([10.237.217.47])\n by fmsmga001.fm.intel.com with ESMTP; 09 Jan 2020 04:16:58 -0800"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.69,413,1571727600\"; d=\"scan'208\";a=\"227309833\"",
        "From": "Bernard Iremonger <bernard.iremonger@intel.com>",
        "To": "dev@dpdk.org, beilei.xing@intel.com, qi.z.zhang@intel.com,\n declan.doherty@intel.com",
        "Cc": "konstantin.ananyev@intel.com, stephen1.byrne@intel.com,\n helin.zhang@intel.com, Bernard Iremonger <bernard.iremonger@intel.com>",
        "Date": "Thu,  9 Jan 2020 12:16:30 +0000",
        "Message-Id": "<1578572194-594-6-git-send-email-bernard.iremonger@intel.com>",
        "X-Mailer": "git-send-email 1.7.0.7",
        "In-Reply-To": "<1576577756-648-1-git-send-email-bernard.iremonger@intel.com>",
        "References": "<1576577756-648-1-git-send-email-bernard.iremonger@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v3 5/9] net/i40e: process ESP flows",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Process ESP flows on Flow Director and RSS.\n\nadd eth/ipv4/esp and eth/ipv6/esp patterns\nadd eth/ipv4/udp/esp and eth/ipv6/esp/udp patterns\nadd flow structures for above patterns\nupdate i40e_flow_parse_fdir_filter()\nadd i40e_flow_set_filter_spi()\nadd fill_ip6_head()\nadd oip_type in filter\nadd is_udp in filter\nuse tenant_id in filter for spi\nhandle ESP and AH pctypes in ESP-AH profile\nupdate customized code for ESP\nhardcode udp destination port to 4500\n\nSigned-off-by: Bernard Iremonger <bernard.iremonger@intel.com>\n---\n drivers/net/i40e/i40e_ethdev.c |  44 +++++++++++++-\n drivers/net/i40e/i40e_ethdev.h |  38 ++++++++++++\n drivers/net/i40e/i40e_fdir.c   | 128 +++++++++++++++++++++++++++++++++++---\n drivers/net/i40e/i40e_flow.c   | 135 ++++++++++++++++++++++++++++++++++++++++-\n 4 files changed, 332 insertions(+), 13 deletions(-)",
    "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 5f1cf8a..a462eba 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -1106,6 +1106,7 @@ i40e_init_customized_info(struct i40e_pf *pf)\n \t}\n \n \tpf->gtp_support = false;\n+\tpf->esp_support = false;\n }\n \n void\n@@ -12337,6 +12338,7 @@ i40e_update_customized_pctype(struct rte_eth_dev *dev, uint8_t *pkg,\n \t\t\t}\n \t\t}\n \t\tname[strlen(name) - 1] = '\\0';\n+\t\tPMD_DRV_LOG(INFO, \"name = %s\\n\", name);\n \t\tif (!strcmp(name, \"GTPC\"))\n \t\t\tnew_pctype =\n \t\t\t\ti40e_find_customized_pctype(pf,\n@@ -12353,6 +12355,30 @@ i40e_update_customized_pctype(struct rte_eth_dev *dev, uint8_t *pkg,\n \t\t\tnew_pctype =\n \t\t\t\ti40e_find_customized_pctype(pf,\n \t\t\t\t\t\t      I40E_CUSTOMIZED_GTPU);\n+\t\telse if (!strcmp(name, \"IPV4_ESP\"))\n+\t\t\tnew_pctype =\n+\t\t\t\ti40e_find_customized_pctype(pf,\n+\t\t\t\t\t\tI40E_CUSTOMIZED_ESP_IPV4);\n+\t\telse if (!strcmp(name, \"IPV6_ESP\"))\n+\t\t\tnew_pctype =\n+\t\t\t\ti40e_find_customized_pctype(pf,\n+\t\t\t\t\t\tI40E_CUSTOMIZED_ESP_IPV6);\n+\t\telse if (!strcmp(name, \"IPV4_UDP_ESP\"))\n+\t\t\tnew_pctype =\n+\t\t\t\ti40e_find_customized_pctype(pf,\n+\t\t\t\t\t\tI40E_CUSTOMIZED_ESP_IPV4_UDP);\n+\t\telse if (!strcmp(name, \"IPV6_UDP_ESP\"))\n+\t\t\tnew_pctype =\n+\t\t\t\ti40e_find_customized_pctype(pf,\n+\t\t\t\t\t\tI40E_CUSTOMIZED_ESP_IPV6_UDP);\n+\t\telse if (!strcmp(name, \"IPV4_AH\"))\n+\t\t\tnew_pctype =\n+\t\t\t\ti40e_find_customized_pctype(pf,\n+\t\t\t\t\t\tI40E_CUSTOMIZED_AH_IPV4);\n+\t\telse if (!strcmp(name, \"IPV6_AH\"))\n+\t\t\tnew_pctype =\n+\t\t\t\ti40e_find_customized_pctype(pf,\n+\t\t\t\t\t\tI40E_CUSTOMIZED_AH_IPV6);\n \t\tif (new_pctype) {\n \t\t\tif (op == RTE_PMD_I40E_PKG_OP_WR_ADD) {\n \t\t\t\tnew_pctype->pctype = pctype_value;\n@@ -12448,6 +12474,7 @@ i40e_update_customized_ptype(struct rte_eth_dev *dev, uint8_t *pkg,\n \t\t\t\t\tcontinue;\n \t\t\t\tmemset(name, 0, sizeof(name));\n \t\t\t\tstrcpy(name, proto[n].name);\n+\t\t\t\tPMD_DRV_LOG(INFO, \"name = %s\\n\", name);\n \t\t\t\tif (!strncasecmp(name, \"PPPOE\", 5))\n \t\t\t\t\tptype_mapping[i].sw_ptype |=\n \t\t\t\t\t\tRTE_PTYPE_L2_ETHER_PPPOE;\n@@ -12541,6 +12568,10 @@ i40e_update_customized_ptype(struct rte_eth_dev *dev, uint8_t *pkg,\n \t\t\t\t\tptype_mapping[i].sw_ptype |=\n \t\t\t\t\t\tRTE_PTYPE_TUNNEL_GTPU;\n \t\t\t\t\tin_tunnel = true;\n+\t\t\t\t} else if (!strncasecmp(name, \"ESP\", 3)) {\n+\t\t\t\t\tptype_mapping[i].sw_ptype |=\n+\t\t\t\t\t\tRTE_PTYPE_TUNNEL_ESP;\n+\t\t\t\t\tin_tunnel = true;\n \t\t\t\t} else if (!strncasecmp(name, \"GRENAT\", 6)) {\n \t\t\t\t\tptype_mapping[i].sw_ptype |=\n \t\t\t\t\t\tRTE_PTYPE_TUNNEL_GRENAT;\n@@ -12560,7 +12591,7 @@ i40e_update_customized_ptype(struct rte_eth_dev *dev, uint8_t *pkg,\n \tret = rte_pmd_i40e_ptype_mapping_update(port_id, ptype_mapping,\n \t\t\t\t\t\tptype_num, 0);\n \tif (ret)\n-\t\tPMD_DRV_LOG(ERR, \"Failed to update mapping table.\");\n+\t\tPMD_DRV_LOG(ERR, \"Failed to update ptype mapping table.\");\n \n \trte_free(ptype_mapping);\n \trte_free(ptype);\n@@ -12625,6 +12656,17 @@ i40e_update_customized_info(struct rte_eth_dev *dev, uint8_t *pkg,\n \t\t}\n \t}\n \n+\t/* Check if ESP is supported. */\n+\tfor (i = 0; i < proto_num; i++) {\n+\t\tif (!strncmp(proto[i].name, \"ESP\", 3)) {\n+\t\t\tif (op == RTE_PMD_I40E_PKG_OP_WR_ADD)\n+\t\t\t\tpf->esp_support = true;\n+\t\t\telse\n+\t\t\t\tpf->esp_support = false;\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\n \t/* Update customized pctype info */\n \tret = i40e_update_customized_pctype(dev, pkg, pkg_size,\n \t\t\t\t\t    proto_num, proto, op);\ndiff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex 295ad59..792a047 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -501,6 +501,29 @@ struct i40e_gtp_ipv6_flow {\n \tstruct rte_eth_ipv6_flow ip6;\n };\n \n+/* A structure used to define the input for ESP IPV4 flow */\n+struct i40e_esp_ipv4_flow {\n+\tstruct rte_eth_ipv4_flow ipv4;\n+\tuint32_t spi;\t/* SPI in big endian. */\n+};\n+\n+/* A structure used to define the input for ESP IPV6 flow */\n+struct i40e_esp_ipv6_flow {\n+\tstruct rte_eth_ipv6_flow ipv6;\n+\tuint32_t spi;\t/* SPI in big endian. */\n+};\n+/* A structure used to define the input for ESP IPV4 UDP flow */\n+struct i40e_esp_ipv4_udp_flow {\n+\tstruct rte_eth_udpv4_flow udp;\n+\tuint32_t spi;\t/* SPI in big endian. */\n+};\n+\n+/* A structure used to define the input for ESP IPV6 UDP flow */\n+struct i40e_esp_ipv6_udp_flow {\n+\tstruct rte_eth_udpv6_flow udp;\n+\tuint32_t spi;\t/* SPI in big endian. */\n+};\n+\n /* A structure used to define the input for raw type flow */\n struct i40e_raw_flow {\n \tuint16_t pctype;\n@@ -526,6 +549,10 @@ union i40e_fdir_flow {\n \tstruct i40e_gtp_ipv4_flow  gtp_ipv4_flow;\n \tstruct i40e_gtp_ipv6_flow  gtp_ipv6_flow;\n \tstruct i40e_raw_flow       raw_flow;\n+\tstruct i40e_esp_ipv4_flow  esp_ipv4_flow;\n+\tstruct i40e_esp_ipv6_flow  esp_ipv6_flow;\n+\tstruct i40e_esp_ipv4_udp_flow  esp_ipv4_udp_flow;\n+\tstruct i40e_esp_ipv6_udp_flow  esp_ipv6_udp_flow;\n };\n \n enum i40e_fdir_ip_type {\n@@ -542,8 +569,10 @@ struct i40e_fdir_flow_ext {\n \tuint16_t dst_id; /* VF ID, available when is_vf is 1*/\n \tbool inner_ip;   /* If there is inner ip */\n \tenum i40e_fdir_ip_type iip_type; /* ip type for inner ip */\n+\tenum i40e_fdir_ip_type oip_type; /* ip type for outer ip */\n \tbool customized_pctype; /* If customized pctype is used */\n \tbool pkt_template; /* If raw packet template is used */\n+\tbool is_udp; /* ipv4|ipv6 udp flow */\n };\n \n /* A structure used to define the input for a flow director filter entry */\n@@ -769,6 +798,8 @@ enum i40e_tunnel_type {\n \tI40E_TUNNEL_TYPE_QINQ,\n \tI40E_TUNNEL_TYPE_GTPC,\n \tI40E_TUNNEL_TYPE_GTPU,\n+\tI40E_TUNNEL_TYPE_ESPoUDP,\n+\tI40E_TUNNEL_TYPE_ESPoIP,\n \tI40E_TUNNEL_TYPE_MAX,\n };\n \n@@ -897,6 +928,12 @@ enum i40e_new_pctype {\n \tI40E_CUSTOMIZED_GTPU_IPV4,\n \tI40E_CUSTOMIZED_GTPU_IPV6,\n \tI40E_CUSTOMIZED_GTPU,\n+\tI40E_CUSTOMIZED_ESP_IPV4,\n+\tI40E_CUSTOMIZED_ESP_IPV6,\n+\tI40E_CUSTOMIZED_ESP_IPV4_UDP,\n+\tI40E_CUSTOMIZED_ESP_IPV6_UDP,\n+\tI40E_CUSTOMIZED_AH_IPV4,\n+\tI40E_CUSTOMIZED_AH_IPV6,\n \tI40E_CUSTOMIZED_MAX,\n };\n \n@@ -1001,6 +1038,7 @@ struct i40e_pf {\n \n \t/* Dynamic Device Personalization */\n \tbool gtp_support; /* 1 - support GTP-C and GTP-U */\n+\tbool esp_support; /* 1 - support ESP SPI */\n \t/* customer customized pctype */\n \tstruct i40e_customized_pctype customized_pctype[I40E_CUSTOMIZED_MAX];\n \t/* Switch Domain Id */\ndiff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c\nindex dee007d..3fa6297 100644\n--- a/drivers/net/i40e/i40e_fdir.c\n+++ b/drivers/net/i40e/i40e_fdir.c\n@@ -54,6 +54,8 @@\n #define I40E_FDIR_GTP_MSG_TYPE_0X01         0x01\n #define I40E_FDIR_GTP_MSG_TYPE_0XFF         0xFF\n \n+#define I40E_FDIR_ESP_DST_PORT              4500\n+\n /* Wait time for fdir filter programming */\n #define I40E_FDIR_MAX_WAIT_US 10000\n \n@@ -971,6 +973,37 @@ i40e_flow_fdir_find_customized_pctype(struct i40e_pf *pf, uint8_t pctype)\n }\n \n static inline int\n+fill_ip6_head(const struct i40e_fdir_input *fdir_input, unsigned char *raw_pkt,\n+\t\tuint8_t next_proto, uint8_t len, uint16_t *ether_type)\n+{\n+\tstruct rte_ipv6_hdr *ip6;\n+\n+\tip6 = (struct rte_ipv6_hdr *)raw_pkt;\n+\n+\t*ether_type = rte_cpu_to_be_16(RTE_ETHER_TYPE_IPV6);\n+\tip6->vtc_flow = rte_cpu_to_be_32(I40E_FDIR_IPv6_DEFAULT_VTC_FLOW |\n+\t\t(fdir_input->flow.ipv6_flow.tc << I40E_FDIR_IPv6_TC_OFFSET));\n+\tip6->payload_len = rte_cpu_to_be_16(I40E_FDIR_IPv6_PAYLOAD_LEN);\n+\tip6->proto = fdir_input->flow.ipv6_flow.proto ?\n+\t\tfdir_input->flow.ipv6_flow.proto : next_proto;\n+\tip6->hop_limits = fdir_input->flow.ipv6_flow.hop_limits ?\n+\t\tfdir_input->flow.ipv6_flow.hop_limits :\n+\t\tI40E_FDIR_IPv6_DEFAULT_HOP_LIMITS;\n+\t/**\n+\t * The source and destination fields in the transmitted packet\n+\t * need to be presented in a reversed order with respect\n+\t * to the expected received packets.\n+\t */\n+\trte_memcpy(&ip6->src_addr, &fdir_input->flow.ipv6_flow.dst_ip,\n+\t\tIPV6_ADDR_LEN);\n+\trte_memcpy(&ip6->dst_addr, &fdir_input->flow.ipv6_flow.src_ip,\n+\t\tIPV6_ADDR_LEN);\n+\tlen += sizeof(struct rte_ipv6_hdr);\n+\n+\treturn len;\n+}\n+\n+static inline int\n i40e_flow_fdir_fill_eth_ip_head(struct i40e_pf *pf,\n \t\t\t\tconst struct i40e_fdir_input *fdir_input,\n \t\t\t\tunsigned char *raw_pkt,\n@@ -1045,16 +1078,29 @@ i40e_flow_fdir_fill_eth_ip_head(struct i40e_pf *pf,\n \t\tip->src_addr = fdir_input->flow.ip4_flow.dst_ip;\n \t\tip->dst_addr = fdir_input->flow.ip4_flow.src_ip;\n \n-\t\tif (!is_customized_pctype)\n+\t\tif (!is_customized_pctype) {\n \t\t\tip->next_proto_id = fdir_input->flow.ip4_flow.proto ?\n \t\t\t\tfdir_input->flow.ip4_flow.proto :\n \t\t\t\tnext_proto[fdir_input->pctype];\n-\t\telse if (cus_pctype->index == I40E_CUSTOMIZED_GTPC ||\n+\t\t\tlen += sizeof(struct rte_ipv4_hdr);\n+\t\t} else if (cus_pctype->index == I40E_CUSTOMIZED_GTPC ||\n \t\t\t cus_pctype->index == I40E_CUSTOMIZED_GTPU_IPV4 ||\n \t\t\t cus_pctype->index == I40E_CUSTOMIZED_GTPU_IPV6 ||\n-\t\t\t cus_pctype->index == I40E_CUSTOMIZED_GTPU)\n+\t\t\t cus_pctype->index == I40E_CUSTOMIZED_GTPU) {\n \t\t\tip->next_proto_id = IPPROTO_UDP;\n-\t\tlen += sizeof(struct rte_ipv4_hdr);\n+\t\t\tlen += sizeof(struct rte_ipv4_hdr);\n+\t\t} else if (cus_pctype->index == I40E_CUSTOMIZED_ESP_IPV4) {\n+\t\t\tip->next_proto_id = IPPROTO_ESP;\n+\t\t\tlen += sizeof(struct rte_ipv4_hdr);\n+\t\t} else if (cus_pctype->index == I40E_CUSTOMIZED_ESP_IPV4_UDP) {\n+\t\t\tip->next_proto_id = IPPROTO_UDP;\n+\t\t\tlen += sizeof(struct rte_ipv4_hdr);\n+\t\t} else if (cus_pctype->index == I40E_CUSTOMIZED_ESP_IPV6)\n+\t\t\tlen = fill_ip6_head(fdir_input, raw_pkt, IPPROTO_ESP,\n+\t\t\t\t\tlen, ether_type);\n+\t\telse if (cus_pctype->index == I40E_CUSTOMIZED_ESP_IPV6_UDP)\n+\t\t\tlen = fill_ip6_head(fdir_input, raw_pkt, IPPROTO_UDP,\n+\t\t\t\t\tlen, ether_type);\n \t} else if (pctype == I40E_FILTER_PCTYPE_NONF_IPV6_TCP ||\n \t\t   pctype == I40E_FILTER_PCTYPE_NONF_IPV6_UDP ||\n \t\t   pctype == I40E_FILTER_PCTYPE_NONF_IPV6_SCTP ||\n@@ -1088,8 +1134,7 @@ i40e_flow_fdir_fill_eth_ip_head(struct i40e_pf *pf,\n \t\t\t   IPV6_ADDR_LEN);\n \t\tlen += sizeof(struct rte_ipv6_hdr);\n \t} else {\n-\t\tPMD_DRV_LOG(ERR, \"unknown pctype %u.\",\n-\t\t\t    fdir_input->pctype);\n+\t\tPMD_DRV_LOG(ERR, \"unknown pctype %u.\", fdir_input->pctype);\n \t\treturn -1;\n \t}\n \n@@ -1115,6 +1160,10 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf,\n \tstruct rte_flow_item_gtp *gtp;\n \tstruct rte_ipv4_hdr *gtp_ipv4;\n \tstruct rte_ipv6_hdr *gtp_ipv6;\n+\tstruct rte_flow_item_esp *esp;\n+\tstruct rte_ipv4_hdr *esp_ipv4;\n+\tstruct rte_ipv6_hdr *esp_ipv6;\n+\n \tuint8_t size, dst = 0;\n \tuint8_t i, pit_idx, set_idx = I40E_FLXPLD_L4_IDX; /* use l4 by default*/\n \tint len;\n@@ -1285,10 +1334,71 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf,\n \t\t\t} else\n \t\t\t\tpayload = (unsigned char *)gtp +\n \t\t\t\t\tsizeof(struct rte_flow_item_gtp);\n+\t\t} else if (cus_pctype->index == I40E_CUSTOMIZED_ESP_IPV4 ||\n+\t\t\tcus_pctype->index == I40E_CUSTOMIZED_ESP_IPV6 ||\n+\t\t\tcus_pctype->index == I40E_CUSTOMIZED_ESP_IPV4_UDP ||\n+\t\t\tcus_pctype->index == I40E_CUSTOMIZED_ESP_IPV6_UDP) {\n+\t\t\tif (cus_pctype->index == I40E_CUSTOMIZED_ESP_IPV4) {\n+\t\t\t\tesp_ipv4 = (struct rte_ipv4_hdr *)\n+\t\t\t\t\t(raw_pkt + len);\n+\t\t\t\tesp = (struct rte_flow_item_esp *)esp_ipv4;\n+\t\t\t\tesp->hdr.spi =\n+\t\t\t\t\tfdir_input->flow.esp_ipv4_flow.spi;\n+\t\t\t\tpayload = (unsigned char *)esp +\n+\t\t\t\t\tsizeof(struct rte_esp_hdr);\n+\t\t\t\tlen += sizeof(struct rte_esp_hdr);\n+\t\t\t} else if (cus_pctype->index ==\n+\t\t\t\t\tI40E_CUSTOMIZED_ESP_IPV4_UDP) {\n+\t\t\t\tesp_ipv4 = (struct rte_ipv4_hdr *)\n+\t\t\t\t\t(raw_pkt + len);\n+\t\t\t\tudp = (struct rte_udp_hdr *)esp_ipv4;\n+\t\t\t\tudp->dst_port = rte_cpu_to_be_16\n+\t\t\t\t\t(I40E_FDIR_ESP_DST_PORT);\n+\n+\t\t\t\tudp->dgram_len = rte_cpu_to_be_16\n+\t\t\t\t\t\t(I40E_FDIR_UDP_DEFAULT_LEN);\n+\t\t\t\tesp = (struct rte_flow_item_esp *)\n+\t\t\t\t\t((unsigned char *)esp_ipv4 +\n+\t\t\t\t\t\tsizeof(struct rte_udp_hdr));\n+\t\t\t\tesp->hdr.spi =\n+\t\t\t\t\tfdir_input->flow.esp_ipv4_udp_flow.spi;\n+\t\t\t\tpayload = (unsigned char *)esp +\n+\t\t\t\t\tsizeof(struct rte_esp_hdr);\n+\t\t\t\tlen += sizeof(struct rte_udp_hdr) +\n+\t\t\t\t\t\tsizeof(struct rte_esp_hdr);\n+\t\t\t} else if (cus_pctype->index ==\n+\t\t\t\t\tI40E_CUSTOMIZED_ESP_IPV6) {\n+\t\t\t\tesp_ipv6 = (struct rte_ipv6_hdr *)\n+\t\t\t\t\t(raw_pkt + len);\n+\t\t\t\tesp = (struct rte_flow_item_esp *)esp_ipv6;\n+\t\t\t\tesp->hdr.spi =\n+\t\t\t\t\tfdir_input->flow.esp_ipv6_flow.spi;\n+\t\t\t\tpayload = (unsigned char *)esp +\n+\t\t\t\t\tsizeof(struct rte_esp_hdr);\n+\t\t\t\tlen += sizeof(struct rte_esp_hdr);\n+\t\t\t} else if (cus_pctype->index ==\n+\t\t\t\t\tI40E_CUSTOMIZED_ESP_IPV6_UDP) {\n+\t\t\t\tesp_ipv6 = (struct rte_ipv6_hdr *)\n+\t\t\t\t\t(raw_pkt + len);\n+\t\t\t\tudp = (struct rte_udp_hdr *)esp_ipv6;\n+\t\t\t\tudp->dst_port =\trte_cpu_to_be_16\n+\t\t\t\t\t(I40E_FDIR_ESP_DST_PORT);\n+\n+\t\t\t\tudp->dgram_len = rte_cpu_to_be_16\n+\t\t\t\t\t(I40E_FDIR_UDP_DEFAULT_LEN);\n+\t\t\t\tesp = (struct rte_flow_item_esp *)\n+\t\t\t\t\t((unsigned char *)esp_ipv6 +\n+\t\t\t\t\t\tsizeof(struct rte_udp_hdr));\n+\t\t\t\tesp->hdr.spi =\n+\t\t\t\t\tfdir_input->flow.esp_ipv6_udp_flow.spi;\n+\t\t\t\tpayload = (unsigned char *)esp +\n+\t\t\t\t\tsizeof(struct rte_esp_hdr);\n+\t\t\t\tlen += sizeof(struct rte_udp_hdr) +\n+\t\t\t\t\t\tsizeof(struct rte_esp_hdr);\n+\t\t\t}\n \t\t}\n \t} else {\n-\t\tPMD_DRV_LOG(ERR, \"unknown pctype %u.\",\n-\t\t\t    fdir_input->pctype);\n+\t\tPMD_DRV_LOG(ERR, \"unknown pctype %u.\", fdir_input->pctype);\n \t\treturn -1;\n \t}\n \n@@ -1305,7 +1415,7 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf,\n \t\t\t\t &fdir_input->flow_ext.flexbytes[dst],\n \t\t\t\t size * sizeof(uint16_t));\n \t}\n-\n+\trte_hexdump(stdout, NULL, raw_pkt, len);\n \treturn 0;\n }\n \ndiff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c\nindex 6102103..c585d8b 100644\n--- a/drivers/net/i40e/i40e_flow.c\n+++ b/drivers/net/i40e/i40e_flow.c\n@@ -110,8 +110,7 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf,\n static int i40e_flow_flush_fdir_filter(struct i40e_pf *pf);\n static int i40e_flow_flush_ethertype_filter(struct i40e_pf *pf);\n static int i40e_flow_flush_tunnel_filter(struct i40e_pf *pf);\n-static int\n-i40e_flow_flush_rss_filter(struct rte_eth_dev *dev);\n+static int i40e_flow_flush_rss_filter(struct rte_eth_dev *dev);\n static int\n i40e_flow_parse_qinq_filter(struct rte_eth_dev *dev,\n \t\t\t      const struct rte_flow_attr *attr,\n@@ -1615,6 +1614,36 @@ static enum rte_flow_item_type pattern_qinq_1[] = {\n \tRTE_FLOW_ITEM_TYPE_END,\n };\n \n+static enum rte_flow_item_type pattern_fdir_ipv4_esp[] = {\n+\tRTE_FLOW_ITEM_TYPE_ETH,\n+\tRTE_FLOW_ITEM_TYPE_IPV4,\n+\tRTE_FLOW_ITEM_TYPE_ESP,\n+\tRTE_FLOW_ITEM_TYPE_END,\n+};\n+\n+static enum rte_flow_item_type pattern_fdir_ipv6_esp[] = {\n+\tRTE_FLOW_ITEM_TYPE_ETH,\n+\tRTE_FLOW_ITEM_TYPE_IPV6,\n+\tRTE_FLOW_ITEM_TYPE_ESP,\n+\tRTE_FLOW_ITEM_TYPE_END,\n+};\n+\n+static enum rte_flow_item_type pattern_fdir_ipv4_udp_esp[] = {\n+\tRTE_FLOW_ITEM_TYPE_ETH,\n+\tRTE_FLOW_ITEM_TYPE_IPV4,\n+\tRTE_FLOW_ITEM_TYPE_UDP,\n+\tRTE_FLOW_ITEM_TYPE_ESP,\n+\tRTE_FLOW_ITEM_TYPE_END,\n+};\n+\n+static enum rte_flow_item_type pattern_fdir_ipv6_udp_esp[] = {\n+\tRTE_FLOW_ITEM_TYPE_ETH,\n+\tRTE_FLOW_ITEM_TYPE_IPV6,\n+\tRTE_FLOW_ITEM_TYPE_UDP,\n+\tRTE_FLOW_ITEM_TYPE_ESP,\n+\tRTE_FLOW_ITEM_TYPE_END,\n+};\n+\n static struct i40e_valid_pattern i40e_supported_patterns[] = {\n \t/* Ethertype */\n \t{ pattern_ethertype, i40e_flow_parse_ethertype_filter },\n@@ -1628,6 +1657,8 @@ static struct i40e_valid_pattern i40e_supported_patterns[] = {\n \t{ pattern_fdir_ipv4_gtpu, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ipv4_gtpu_ipv4, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ipv4_gtpu_ipv6, i40e_flow_parse_fdir_filter },\n+\t{ pattern_fdir_ipv4_esp, i40e_flow_parse_fdir_filter },\n+\t{ pattern_fdir_ipv4_udp_esp, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ipv6, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ipv6_udp, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ipv6_tcp, i40e_flow_parse_fdir_filter },\n@@ -1636,6 +1667,8 @@ static struct i40e_valid_pattern i40e_supported_patterns[] = {\n \t{ pattern_fdir_ipv6_gtpu, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ipv6_gtpu_ipv4, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ipv6_gtpu_ipv6, i40e_flow_parse_fdir_filter },\n+\t{ pattern_fdir_ipv6_esp, i40e_flow_parse_fdir_filter },\n+\t{ pattern_fdir_ipv6_udp_esp, i40e_flow_parse_fdir_filter },\n \t/* FDIR - support default flow type with flexible payload */\n \t{ pattern_fdir_ethertype_raw_1, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ethertype_raw_2, i40e_flow_parse_fdir_filter },\n@@ -2420,6 +2453,28 @@ i40e_flow_fdir_get_pctype_value(struct i40e_pf *pf,\n \t\t\tcus_pctype = i40e_find_customized_pctype(pf,\n \t\t\t\t\t\t I40E_CUSTOMIZED_GTPU_IPV6);\n \t\tbreak;\n+\tcase RTE_FLOW_ITEM_TYPE_ESP:\n+\t\tif (!filter->input.flow_ext.is_udp) {\n+\t\t\tif (filter->input.flow_ext.oip_type ==\n+\t\t\t\tI40E_FDIR_IPTYPE_IPV4)\n+\t\t\t\tcus_pctype = i40e_find_customized_pctype(pf,\n+\t\t\t\t\t\tI40E_CUSTOMIZED_ESP_IPV4);\n+\t\t\telse if (filter->input.flow_ext.oip_type ==\n+\t\t\t\tI40E_FDIR_IPTYPE_IPV6)\n+\t\t\t\tcus_pctype = i40e_find_customized_pctype(pf,\n+\t\t\t\t\t\tI40E_CUSTOMIZED_ESP_IPV6);\n+\t\t} else {\n+\t\t\tif (filter->input.flow_ext.oip_type ==\n+\t\t\t\tI40E_FDIR_IPTYPE_IPV4)\n+\t\t\t\tcus_pctype = i40e_find_customized_pctype(pf,\n+\t\t\t\t\t\tI40E_CUSTOMIZED_ESP_IPV4_UDP);\n+\t\t\telse if (filter->input.flow_ext.oip_type ==\n+\t\t\t\t\tI40E_FDIR_IPTYPE_IPV6)\n+\t\t\t\tcus_pctype = i40e_find_customized_pctype(pf,\n+\t\t\t\t\t\tI40E_CUSTOMIZED_ESP_IPV6_UDP);\n+\t\t\tfilter->input.flow_ext.is_udp = false;\n+\t\t}\n+\t\tbreak;\n \tdefault:\n \t\tPMD_DRV_LOG(ERR, \"Unsupported item type\");\n \t\tbreak;\n@@ -2431,6 +2486,30 @@ i40e_flow_fdir_get_pctype_value(struct i40e_pf *pf,\n \treturn I40E_FILTER_PCTYPE_INVALID;\n }\n \n+static void\n+i40e_flow_set_filter_spi(struct i40e_fdir_filter_conf *filter,\n+\tconst struct rte_flow_item_esp *esp_spec)\n+{\n+\tif (filter->input.flow_ext.oip_type ==\n+\t\tI40E_FDIR_IPTYPE_IPV4) {\n+\t\tif (filter->input.flow_ext.is_udp)\n+\t\t\tfilter->input.flow.esp_ipv4_udp_flow.spi =\n+\t\t\t\tesp_spec->hdr.spi;\n+\t\telse\n+\t\t\tfilter->input.flow.esp_ipv4_flow.spi =\n+\t\t\t\tesp_spec->hdr.spi;\n+\t}\n+\tif (filter->input.flow_ext.oip_type ==\n+\t\tI40E_FDIR_IPTYPE_IPV6) {\n+\t\tif (filter->input.flow_ext.is_udp)\n+\t\t\tfilter->input.flow.esp_ipv6_udp_flow.spi =\n+\t\t\t\tesp_spec->hdr.spi;\n+\t\telse\n+\t\t\tfilter->input.flow.esp_ipv6_flow.spi =\n+\t\t\t\tesp_spec->hdr.spi;\n+\t}\n+}\n+\n /* 1. Last in item should be NULL as range is not supported.\n  * 2. Supported patterns: refer to array i40e_supported_patterns.\n  * 3. Default supported flow type and input set: refer to array\n@@ -2459,6 +2538,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \tconst struct rte_flow_item_udp *udp_spec, *udp_mask;\n \tconst struct rte_flow_item_sctp *sctp_spec, *sctp_mask;\n \tconst struct rte_flow_item_gtp *gtp_spec, *gtp_mask;\n+\tconst struct rte_flow_item_esp *esp_spec, *esp_mask;\n \tconst struct rte_flow_item_raw *raw_spec, *raw_mask;\n \tconst struct rte_flow_item_vf *vf_spec;\n \n@@ -2654,10 +2734,18 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\t\t\tipv4_spec->hdr.src_addr;\n \t\t\t\tfilter->input.flow.ip4_flow.dst_ip =\n \t\t\t\t\tipv4_spec->hdr.dst_addr;\n+\n+\t\t\t\tfilter->input.flow_ext.inner_ip = false;\n+\t\t\t\tfilter->input.flow_ext.oip_type =\n+\t\t\t\t\tI40E_FDIR_IPTYPE_IPV4;\n \t\t\t} else if (!ipv4_spec && !ipv4_mask && !outer_ip) {\n \t\t\t\tfilter->input.flow_ext.inner_ip = true;\n \t\t\t\tfilter->input.flow_ext.iip_type =\n \t\t\t\t\tI40E_FDIR_IPTYPE_IPV4;\n+\t\t\t} else if (!ipv4_spec && !ipv4_mask && outer_ip) {\n+\t\t\t\tfilter->input.flow_ext.inner_ip = false;\n+\t\t\t\tfilter->input.flow_ext.oip_type =\n+\t\t\t\t\tI40E_FDIR_IPTYPE_IPV4;\n \t\t\t} else if ((ipv4_spec || ipv4_mask) && !outer_ip) {\n \t\t\t\trte_flow_error_set(error, EINVAL,\n \t\t\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM,\n@@ -2716,6 +2804,10 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\t\tfilter->input.flow.ipv6_flow.hop_limits =\n \t\t\t\t\tipv6_spec->hdr.hop_limits;\n \n+\t\t\t\tfilter->input.flow_ext.inner_ip = false;\n+\t\t\t\tfilter->input.flow_ext.oip_type =\n+\t\t\t\t\tI40E_FDIR_IPTYPE_IPV6;\n+\n \t\t\t\trte_memcpy(filter->input.flow.ipv6_flow.src_ip,\n \t\t\t\t\t   ipv6_spec->hdr.src_addr, 16);\n \t\t\t\trte_memcpy(filter->input.flow.ipv6_flow.dst_ip,\n@@ -2729,6 +2821,10 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\t\tfilter->input.flow_ext.inner_ip = true;\n \t\t\t\tfilter->input.flow_ext.iip_type =\n \t\t\t\t\tI40E_FDIR_IPTYPE_IPV6;\n+\t\t\t} else if (!ipv6_spec && !ipv6_mask && outer_ip) {\n+\t\t\t\tfilter->input.flow_ext.inner_ip = false;\n+\t\t\t\tfilter->input.flow_ext.oip_type =\n+\t\t\t\t\tI40E_FDIR_IPTYPE_IPV6;\n \t\t\t} else if ((ipv6_spec || ipv6_mask) && !outer_ip) {\n \t\t\t\trte_flow_error_set(error, EINVAL,\n \t\t\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM,\n@@ -2828,7 +2924,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\t\t\t\tudp_spec->hdr.dst_port;\n \t\t\t\t}\n \t\t\t}\n-\n+\t\t\tfilter->input.flow_ext.is_udp = true;\n \t\t\tlayer_idx = I40E_FLXPLD_L4_IDX;\n \n \t\t\tbreak;\n@@ -2863,6 +2959,39 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\t\tcus_proto = item_type;\n \t\t\t}\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_ESP:\n+\t\t\tif (!pf->esp_support) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t   item,\n+\t\t\t\t\t\t   \"Unsupported ESP protocol\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\n+\t\t\tesp_spec = item->spec;\n+\t\t\tesp_mask = item->mask;\n+\n+\t\t\tif (!esp_spec || !esp_mask) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t   item,\n+\t\t\t\t\t\t   \"Invalid ESP item\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\n+\t\t\tif (esp_spec && esp_mask) {\n+\t\t\t\tif (esp_mask->hdr.spi != UINT32_MAX) {\n+\t\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t   item,\n+\t\t\t\t\t\t   \"Invalid ESP mask\");\n+\t\t\t\t\treturn -rte_errno;\n+\t\t\t\t}\n+\t\t\t\ti40e_flow_set_filter_spi(filter, esp_spec);\n+\t\t\t\tfilter->input.flow_ext.customized_pctype = true;\n+\t\t\t\tcus_proto = item_type;\n+\t\t\t}\n+\t\t\tbreak;\n \t\tcase RTE_FLOW_ITEM_TYPE_SCTP:\n \t\t\tsctp_spec = item->spec;\n \t\t\tsctp_mask = item->mask;\n",
    "prefixes": [
        "v3",
        "5/9"
    ]
}