Patch Detail

HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 63681,
    "url": "http://patches.dpdk.org/api/patches/63681/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20191209214656.27347-5-cardigliano@ntop.org/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20191209214656.27347-5-cardigliano@ntop.org>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20191209214656.27347-5-cardigliano@ntop.org",
    "date": "2019-12-09T21:46:43",
    "name": "[v3,04/17] net/ionic: register and initialize the adapter",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "5b52966bac8b22e5ed6886b662b8597a00d259d6",
    "submitter": {
        "id": 1465,
        "url": "http://patches.dpdk.org/api/people/1465/?format=api",
        "name": "Alfredo Cardigliano",
        "email": "cardigliano@ntop.org"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20191209214656.27347-5-cardigliano@ntop.org/mbox/",
    "series": [
        {
            "id": 7760,
            "url": "http://patches.dpdk.org/api/series/7760/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7760",
            "date": "2019-12-09T21:46:39",
            "name": "Introduces net/ionic PMD",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/7760/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/63681/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/63681/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 90BB7A04B3;\n\tMon,  9 Dec 2019 22:49:20 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D52E01BF7E;\n\tMon,  9 Dec 2019 22:48:42 +0100 (CET)",
            "from mail.ntop.org (mail-digitalocean.ntop.org [167.99.215.164])\n by dpdk.org (Postfix) with ESMTP id CDCA31F5\n for <dev@dpdk.org>; Mon,  9 Dec 2019 22:48:30 +0100 (CET)",
            "from devele.ntop.org (net-93-145-196-230.cust.vodafonedsl.it\n [93.145.196.230])\n by mail.ntop.org (Postfix) with ESMTPSA id 6C0B54090E;\n Mon,  9 Dec 2019 22:48:30 +0100 (CET)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=ntop.org; s=mail;\n t=1575928110; bh=hZLc/sr5FU1TVkzGEdbEG0Zl6py7UGgiOzOvrCEgc4k=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=g+NdKdrFdUoh3tBhLT4eGa4UKOLCEOLQzU4g+zzDgL7ULwioIhrFQQ8b71rS8Qjg3\n MwWca/UhY01U6G2KNC6PtLl2Uw2zVJs4EzRh890kO+DrJXuHrldG3ApfrqUJXkH/AX\n wW5nhOzfXgsxBbh8Z3urRIdCTRujEVocNCmGXtzw=",
        "From": "Alfredo Cardigliano <cardigliano@ntop.org>",
        "To": "Alfredo Cardigliano <cardigliano@ntop.org>,\n John McNamara <john.mcnamara@intel.com>,\n Marko Kovacevic <marko.kovacevic@intel.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>",
        "Cc": "dev@dpdk.org",
        "Date": "Mon,  9 Dec 2019 22:46:43 +0100",
        "Message-Id": "<20191209214656.27347-5-cardigliano@ntop.org>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20191209214656.27347-1-cardigliano@ntop.org>",
        "References": "<20191209214656.27347-1-cardigliano@ntop.org>",
        "Subject": "[dpdk-dev] [PATCH v3 04/17] net/ionic: register and initialize the\n\tadapter",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Register the Pensando ionic PMD (net_ionic) and define initial probe\nand remove callbacks with adapter initialization.\n\nSigned-off-by: Alfredo Cardigliano <cardigliano@ntop.org>\nReviewed-by: Shannon Nelson <snelson@pensando.io>\n---\n doc/guides/nics/features/ionic.ini |   2 +\n drivers/net/ionic/Makefile         |   3 +\n drivers/net/ionic/ionic.h          |  63 +++++++++++++\n drivers/net/ionic/ionic_dev.c      | 134 ++++++++++++++++++++++++++\n drivers/net/ionic/ionic_dev.h      | 127 +++++++++++++++++++++++++\n drivers/net/ionic/ionic_ethdev.c   | 146 +++++++++++++++++++++++++++++\n drivers/net/ionic/ionic_mac_api.c  |  61 ++++++++++++\n drivers/net/ionic/ionic_mac_api.h  |  13 +++\n drivers/net/ionic/ionic_main.c     | 133 ++++++++++++++++++++++++++\n drivers/net/ionic/ionic_osdep.h    |  79 ++++++++++++++++\n drivers/net/ionic/ionic_regs.h     | 142 ++++++++++++++++++++++++++++\n drivers/net/ionic/meson.build      |   4 +\n 12 files changed, 907 insertions(+)\n create mode 100644 drivers/net/ionic/ionic.h\n create mode 100644 drivers/net/ionic/ionic_dev.c\n create mode 100644 drivers/net/ionic/ionic_dev.h\n create mode 100644 drivers/net/ionic/ionic_mac_api.c\n create mode 100644 drivers/net/ionic/ionic_mac_api.h\n create mode 100644 drivers/net/ionic/ionic_main.c\n create mode 100644 drivers/net/ionic/ionic_osdep.h\n create mode 100644 drivers/net/ionic/ionic_regs.h",
    "diff": "diff --git a/doc/guides/nics/features/ionic.ini b/doc/guides/nics/features/ionic.ini\nindex 3a92eedc7..6915d9c42 100644\n--- a/doc/guides/nics/features/ionic.ini\n+++ b/doc/guides/nics/features/ionic.ini\n@@ -4,5 +4,7 @@\n ; Refer to default.ini for the full list of available PMD features.\n ;\n [Features]\n+Linux UIO            = Y\n+Linux VFIO           = Y\n x86-64               = Y\n Usage doc            = Y\ndiff --git a/drivers/net/ionic/Makefile b/drivers/net/ionic/Makefile\nindex 4c1c8d129..a3ad25897 100644\n--- a/drivers/net/ionic/Makefile\n+++ b/drivers/net/ionic/Makefile\n@@ -33,6 +33,9 @@ endif\n #\n # all source are stored in SRCS-y\n #\n+SRCS-$(CONFIG_RTE_LIBRTE_IONIC_PMD) += ionic_mac_api.c\n+SRCS-$(CONFIG_RTE_LIBRTE_IONIC_PMD) += ionic_dev.c\n SRCS-$(CONFIG_RTE_LIBRTE_IONIC_PMD) += ionic_ethdev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_IONIC_PMD) += ionic_main.c\n \n include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/net/ionic/ionic.h b/drivers/net/ionic/ionic.h\nnew file mode 100644\nindex 000000000..5c869e698\n--- /dev/null\n+++ b/drivers/net/ionic/ionic.h\n@@ -0,0 +1,63 @@\n+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)\n+ * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.\n+ */\n+\n+#ifndef _IONIC_H_\n+#define _IONIC_H_\n+\n+#include <stdint.h>\n+\n+#include \"ionic_dev.h\"\n+#include \"ionic_if.h\"\n+#include \"ionic_osdep.h\"\n+\n+#define IONIC_DRV_NAME\t\t\t\"ionic\"\n+#define IONIC_DRV_DESCRIPTION\t\t\"Pensando Ethernet NIC Driver\"\n+#define IONIC_DRV_VERSION\t\t\"0.11.0-49\"\n+\n+/* Vendor ID */\n+#define IONIC_PENSANDO_VENDOR_ID\t0x1dd8\n+\n+/* Device IDs */\n+#define IONIC_DEV_ID_ETH_PF\t\t0x1002\n+#define IONIC_DEV_ID_ETH_VF\t\t0x1003\n+#define IONIC_DEV_ID_ETH_MGMT\t\t0x1004\n+\n+enum ionic_mac_type {\n+\tIONIC_MAC_UNKNOWN = 0,\n+\tIONIC_MAC_CAPRI,\n+\tIONIC_NUM_MACS\n+};\n+\n+struct ionic_mac_info {\n+\tenum ionic_mac_type type;\n+};\n+\n+struct ionic_hw {\n+\tstruct ionic_mac_info mac;\n+\tuint16_t device_id;\n+\tuint16_t vendor_id;\n+};\n+\n+/*\n+ * Structure to store private data for each driver instance (for each adapter).\n+ */\n+struct ionic_adapter {\n+\tstruct ionic_hw hw;\n+\tstruct ionic_dev idev;\n+\tstruct ionic_dev_bar bars[IONIC_BARS_MAX];\n+\tstruct ionic_identity\tident;\n+\tuint32_t num_bars;\n+\tbool is_mgmt_nic;\n+\tstruct rte_pci_device *pci_dev;\n+\tLIST_ENTRY(ionic_adapter) pci_adapters;\n+};\n+\n+int ionic_dev_cmd_wait_check(struct ionic_dev *idev, unsigned long max_wait);\n+int ionic_setup(struct ionic_adapter *adapter);\n+\n+int ionic_identify(struct ionic_adapter *adapter);\n+int ionic_init(struct ionic_adapter *adapter);\n+int ionic_reset(struct ionic_adapter *adapter);\n+\n+#endif /* _IONIC_H_ */\ndiff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c\nnew file mode 100644\nindex 000000000..406236da9\n--- /dev/null\n+++ b/drivers/net/ionic/ionic_dev.c\n@@ -0,0 +1,134 @@\n+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)\n+ * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.\n+ */\n+\n+#include <rte_malloc.h>\n+\n+#include \"ionic_dev.h\"\n+#include \"ionic.h\"\n+\n+int\n+ionic_dev_setup(struct ionic_adapter *adapter)\n+{\n+\tstruct ionic_dev_bar *bar = adapter->bars;\n+\tunsigned int num_bars = adapter->num_bars;\n+\tstruct ionic_dev *idev = &adapter->idev;\n+\tuint32_t sig;\n+\tu_char *bar0_base;\n+\n+\t/* BAR0: dev_cmd and interrupts */\n+\tif (num_bars < 1) {\n+\t\tIONIC_PRINT(ERR, \"No bars found, aborting\");\n+\t\treturn -EFAULT;\n+\t}\n+\n+\tif (bar->len < IONIC_BAR0_SIZE) {\n+\t\tIONIC_PRINT(ERR,\n+\t\t\t\"Resource bar size %lu too small, aborting\",\n+\t\t\tbar->len);\n+\t\treturn -EFAULT;\n+\t}\n+\n+\tbar0_base = bar->vaddr;\n+\tidev->dev_info = (union ionic_dev_info_regs*)\n+\t\t&bar0_base[IONIC_BAR0_DEV_INFO_REGS_OFFSET];\n+\tidev->dev_cmd = (union ionic_dev_cmd_regs*)\n+\t\t&bar0_base[IONIC_BAR0_DEV_CMD_REGS_OFFSET];\n+\tidev->intr_status = (struct ionic_intr_status*)\n+\t\t&bar0_base[IONIC_BAR0_INTR_STATUS_OFFSET];\n+\tidev->intr_ctrl = (struct ionic_intr*)\n+\t\t&bar0_base[IONIC_BAR0_INTR_CTRL_OFFSET];\n+\n+\tsig = ioread32(&idev->dev_info->signature);\n+\tif (sig != IONIC_DEV_INFO_SIGNATURE) {\n+\t\tIONIC_PRINT(ERR, \"Incompatible firmware signature %x\",\n+\t\t\tsig);\n+\t\treturn -EFAULT;\n+\t}\n+\n+\t/* BAR1: doorbells */\n+\tbar++;\n+\tif (num_bars < 2) {\n+\t\tIONIC_PRINT(ERR, \"Doorbell bar missing, aborting\");\n+\t\treturn -EFAULT;\n+\t}\n+\n+\tidev->db_pages = bar->vaddr;\n+\tidev->phy_db_pages = bar->bus_addr;\n+\n+\treturn 0;\n+}\n+\n+/* Devcmd Interface */\n+\n+uint8_t\n+ionic_dev_cmd_status(struct ionic_dev *idev)\n+{\n+\treturn ioread8(&idev->dev_cmd->comp.comp.status);\n+}\n+\n+bool\n+ionic_dev_cmd_done(struct ionic_dev *idev)\n+{\n+\treturn ioread32(&idev->dev_cmd->done) & IONIC_DEV_CMD_DONE;\n+}\n+\n+void\n+ionic_dev_cmd_comp(struct ionic_dev *idev, void *mem)\n+{\n+\tunion ionic_dev_cmd_comp *comp = mem;\n+\tunsigned int i;\n+\tuint32_t comp_size = sizeof(comp->words) /\n+\t\tsizeof(comp->words[0]);\n+\n+\tfor (i = 0; i < comp_size; i++)\n+\t\tcomp->words[i] = ioread32(&idev->dev_cmd->comp.words[i]);\n+}\n+\n+void\n+ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd)\n+{\n+\tunsigned int i;\n+\tuint32_t cmd_size = sizeof(cmd->words) /\n+\t\tsizeof(cmd->words[0]);\n+\n+\tfor (i = 0; i < cmd_size; i++)\n+\t\tiowrite32(cmd->words[i], &idev->dev_cmd->cmd.words[i]);\n+\n+\tiowrite32(0, &idev->dev_cmd->done);\n+\tiowrite32(1, &idev->dev_cmd->doorbell);\n+}\n+\n+/* Device commands */\n+\n+void\n+ionic_dev_cmd_identify(struct ionic_dev *idev, uint8_t ver)\n+{\n+\tunion ionic_dev_cmd cmd = {\n+\t\t.identify.opcode = IONIC_CMD_IDENTIFY,\n+\t\t.identify.ver = ver,\n+\t};\n+\n+\tionic_dev_cmd_go(idev, &cmd);\n+}\n+\n+void\n+ionic_dev_cmd_init(struct ionic_dev *idev)\n+{\n+\tunion ionic_dev_cmd cmd = {\n+\t\t.init.opcode = IONIC_CMD_INIT,\n+\t\t.init.type = 0,\n+\t};\n+\n+\tionic_dev_cmd_go(idev, &cmd);\n+}\n+\n+void\n+ionic_dev_cmd_reset(struct ionic_dev *idev)\n+{\n+\tunion ionic_dev_cmd cmd = {\n+\t\t.reset.opcode = IONIC_CMD_RESET,\n+\t};\n+\n+\tionic_dev_cmd_go(idev, &cmd);\n+}\ndiff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h\nnew file mode 100644\nindex 000000000..82a3cdb70\n--- /dev/null\n+++ b/drivers/net/ionic/ionic_dev.h\n@@ -0,0 +1,127 @@\n+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)\n+ * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.\n+ */\n+\n+#ifndef _IONIC_DEV_H_\n+#define _IONIC_DEV_H_\n+\n+#include \"ionic_osdep.h\"\n+#include \"ionic_if.h\"\n+#include \"ionic_regs.h\"\n+\n+#define IONIC_DEVCMD_TIMEOUT\t30 /* devcmd_timeout */\n+\n+struct ionic_adapter;\n+\n+struct ionic_dev_bar {\n+\tvoid __iomem *vaddr;\n+\trte_iova_t bus_addr;\n+\tunsigned long len;\n+};\n+\n+static inline void ionic_struct_size_checks(void)\n+{\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_doorbell) != 8);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_intr) != 32);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_intr_status) != 8);\n+\n+\tRTE_BUILD_BUG_ON(sizeof(union ionic_dev_regs) != 4096);\n+\tRTE_BUILD_BUG_ON(sizeof(union ionic_dev_info_regs) != 2048);\n+\tRTE_BUILD_BUG_ON(sizeof(union ionic_dev_cmd_regs) != 2048);\n+\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_lif_stats) != 1024);\n+\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_admin_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_admin_comp) != 16);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_nop_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_nop_comp) != 16);\n+\n+\t/* Device commands */\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_dev_identify_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_dev_identify_comp) != 16);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_dev_init_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_dev_init_comp) != 16);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_dev_reset_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_dev_reset_comp) != 16);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_dev_getattr_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_dev_getattr_comp) != 16);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_dev_setattr_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_dev_setattr_comp) != 16);\n+\n+\t/* Port commands */\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_port_identify_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_port_identify_comp) != 16);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_port_init_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_port_init_comp) != 16);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_port_reset_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_port_reset_comp) != 16);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_port_getattr_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_port_getattr_comp) != 16);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_port_setattr_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_port_setattr_comp) != 16);\n+\n+\t/* LIF commands */\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_lif_init_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_lif_init_comp) != 16);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_lif_reset_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_lif_getattr_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_lif_getattr_comp) != 16);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_lif_setattr_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_lif_setattr_comp) != 16);\n+\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_q_init_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_q_init_comp) != 16);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_q_control_cmd) != 64);\n+\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_rx_mode_set_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_add_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_add_comp) != 16);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_del_cmd) != 64);\n+\n+\t/* RDMA commands */\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_rdma_reset_cmd) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_rdma_queue_cmd) != 64);\n+\n+\t/* Events */\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_notifyq_cmd) != 4);\n+\tRTE_BUILD_BUG_ON(sizeof(union ionic_notifyq_comp) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_notifyq_event) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_link_change_event) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_reset_event) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_heartbeat_event) != 64);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_log_event) != 64);\n+\n+\t/* I/O */\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_txq_desc) != 16);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_txq_sg_desc) != 128);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_txq_comp) != 16);\n+\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_desc) != 16);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_sg_desc) != 128);\n+\tRTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_comp) != 16);\n+}\n+\n+struct ionic_dev {\n+\tunion ionic_dev_info_regs __iomem *dev_info;\n+\tunion ionic_dev_cmd_regs __iomem *dev_cmd;\n+\n+\tstruct ionic_doorbell __iomem *db_pages;\n+\trte_iova_t phy_db_pages;\n+\n+\tstruct ionic_intr __iomem *intr_ctrl;\n+\n+\tstruct ionic_intr_status __iomem *intr_status;\n+};\n+\n+int ionic_dev_setup(struct ionic_adapter *adapter);\n+\n+void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd);\n+uint8_t ionic_dev_cmd_status(struct ionic_dev *idev);\n+bool ionic_dev_cmd_done(struct ionic_dev *idev);\n+void ionic_dev_cmd_comp(struct ionic_dev *idev, void *mem);\n+\n+void ionic_dev_cmd_identify(struct ionic_dev *idev, uint8_t ver);\n+void ionic_dev_cmd_init(struct ionic_dev *idev);\n+void ionic_dev_cmd_reset(struct ionic_dev *idev);\n+\n+#endif /* _IONIC_DEV_H_ */\ndiff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c\nindex c706588bc..23c6ef17c 100644\n--- a/drivers/net/ionic/ionic_ethdev.c\n+++ b/drivers/net/ionic/ionic_ethdev.c\n@@ -2,10 +2,156 @@\n  * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.\n  */\n \n+#include <rte_pci.h>\n+#include <rte_bus_pci.h>\n+#include <rte_ethdev.h>\n+#include <rte_ethdev_driver.h>\n+#include <rte_malloc.h>\n+\n #include \"ionic_logs.h\"\n+#include \"ionic.h\"\n+#include \"ionic_dev.h\"\n+#include \"ionic_mac_api.h\"\n \n int ionic_logtype_driver;\n \n+static const struct rte_pci_id pci_id_ionic_map[] = {\n+\t{ RTE_PCI_DEVICE(IONIC_PENSANDO_VENDOR_ID, IONIC_DEV_ID_ETH_PF) },\n+\t{ RTE_PCI_DEVICE(IONIC_PENSANDO_VENDOR_ID, IONIC_DEV_ID_ETH_VF) },\n+\t{ RTE_PCI_DEVICE(IONIC_PENSANDO_VENDOR_ID, IONIC_DEV_ID_ETH_MGMT) },\n+\t{ .vendor_id = 0, /* sentinel */ },\n+};\n+\n+/*\n+ * There is no room in struct rte_pci_driver to keep a reference\n+ * to the adapter, using a static list for the time being.\n+ */\n+static LIST_HEAD(ionic_pci_adapters_list, ionic_adapter) ionic_pci_adapters =\n+\t\tLIST_HEAD_INITIALIZER(ionic_pci_adapters);\n+static rte_spinlock_t ionic_pci_adapters_lock = RTE_SPINLOCK_INITIALIZER;\n+\n+static int\n+eth_ionic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n+\t\tstruct rte_pci_device *pci_dev)\n+{\n+\tstruct rte_mem_resource *resource;\n+\tstruct ionic_adapter *adapter;\n+\tstruct ionic_hw *hw;\n+\tunsigned long i;\n+\tint err;\n+\n+\t/* Check structs (trigger error at compilation time) */\n+\tionic_struct_size_checks();\n+\n+\t/* Multi-process not supported */\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY) {\n+\t\terr = -EPERM;\n+\t\tgoto err;\n+\t}\n+\n+\tIONIC_PRINT(DEBUG, \"Initializing device %s\",\n+\t\tpci_dev->device.name);\n+\n+\tadapter = rte_zmalloc(\"ionic\", sizeof(*adapter), 0);\n+\n+\tif (!adapter) {\n+\t\tIONIC_PRINT(ERR, \"OOM\");\n+\t\terr = -ENOMEM;\n+\t\tgoto err;\n+\t}\n+\n+\tadapter->pci_dev = pci_dev;\n+\thw = &adapter->hw;\n+\n+\thw->device_id = pci_dev->id.device_id;\n+\thw->vendor_id = pci_dev->id.vendor_id;\n+\n+\terr = ionic_init_mac(hw);\n+\tif (err != 0) {\n+\t\tIONIC_PRINT(ERR, \"Mac init failed: %d\", err);\n+\t\terr = -EIO;\n+\t\tgoto err_free_adapter;\n+\t}\n+\n+\tadapter->is_mgmt_nic = (pci_dev->id.device_id == IONIC_DEV_ID_ETH_MGMT);\n+\n+\tadapter->num_bars = 0;\n+\tfor (i = 0; i < PCI_MAX_RESOURCE && i < IONIC_BARS_MAX; i++) {\n+\t\tresource = &pci_dev->mem_resource[i];\n+\t\tif (resource->phys_addr == 0 || resource->len == 0)\n+\t\t\tcontinue;\n+\t\tadapter->bars[adapter->num_bars].vaddr = resource->addr;\n+\t\tadapter->bars[adapter->num_bars].bus_addr = resource->phys_addr;\n+\t\tadapter->bars[adapter->num_bars].len = resource->len;\n+\t\tadapter->num_bars++;\n+\t}\n+\n+\t/* Discover ionic dev resources */\n+\n+\terr = ionic_setup(adapter);\n+\tif (err) {\n+\t\tIONIC_PRINT(ERR, \"Cannot setup device: %d, aborting\", err);\n+\t\tgoto err_free_adapter;\n+\t}\n+\n+\terr = ionic_identify(adapter);\n+\tif (err) {\n+\t\tIONIC_PRINT(ERR, \"Cannot identify device: %d, aborting\",\n+\t\t\terr);\n+\t\tgoto err_free_adapter;\n+\t}\n+\n+\terr = ionic_init(adapter);\n+\tif (err) {\n+\t\tIONIC_PRINT(ERR, \"Cannot init device: %d, aborting\", err);\n+\t\tgoto err_free_adapter;\n+\t}\n+\n+\trte_spinlock_lock(&ionic_pci_adapters_lock);\n+\tLIST_INSERT_HEAD(&ionic_pci_adapters, adapter, pci_adapters);\n+\trte_spinlock_unlock(&ionic_pci_adapters_lock);\n+\n+\treturn 0;\n+\n+err_free_adapter:\n+\trte_free(adapter);\n+err:\n+\treturn err;\n+}\n+\n+static int\n+eth_ionic_pci_remove(struct rte_pci_device *pci_dev)\n+{\n+\tstruct ionic_adapter *adapter = NULL;\n+\n+\trte_spinlock_lock(&ionic_pci_adapters_lock);\n+\tLIST_FOREACH(adapter, &ionic_pci_adapters, pci_adapters) {\n+\t\tif (adapter->pci_dev == pci_dev)\n+\t\t\tbreak;\n+\n+\t\tadapter = NULL;\n+\t}\n+\tif (adapter)\n+\t\tLIST_REMOVE(adapter, pci_adapters);\n+\trte_spinlock_unlock(&ionic_pci_adapters_lock);\n+\n+\tif (adapter)\n+\t\trte_free(adapter);\n+\n+\treturn 0;\n+}\n+\n+static struct rte_pci_driver rte_ionic_pmd = {\n+\t.id_table = pci_id_ionic_map,\n+\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,\n+\t.probe = eth_ionic_pci_probe,\n+\t.remove = eth_ionic_pci_remove,\n+};\n+\n+RTE_PMD_REGISTER_PCI(net_ionic, rte_ionic_pmd);\n+RTE_PMD_REGISTER_PCI_TABLE(net_ionic, pci_id_ionic_map);\n+RTE_PMD_REGISTER_KMOD_DEP(net_ionic, \"* igb_uio | uio_pci_generic | vfio-pci\");\n+\n RTE_INIT(ionic_init_log)\n {\n \tionic_logtype_driver = rte_log_register(\"pmd.net.ionic.driver\");\ndiff --git a/drivers/net/ionic/ionic_mac_api.c b/drivers/net/ionic/ionic_mac_api.c\nnew file mode 100644\nindex 000000000..0a40c5547\n--- /dev/null\n+++ b/drivers/net/ionic/ionic_mac_api.c\n@@ -0,0 +1,61 @@\n+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)\n+ * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.\n+ */\n+\n+#include \"ionic_mac_api.h\"\n+\n+int32_t\n+ionic_init_mac(struct ionic_hw *hw)\n+{\n+\tint err = 0;\n+\n+\tIONIC_PRINT_CALL();\n+\n+\t/*\n+\t * Set the mac type\n+\t */\n+\tionic_set_mac_type(hw);\n+\n+\tswitch (hw->mac.type) {\n+\tcase IONIC_MAC_CAPRI:\n+\t\tbreak;\n+\tdefault:\n+\t\terr = -EINVAL;\n+\t\tbreak;\n+\t}\n+\n+\treturn err;\n+}\n+\n+int32_t\n+ionic_set_mac_type(struct ionic_hw *hw)\n+{\n+\tint err = 0;\n+\n+\tIONIC_PRINT_CALL();\n+\n+\tif (hw->vendor_id != IONIC_PENSANDO_VENDOR_ID) {\n+\t\tIONIC_PRINT(ERR, \"Unsupported vendor id: %x\",\n+\t\t\thw->vendor_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tswitch (hw->device_id) {\n+\tcase IONIC_DEV_ID_ETH_PF:\n+\tcase IONIC_DEV_ID_ETH_VF:\n+\tcase IONIC_DEV_ID_ETH_MGMT:\n+\t\thw->mac.type = IONIC_MAC_CAPRI;\n+\t\tbreak;\n+\tdefault:\n+\t\terr = -EINVAL;\n+\t\tIONIC_PRINT(ERR, \"Unsupported device id: %x\",\n+\t\t\thw->device_id);\n+\t\tbreak;\n+\t}\n+\n+\tIONIC_PRINT(INFO, \"Mac: %d (%d)\",\n+\t\thw->mac.type, err);\n+\n+\treturn err;\n+}\n+\ndiff --git a/drivers/net/ionic/ionic_mac_api.h b/drivers/net/ionic/ionic_mac_api.h\nnew file mode 100644\nindex 000000000..ed9e059a6\n--- /dev/null\n+++ b/drivers/net/ionic/ionic_mac_api.h\n@@ -0,0 +1,13 @@\n+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)\n+ * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.\n+ */\n+\n+#ifndef _IONIC_API_H_\n+#define _IONIC_API_H_\n+\n+#include \"ionic.h\"\n+\n+int32_t ionic_init_mac(struct ionic_hw *hw);\n+int32_t ionic_set_mac_type(struct ionic_hw *hw);\n+\n+#endif /* _IONIC_API_H_ */\ndiff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c\nnew file mode 100644\nindex 000000000..572316c84\n--- /dev/null\n+++ b/drivers/net/ionic/ionic_main.c\n@@ -0,0 +1,133 @@\n+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)\n+ * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.\n+ */\n+\n+#include \"ionic.h\"\n+\n+static int\n+ionic_dev_cmd_wait(struct ionic_dev *idev, unsigned long max_wait)\n+{\n+\tunsigned long step_msec = 100;\n+\tunsigned int max_wait_msec = max_wait * 1000;\n+\tunsigned long elapsed_msec = 0;\n+\tint done;\n+\n+\t/* Wait for dev cmd to complete.. but no more than max_wait sec */\n+\n+\tdo {\n+\t\tdone = ionic_dev_cmd_done(idev);\n+\n+\t\tif (done) {\n+\t\t\tIONIC_PRINT(DEBUG, \"DEVCMD %d done took %ld msecs\",\n+\t\t\t\tidev->dev_cmd->cmd.cmd.opcode,\n+\t\t\t\telapsed_msec);\n+\t\t\treturn 0;\n+\t\t}\n+\n+\t\tmsec_delay(step_msec);\n+\n+\t\telapsed_msec += step_msec;\n+\t} while (elapsed_msec < max_wait_msec);\n+\n+\tIONIC_PRINT(DEBUG, \"DEVCMD %d timeout after %ld msecs\",\n+\t\tidev->dev_cmd->cmd.cmd.opcode,\n+\t\telapsed_msec);\n+\n+\treturn -ETIMEDOUT;\n+}\n+\n+static int\n+ionic_dev_cmd_check_error(struct ionic_dev *idev)\n+{\n+\tuint8_t status;\n+\n+\tstatus = ionic_dev_cmd_status(idev);\n+\n+\tif (status == 0)\n+\t\treturn 0;\n+\n+\treturn -EIO;\n+}\n+\n+int\n+ionic_dev_cmd_wait_check(struct ionic_dev *idev, unsigned long max_wait)\n+{\n+\tint err;\n+\n+\terr = ionic_dev_cmd_wait(idev, max_wait);\n+\n+\tif (err)\n+\t\treturn err;\n+\n+\treturn ionic_dev_cmd_check_error(idev);\n+}\n+\n+int\n+ionic_setup(struct ionic_adapter *adapter)\n+{\n+\treturn ionic_dev_setup(adapter);\n+}\n+\n+int\n+ionic_identify(struct ionic_adapter *adapter)\n+{\n+\tstruct ionic_dev *idev = &adapter->idev;\n+\tstruct ionic_identity *ident = &adapter->ident;\n+\tint err = 0;\n+\tuint32_t i;\n+\tunsigned int nwords;\n+\tuint32_t drv_size = sizeof(ident->drv.words) /\n+\t\tsizeof(ident->drv.words[0]);\n+\tuint32_t cmd_size = sizeof(idev->dev_cmd->data) /\n+\t\tsizeof(idev->dev_cmd->data[0]);\n+\tuint32_t dev_size = sizeof(ident->dev.words) /\n+\t\tsizeof(ident->dev.words[0]);\n+\n+\tmemset(ident, 0, sizeof(*ident));\n+\n+\tident->drv.os_type = IONIC_OS_TYPE_LINUX;\n+\tident->drv.os_dist = 0;\n+\tsnprintf(ident->drv.os_dist_str,\n+\t\tsizeof(ident->drv.os_dist_str), \"Unknown\");\n+\tident->drv.kernel_ver = 0;\n+\tsnprintf(ident->drv.kernel_ver_str,\n+\t\tsizeof(ident->drv.kernel_ver_str), \"DPDK\");\n+\tstrncpy(ident->drv.driver_ver_str, IONIC_DRV_VERSION,\n+\t\tsizeof(ident->drv.driver_ver_str) - 1);\n+\n+\tnwords = RTE_MIN(drv_size, cmd_size);\n+\tfor (i = 0; i < nwords; i++)\n+\t\tiowrite32(ident->drv.words[i], &idev->dev_cmd->data[i]);\n+\n+\tionic_dev_cmd_identify(idev, IONIC_IDENTITY_VERSION_1);\n+\terr = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);\n+\tif (!err) {\n+\t\tnwords = RTE_MIN(dev_size, cmd_size);\n+\t\tfor (i = 0; i < nwords; i++)\n+\t\t\tident->dev.words[i] = ioread32(&idev->dev_cmd->data[i]);\n+\t}\n+\n+\treturn err;\n+}\n+\n+int\n+ionic_init(struct ionic_adapter *adapter)\n+{\n+\tstruct ionic_dev *idev = &adapter->idev;\n+\tint err;\n+\n+\tionic_dev_cmd_init(idev);\n+\terr = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);\n+\treturn err;\n+}\n+\n+int\n+ionic_reset(struct ionic_adapter *adapter)\n+{\n+\tstruct ionic_dev *idev = &adapter->idev;\n+\tint err;\n+\n+\tionic_dev_cmd_reset(idev);\n+\terr = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);\n+\treturn err;\n+}\ndiff --git a/drivers/net/ionic/ionic_osdep.h b/drivers/net/ionic/ionic_osdep.h\nnew file mode 100644\nindex 000000000..09a0e85b5\n--- /dev/null\n+++ b/drivers/net/ionic/ionic_osdep.h\n@@ -0,0 +1,79 @@\n+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)\n+ * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.\n+ */\n+\n+#ifndef _IONIC_OSDEP_\n+#define _IONIC_OSDEP_\n+\n+#include <string.h>\n+#include <stdint.h>\n+#include <stdio.h>\n+#include <stdarg.h>\n+\n+#include <rte_common.h>\n+#include <rte_debug.h>\n+#include <rte_cycles.h>\n+#include <rte_log.h>\n+#include <rte_byteorder.h>\n+#include <rte_io.h>\n+#include <rte_memory.h>\n+\n+#include \"ionic_logs.h\"\n+\n+#define DELAY(x) rte_delay_us(x)\n+#define usec_delay(x) DELAY(x)\n+#define msec_delay(x) DELAY(1000 * (x))\n+\n+#define BIT(nr)            (1UL << (nr))\n+#define BIT_ULL(nr)        (1ULL << (nr))\n+#define BITS_TO_LONGS(nr)  div_round_up(nr, 8 * sizeof(long))\n+\n+#ifndef PAGE_SHIFT\n+#define PAGE_SHIFT      12\n+#define PAGE_SIZE       (1 << PAGE_SHIFT)\n+#endif\n+\n+#define __iomem\n+\n+typedef uint8_t\t u8;\n+typedef uint16_t u16;\n+typedef uint32_t u32;\n+typedef uint64_t u64;\n+\n+typedef uint16_t __le16;\n+typedef uint32_t __le32;\n+typedef uint64_t __le64;\n+\n+#ifndef __cplusplus\n+typedef uint8_t bool;\n+#define false   0\n+#define true    1\n+#endif\n+\n+static inline uint32_t div_round_up(uint32_t n, uint32_t d)\n+{\n+\treturn (n + d - 1) / d;\n+}\n+\n+static inline uint16_t ilog2(uint32_t n)\n+{\n+\tuint16_t logv = -1;\n+\n+\tif (n == 0)\n+\t\treturn 0;\n+\n+\twhile (n) {\n+\t\tlogv++;\n+\t\tn >>= 1;\n+\t}\n+\n+\treturn logv;\n+}\n+\n+#define ioread8(reg)\t\trte_read8(reg)\n+#define ioread32(reg)\t\trte_read32(reg)\n+#define iowrite8(value, reg)\trte_write8(value, reg)\n+#define iowrite32(value, reg)\trte_write32(value, reg)\n+#define writeq(value, reg)\trte_write64(value, reg)\n+\n+#endif\ndiff --git a/drivers/net/ionic/ionic_regs.h b/drivers/net/ionic/ionic_regs.h\nnew file mode 100644\nindex 000000000..3adc2bc7c\n--- /dev/null\n+++ b/drivers/net/ionic/ionic_regs.h\n@@ -0,0 +1,142 @@\n+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)\n+ * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.\n+ */\n+\n+#ifndef _IONIC_REGS_H_\n+#define _IONIC_REGS_H_\n+\n+/** struct ionic_intr - interrupt control register set.\n+ * @coal_init:\t\t\tcoalesce timer initial value.\n+ * @mask:\t\t\tinterrupt mask value.\n+ * @credits:\t\t\tinterrupt credit count and return.\n+ * @mask_assert:\t\tinterrupt mask value on assert.\n+ * @coal:\t\t\tcoalesce timer time remaining.\n+ */\n+struct ionic_intr {\n+\tuint32_t coal_init;\n+\tuint32_t mask;\n+\tuint32_t credits;\n+\tuint32_t mask_assert;\n+\tuint32_t coal;\n+\tuint32_t rsvd[3];\n+};\n+\n+#define IONIC_INTR_CTRL_REGS_MAX\t2048\n+#define IONIC_INTR_CTRL_COAL_MAX\t0x3F\n+\n+/** enum ionic_intr_mask_vals - valid values for mask and mask_assert.\n+ * @IONIC_INTR_MASK_CLEAR:\tunmask interrupt.\n+ * @IONIC_INTR_MASK_SET:\tmask interrupt.\n+ */\n+enum ionic_intr_mask_vals {\n+\tIONIC_INTR_MASK_CLEAR\t\t= 0,\n+\tIONIC_INTR_MASK_SET\t\t= 1,\n+};\n+\n+/** enum ionic_intr_credits_bits - bitwise composition of credits values.\n+ * @IONIC_INTR_CRED_COUNT:\tbit mask of credit count, no shift needed.\n+ * @IONIC_INTR_CRED_COUNT_SIGNED: bit mask of credit count, including sign bit.\n+ * @IONIC_INTR_CRED_UNMASK:\tunmask the interrupt.\n+ * @IONIC_INTR_CRED_RESET_COALESCE: reset the coalesce timer.\n+ * @IONIC_INTR_CRED_REARM:\tunmask the and reset the timer.\n+ */\n+enum ionic_intr_credits_bits {\n+\tIONIC_INTR_CRED_COUNT\t\t= 0x7fffu,\n+\tIONIC_INTR_CRED_COUNT_SIGNED\t= 0xffffu,\n+\tIONIC_INTR_CRED_UNMASK\t\t= 0x10000u,\n+\tIONIC_INTR_CRED_RESET_COALESCE\t= 0x20000u,\n+\tIONIC_INTR_CRED_REARM\t\t= (IONIC_INTR_CRED_UNMASK |\n+\t\t\t\t\t   IONIC_INTR_CRED_RESET_COALESCE),\n+};\n+\n+static inline void\n+ionic_intr_coal_init(struct ionic_intr __iomem *intr_ctrl,\n+\t\tint intr_idx, uint32_t coal)\n+{\n+\tiowrite32(coal, &intr_ctrl[intr_idx].coal_init);\n+}\n+\n+static inline void\n+ionic_intr_mask(struct ionic_intr __iomem *intr_ctrl,\n+\t\tint intr_idx, uint32_t mask)\n+{\n+\tiowrite32(mask, &intr_ctrl[intr_idx].mask);\n+}\n+\n+static inline void\n+ionic_intr_credits(struct ionic_intr __iomem *intr_ctrl,\n+\t\tint intr_idx, uint32_t cred, uint32_t flags)\n+{\n+\tif (cred > IONIC_INTR_CRED_COUNT) {\n+\t\tIONIC_WARN_ON(cred > IONIC_INTR_CRED_COUNT);\n+\t\tcred = ioread32(&intr_ctrl[intr_idx].credits);\n+\t\tcred &= IONIC_INTR_CRED_COUNT_SIGNED;\n+\t}\n+\n+\tiowrite32(cred | flags, &intr_ctrl[intr_idx].credits);\n+}\n+\n+static inline void\n+ionic_intr_clean(struct ionic_intr __iomem *intr_ctrl,\n+\t\tint intr_idx)\n+{\n+\tuint32_t cred;\n+\n+\tcred = ioread32(&intr_ctrl[intr_idx].credits);\n+\tcred &= IONIC_INTR_CRED_COUNT_SIGNED;\n+\tcred |= IONIC_INTR_CRED_RESET_COALESCE;\n+\tiowrite32(cred, &intr_ctrl[intr_idx].credits);\n+}\n+\n+static inline void\n+ionic_intr_mask_assert(struct ionic_intr __iomem *intr_ctrl,\n+\t\tint intr_idx, uint32_t mask)\n+{\n+\tiowrite32(mask, &intr_ctrl[intr_idx].mask_assert);\n+}\n+\n+/** enum ionic_dbell_bits - bitwise composition of dbell values.\n+ *\n+ * @IONIC_DBELL_QID_MASK:\tunshifted mask of valid queue id bits.\n+ * @IONIC_DBELL_QID_SHIFT:\tqueue id shift amount in dbell value.\n+ * @IONIC_DBELL_QID:\t\tmacro to build QID component of dbell value.\n+ *\n+ * @IONIC_DBELL_RING_MASK:\tunshifted mask of valid ring bits.\n+ * @IONIC_DBELL_RING_SHIFT:\tring shift amount in dbell value.\n+ * @IONIC_DBELL_RING:\t\tmacro to build ring component of dbell value.\n+ *\n+ * @IONIC_DBELL_RING_0:\t\tring zero dbell component value.\n+ * @IONIC_DBELL_RING_1:\t\tring one dbell component value.\n+ * @IONIC_DBELL_RING_2:\t\tring two dbell component value.\n+ * @IONIC_DBELL_RING_3:\t\tring three dbell component value.\n+ *\n+ * @IONIC_DBELL_INDEX_MASK:\tbit mask of valid index bits, no shift needed.\n+ */\n+enum ionic_dbell_bits {\n+\tIONIC_DBELL_QID_MASK\t\t= 0xffffff,\n+\tIONIC_DBELL_QID_SHIFT\t\t= 24,\n+\n+#define IONIC_DBELL_QID(n) \\\n+\t(((u64)(n) & IONIC_DBELL_QID_MASK) << IONIC_DBELL_QID_SHIFT)\n+\n+\tIONIC_DBELL_RING_MASK\t\t= 0x7,\n+\tIONIC_DBELL_RING_SHIFT\t\t= 16,\n+\n+#define IONIC_DBELL_RING(n) \\\n+\t(((u64)(n) & IONIC_DBELL_RING_MASK) << IONIC_DBELL_RING_SHIFT)\n+\n+\tIONIC_DBELL_RING_0\t\t= 0,\n+\tIONIC_DBELL_RING_1\t\t= IONIC_DBELL_RING(1),\n+\tIONIC_DBELL_RING_2\t\t= IONIC_DBELL_RING(2),\n+\tIONIC_DBELL_RING_3\t\t= IONIC_DBELL_RING(3),\n+\n+\tIONIC_DBELL_INDEX_MASK\t\t= 0xffff,\n+};\n+\n+static inline void\n+ionic_dbell_ring(u64 __iomem *db_page, int qtype, u64 val)\n+{\n+\twriteq(val, &db_page[qtype]);\n+}\n+\n+#endif /* _IONIC_REGS_H_ */\ndiff --git a/drivers/net/ionic/meson.build b/drivers/net/ionic/meson.build\nindex f5e3c36c9..8de34ca5a 100644\n--- a/drivers/net/ionic/meson.build\n+++ b/drivers/net/ionic/meson.build\n@@ -2,6 +2,10 @@\n # Copyright(c) 2019 Pensando\n \n sources = files(\n+\t'ionic_mac_api.c',\n+\t'ionic_dev.c',\n+\t'ionic_ethdev.c',\n+\t'ionic_main.c',\n \t'ionic_ethdev.c'\n )\n \n",
    "prefixes": [
        "v3",
        "04/17"
    ]
}