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GET /api/patches/63661/?format=api
{ "id": 63661, "url": "http://patches.dpdk.org/api/patches/63661/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1575819342-20008-6-git-send-email-mchalla@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1575819342-20008-6-git-send-email-mchalla@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1575819342-20008-6-git-send-email-mchalla@marvell.com", "date": "2019-12-08T15:35:41", "name": "[v1,5/6] raw/octeontx2_ep: add dequeue operation", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "715c87ce2010b80305cbd41f18809f41a74e1b4f", "submitter": { "id": 1532, "url": "http://patches.dpdk.org/api/people/1532/?format=api", "name": "Mahipal Challa", "email": "mchalla@marvell.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1575819342-20008-6-git-send-email-mchalla@marvell.com/mbox/", "series": [ { "id": 7751, "url": "http://patches.dpdk.org/api/series/7751/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7751", "date": "2019-12-08T15:35:36", "name": "OCTEON TX2 End Point Driver", "version": 1, "mbox": "http://patches.dpdk.org/series/7751/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/63661/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/63661/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E1DECA04F1;\n\tSun, 8 Dec 2019 16:37:05 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id AE04F1BFAD;\n\tSun, 8 Dec 2019 16:36:20 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 2C4941BFA4\n for <dev@dpdk.org>; Sun, 8 Dec 2019 16:36:19 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n xB8FUjhU028959 for <dev@dpdk.org>; Sun, 8 Dec 2019 07:36:18 -0800", "from sc-exch02.marvell.com ([199.233.58.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 2wrcfpts1y-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Sun, 08 Dec 2019 07:36:18 -0800", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH02.marvell.com\n (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Sun, 8 Dec\n 2019 07:36:16 -0800", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n Transport; Sun, 8 Dec 2019 07:36:16 -0800", "from hyd1244.marvell.com (hyd1244.marvell.com [10.29.20.28])\n by maili.marvell.com (Postfix) with ESMTP id F30B43F7045;\n Sun, 8 Dec 2019 07:36:14 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0818; bh=KLOkqcCarle+xcptLTANPnxnFmbSmPqthner8EMC/Nc=;\n b=DGsY/WIcNwzzTtHkIqx0RHwvw9khnvYlPMjsnkMal10O8UNvWeTsvindRD8HcHeQuDGd\n lFEdBeTu62GAL0vwX4k1oHGZq11/asPFOH/iEDOsRbJF6Amk2tJYWXkILf0TNr8sU7BZ\n 9Sxrefk6oKjqIc6V61cp2dM+QfDqhel9VMZfg1Q0276Pn1moqEiw27J7lctEOxozPO2Z\n kudQjAjPSefV6xLFkmxbcJkXxk7p06l6UYzxKFiIIhKo6D7Nyuts6dRv6/m+mI0XU+Pk\n OTKrfUmlgMSGqiKAVGVVngrdp3QNMMmOvfQ9keq75KYMQoF8jwIpb5kWsU3OYf60AEl8 9w==", "From": "Mahipal Challa <mchalla@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, <pathreya@marvell.com>, <snilla@marvell.com>,\n <venkatn@marvell.com>", "Date": "Sun, 8 Dec 2019 21:05:41 +0530", "Message-ID": "<1575819342-20008-6-git-send-email-mchalla@marvell.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1575819342-20008-1-git-send-email-mchalla@marvell.com>", "References": "<1575819342-20008-1-git-send-email-mchalla@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.95,18.0.572\n definitions=2019-12-08_04:2019-12-05,2019-12-08 signatures=0", "Subject": "[dpdk-dev] [PATCH v1 5/6] raw/octeontx2_ep: add dequeue operation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add rawdev dequeue operation for SDP VF devices.\n\nSigned-off-by: Mahipal Challa <mchalla@marvell.com>\n---\n drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c | 199 ++++++++++++++++++++++++++++++\n drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h | 2 +\n drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 1 +\n drivers/raw/octeontx2_ep/otx2_ep_rawdev.h | 18 ++-\n 4 files changed, 219 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c b/drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c\nindex ebbacfb..451fcc0 100644\n--- a/drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c\n+++ b/drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c\n@@ -260,6 +260,7 @@\n \t\trte_mempool_get(sdpvf->enqdeq_mpool, &buf);\n \t\tif (buf == NULL) {\n \t\t\totx2_err(\"OQ buffer alloc failed\");\n+\t\t\tdroq->stats.rx_alloc_failure++;\n \t\t\t/* sdp_droq_destroy_ring_buffers(droq);*/\n \t\t\treturn -ENOMEM;\n \t\t}\n@@ -645,3 +646,201 @@\n \treturn SDP_IQ_SEND_FAILED;\n }\n \n+static uint32_t\n+sdp_droq_refill(struct sdp_device *sdpvf, struct sdp_droq *droq)\n+{\n+\tstruct sdp_droq_desc *desc_ring;\n+\tuint32_t desc_refilled = 0;\n+\tvoid *buf = NULL;\n+\n+\tdesc_ring = droq->desc_ring;\n+\n+\twhile (droq->refill_count && (desc_refilled < droq->nb_desc)) {\n+\t\t/* If a valid buffer exists (happens if there is no dispatch),\n+\t\t * reuse the buffer, else allocate.\n+\t\t */\n+\t\tif (droq->recv_buf_list[droq->refill_idx].buffer != NULL)\n+\t\t\tbreak;\n+\n+\t\trte_mempool_get(sdpvf->enqdeq_mpool, &buf);\n+\t\t/* If a buffer could not be allocated, no point in\n+\t\t * continuing\n+\t\t */\n+\t\tif (buf == NULL) {\n+\t\t\tdroq->stats.rx_alloc_failure++;\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\tdroq->recv_buf_list[droq->refill_idx].buffer = buf;\n+\t\tdesc_ring[droq->refill_idx].buffer_ptr = rte_mem_virt2iova(buf);\n+\n+\t\t/* Reset any previous values in the length field. */\n+\t\tdroq->info_list[droq->refill_idx].length = 0;\n+\n+\t\tdroq->refill_idx = sdp_incr_index(droq->refill_idx, 1,\n+\t\t\t\tdroq->nb_desc);\n+\n+\t\tdesc_refilled++;\n+\t\tdroq->refill_count--;\n+\n+\t}\n+\n+\treturn desc_refilled;\n+}\n+\n+static int\n+sdp_droq_read_packet(struct sdp_device *sdpvf __rte_unused,\n+\t\t struct sdp_droq *droq,\n+\t\t struct sdp_droq_pkt *droq_pkt)\n+{\n+\tstruct sdp_droq_info *info;\n+\tuint32_t total_len = 0;\n+\tuint32_t pkt_len = 0;\n+\n+\tinfo = &droq->info_list[droq->read_idx];\n+\tsdp_swap_8B_data((uint64_t *)&info->length, 1);\n+\tif (!info->length) {\n+\t\totx2_err(\"OQ info_list->length[%ld]\", (long)info->length);\n+\t\tgoto oq_read_fail;\n+\t}\n+\n+\t/* Deduce the actual data size */\n+\tinfo->length -= SDP_RH_SIZE;\n+\ttotal_len += (uint32_t)info->length;\n+\n+\totx2_sdp_dbg(\"OQ: pkt_len[%ld], buffer_size %d\",\n+\t\t\t(long)info->length, droq->buffer_size);\n+\tif (info->length > droq->buffer_size) {\n+\t\totx2_err(\"This mode is not supported: pkt_len > buffer_size\");\n+\t\tgoto oq_read_fail;\n+\t}\n+\n+\tif (info->length <= droq->buffer_size) {\n+\t\tpkt_len = (uint32_t)info->length;\n+\t\tdroq_pkt->data = droq->recv_buf_list[droq->read_idx].buffer;\n+\t\tdroq_pkt->len = pkt_len;\n+\n+\t\tdroq->recv_buf_list[droq->read_idx].buffer = NULL;\n+\t\tdroq->read_idx = sdp_incr_index(droq->read_idx,\t1,/* count */\n+\t\t\t\t\t\tdroq->nb_desc /* max rd idx */);\n+\t\tdroq->refill_count++;\n+\n+\t}\n+\n+\tinfo->length = 0;\n+\n+\treturn SDP_OQ_RECV_SUCCESS;\n+\n+oq_read_fail:\n+\treturn SDP_OQ_RECV_FAILED;\n+}\n+\n+static inline uint32_t\n+sdp_check_droq_pkts(struct sdp_droq *droq, uint32_t burst_size)\n+{\n+\tuint32_t min_pkts = 0;\n+\tuint32_t new_pkts;\n+\tuint32_t pkt_count;\n+\n+\t/* Latest available OQ packets */\n+\tpkt_count = rte_read32(droq->pkts_sent_reg);\n+\n+\t/* Newly arrived packets */\n+\tnew_pkts = pkt_count - droq->last_pkt_count;\n+\totx2_sdp_dbg(\"Recvd [%d] new OQ pkts\", new_pkts);\n+\n+\tmin_pkts = (new_pkts > burst_size) ? burst_size : new_pkts;\n+\tif (min_pkts) {\n+\t\trte_atomic64_add(&droq->pkts_pending, min_pkts);\n+\t\t/* Back up the aggregated packet count so far */\n+\t\tdroq->last_pkt_count += min_pkts;\n+\t}\n+\n+\treturn min_pkts;\n+}\n+\n+/* Check for response arrival from OCTEON TX2\n+ * returns number of requests completed\n+ */\n+int\n+sdp_rawdev_dequeue(struct rte_rawdev *rawdev,\n+\t\t struct rte_rawdev_buf **buffers, unsigned int count,\n+\t\t rte_rawdev_obj_t context __rte_unused)\n+{\n+\tstruct sdp_droq_pkt *oq_pkt;\n+\tstruct sdp_device *sdpvf;\n+\tstruct sdp_droq *droq;\n+\n+\tuint32_t q_no = 0, pkts;\n+\tuint32_t new_pkts;\n+\tuint32_t ret;\n+\n+\tsdpvf = (struct sdp_device *)rawdev->dev_private;\n+\n+\tdroq = sdpvf->droq[q_no];\n+\tif (!droq) {\n+\t\totx2_err(\"Invalid droq[%d]\", q_no);\n+\t\tgoto deq_fail;\n+\t}\n+\n+\t/* Grab the lock */\n+\trte_spinlock_lock(&droq->lock);\n+\n+\tnew_pkts = sdp_check_droq_pkts(droq, count);\n+\tif (!new_pkts) {\n+\t\totx2_sdp_dbg(\"Zero new_pkts:%d\", new_pkts);\n+\t\tgoto deq_fail; /* No pkts at this moment */\n+\t}\n+\n+\totx2_sdp_dbg(\"Received new_pkts = %d\", new_pkts);\n+\n+\tfor (pkts = 0; pkts < new_pkts; pkts++) {\n+\n+\t\t/* Push the received pkt to application */\n+\t\toq_pkt = (struct sdp_droq_pkt *)buffers[pkts];\n+\n+\t\tret = sdp_droq_read_packet(sdpvf, droq, oq_pkt);\n+\t\tif (ret) {\n+\t\t\totx2_err(\"DROQ read pakt failed.\");\n+\t\t\tgoto deq_fail;\n+\t\t}\n+\n+\t\t/* Stats */\n+\t\tdroq->stats.pkts_received++;\n+\t\tdroq->stats.bytes_received += oq_pkt->len;\n+\t}\n+\n+\t/* Ack the h/w with no# of pkts read by Host */\n+\trte_wmb();\n+\trte_write32(pkts, droq->pkts_sent_reg);\n+\trte_wmb();\n+\n+\tdroq->last_pkt_count -= pkts;\n+\n+\totx2_sdp_dbg(\"DROQ pkts[%d] pushed to application\", pkts);\n+\n+\t/* Refill DROQ buffers */\n+\tif (droq->refill_count >= 2 /* droq->refill_threshold */) {\n+\t\tint desc_refilled = sdp_droq_refill(sdpvf, droq);\n+\n+\t\t/* Flush the droq descriptor data to memory to be sure\n+\t\t * that when we update the credits the data in memory is\n+\t\t * accurate.\n+\t\t */\n+\t\trte_wmb();\n+\t\trte_write32(desc_refilled, droq->pkts_credit_reg);\n+\n+\t\t/* Ensure mmio write completes */\n+\t\trte_wmb();\n+\t\totx2_sdp_dbg(\"Refilled count = %d\", desc_refilled);\n+\t}\n+\n+\t/* Release the spin lock */\n+\trte_spinlock_unlock(&droq->lock);\n+\n+\treturn pkts;\n+\n+deq_fail:\n+\trte_spinlock_unlock(&droq->lock);\n+\treturn SDP_OQ_RECV_FAILED;\n+}\ndiff --git a/drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h b/drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h\nindex b9b7c0b..172fdc5 100644\n--- a/drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h\n+++ b/drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h\n@@ -11,6 +11,8 @@\n #define SDP_IQ_SEND_FAILED (-1)\n #define SDP_IQ_SEND_SUCCESS (0)\n \n+#define SDP_OQ_RECV_FAILED (-1)\n+#define SDP_OQ_RECV_SUCCESS (0)\n \n static inline uint64_t\n sdp_endian_swap_8B(uint64_t _d)\ndiff --git a/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c\nindex 4ba8473..ddb208d 100644\n--- a/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c\n+++ b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c\n@@ -252,6 +252,7 @@\n \t.dev_stop = sdp_rawdev_stop,\n \t.dev_close = sdp_rawdev_close,\n \t.enqueue_bufs = sdp_rawdev_enqueue,\n+\t.dequeue_bufs = sdp_rawdev_dequeue,\n };\n \n static int\ndiff --git a/drivers/raw/octeontx2_ep/otx2_ep_rawdev.h b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.h\nindex 8fd06fb..a77cbab 100644\n--- a/drivers/raw/octeontx2_ep/otx2_ep_rawdev.h\n+++ b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.h\n@@ -279,6 +279,18 @@ struct sdp_recv_buffer {\n };\n #define SDP_DROQ_RECVBUF_SIZE\t(sizeof(struct sdp_recv_buffer))\n \n+/* DROQ statistics. Each output queue has four stats fields. */\n+struct sdp_droq_stats {\n+\t/* Number of packets received in this queue. */\n+\tuint64_t pkts_received;\n+\n+\t/* Bytes received by this queue. */\n+\tuint64_t bytes_received;\n+\n+\t/* Num of failures of rte_pktmbuf_alloc() */\n+\tuint64_t rx_alloc_failure;\n+};\n+\n /* Structure to define the configuration attributes for each Output queue. */\n struct sdp_oq_config {\n \t/* Max number of OQs available */\n@@ -345,6 +357,9 @@ struct sdp_droq {\n \t */\n \tvoid *pkts_sent_reg;\n \n+\t/* Statistics for this DROQ. */\n+\tstruct sdp_droq_stats stats;\n+\n \t/* DMA mapped address of the DROQ descriptor ring. */\n \tsize_t desc_ring_dma;\n \n@@ -476,6 +491,7 @@ struct sdp_device {\n \n int sdp_rawdev_enqueue(struct rte_rawdev *dev, struct rte_rawdev_buf **buffers,\n \t\t unsigned int count, rte_rawdev_obj_t context);\n-\n+int sdp_rawdev_dequeue(struct rte_rawdev *dev, struct rte_rawdev_buf **buffers,\n+\t\t unsigned int count, rte_rawdev_obj_t context);\n \n #endif /* _OTX2_EP_RAWDEV_H_ */\n", "prefixes": [ "v1", "5/6" ] }