Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/63531/?format=api
{ "id": 63531, "url": "http://patches.dpdk.org/api/patches/63531/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20191203070318.39620-10-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20191203070318.39620-10-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20191203070318.39620-10-qi.z.zhang@intel.com", "date": "2019-12-03T07:03:10", "name": "[09/17] net/iavf/base: adjust code indent", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "0c1892733d91c4dcf57af259ced9e15a44c88017", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 31221, "url": "http://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20191203070318.39620-10-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 7716, "url": "http://patches.dpdk.org/api/series/7716/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7716", "date": "2019-12-03T07:03:01", "name": "iavf base code update", "version": 1, "mbox": "http://patches.dpdk.org/series/7716/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/63531/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/63531/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A242BA04B5;\n\tTue, 3 Dec 2019 08:01:57 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id CCF341BF9D;\n\tTue, 3 Dec 2019 08:00:35 +0100 (CET)", "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n by dpdk.org (Postfix) with ESMTP id E7B401BF8C\n for <dev@dpdk.org>; Tue, 3 Dec 2019 08:00:29 +0100 (CET)", "from fmsmga005.fm.intel.com ([10.253.24.32])\n by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 02 Dec 2019 23:00:29 -0800", "from dpdk51.sh.intel.com ([10.67.110.245])\n by fmsmga005.fm.intel.com with ESMTP; 02 Dec 2019 23:00:27 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.69,272,1571727600\"; d=\"scan'208\";a=\"410729728\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "xiaolong.ye@intel.com", "Cc": "haiyue.wang@intel.com, dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Tue, 3 Dec 2019 15:03:10 +0800", "Message-Id": "<20191203070318.39620-10-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20191203070318.39620-1-qi.z.zhang@intel.com>", "References": "<20191203070318.39620-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH 09/17] net/iavf/base: adjust code indent", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Adjust the indent in function and macro defination.\n\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/iavf/base/iavf_alloc.h | 14 +++++++-------\n drivers/net/iavf/base/iavf_common.c | 22 +++++++++++-----------\n drivers/net/iavf/base/iavf_prototype.h | 16 ++++++++--------\n drivers/net/iavf/base/iavf_type.h | 19 ++++++++++---------\n 4 files changed, 36 insertions(+), 35 deletions(-)", "diff": "diff --git a/drivers/net/iavf/base/iavf_alloc.h b/drivers/net/iavf/base/iavf_alloc.h\nindex da872bdbb..a409bb099 100644\n--- a/drivers/net/iavf/base/iavf_alloc.h\n+++ b/drivers/net/iavf/base/iavf_alloc.h\n@@ -22,15 +22,15 @@ enum iavf_memory_type {\n \n /* prototype for functions used for dynamic memory allocation */\n enum iavf_status iavf_allocate_dma_mem(struct iavf_hw *hw,\n-\t\t\t\t\t struct iavf_dma_mem *mem,\n-\t\t\t\t\t enum iavf_memory_type type,\n-\t\t\t\t\t u64 size, u32 alignment);\n+\t\t\t\t struct iavf_dma_mem *mem,\n+\t\t\t\t enum iavf_memory_type type,\n+\t\t\t\t u64 size, u32 alignment);\n enum iavf_status iavf_free_dma_mem(struct iavf_hw *hw,\n-\t\t\t\t\tstruct iavf_dma_mem *mem);\n+\t\t\t\t struct iavf_dma_mem *mem);\n enum iavf_status iavf_allocate_virt_mem(struct iavf_hw *hw,\n-\t\t\t\t\t struct iavf_virt_mem *mem,\n-\t\t\t\t\t u32 size);\n+\t\t\t\t\tstruct iavf_virt_mem *mem,\n+\t\t\t\t\tu32 size);\n enum iavf_status iavf_free_virt_mem(struct iavf_hw *hw,\n-\t\t\t\t\t struct iavf_virt_mem *mem);\n+\t\t\t\t struct iavf_virt_mem *mem);\n \n #endif /* _IAVF_ALLOC_H_ */\ndiff --git a/drivers/net/iavf/base/iavf_common.c b/drivers/net/iavf/base/iavf_common.c\nindex b6e875440..c2c1fd1e4 100644\n--- a/drivers/net/iavf/base/iavf_common.c\n+++ b/drivers/net/iavf/base/iavf_common.c\n@@ -346,7 +346,7 @@ bool iavf_check_asq_alive(struct iavf_hw *hw)\n * or not the driver is unloading as well.\n **/\n enum iavf_status iavf_aq_queue_shutdown(struct iavf_hw *hw,\n-\t\t\t\t\t bool unloading)\n+\t\t\t\t\tbool unloading)\n {\n \tstruct iavf_aq_desc desc;\n \tstruct iavf_aqc_queue_shutdown *cmd =\n@@ -375,9 +375,9 @@ enum iavf_status iavf_aq_queue_shutdown(struct iavf_hw *hw,\n * Internal function to get or set RSS look up table\n **/\n STATIC enum iavf_status iavf_aq_get_set_rss_lut(struct iavf_hw *hw,\n-\t\t\t\t\t\t u16 vsi_id, bool pf_lut,\n-\t\t\t\t\t\t u8 *lut, u16 lut_size,\n-\t\t\t\t\t\t bool set)\n+\t\t\t\t\t\tu16 vsi_id, bool pf_lut,\n+\t\t\t\t\t\tu8 *lut, u16 lut_size,\n+\t\t\t\t\t\tbool set)\n {\n \tenum iavf_status status;\n \tstruct iavf_aq_desc desc;\n@@ -428,7 +428,7 @@ STATIC enum iavf_status iavf_aq_get_set_rss_lut(struct iavf_hw *hw,\n * get the RSS lookup table, PF or VSI type\n **/\n enum iavf_status iavf_aq_get_rss_lut(struct iavf_hw *hw, u16 vsi_id,\n-\t\t\t\t\t bool pf_lut, u8 *lut, u16 lut_size)\n+\t\t\t\t bool pf_lut, u8 *lut, u16 lut_size)\n {\n \treturn iavf_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size,\n \t\t\t\t false);\n@@ -445,7 +445,7 @@ enum iavf_status iavf_aq_get_rss_lut(struct iavf_hw *hw, u16 vsi_id,\n * set the RSS lookup table, PF or VSI type\n **/\n enum iavf_status iavf_aq_set_rss_lut(struct iavf_hw *hw, u16 vsi_id,\n-\t\t\t\t\t bool pf_lut, u8 *lut, u16 lut_size)\n+\t\t\t\t bool pf_lut, u8 *lut, u16 lut_size)\n {\n \treturn iavf_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size, true);\n }\n@@ -500,8 +500,8 @@ STATIC enum iavf_status iavf_aq_get_set_rss_key(struct iavf_hw *hw,\n *\n **/\n enum iavf_status iavf_aq_get_rss_key(struct iavf_hw *hw,\n-\t\t\t\t u16 vsi_id,\n-\t\t\t\t struct iavf_aqc_get_set_rss_key_data *key)\n+\t\t\t\t u16 vsi_id,\n+\t\t\t\t struct iavf_aqc_get_set_rss_key_data *key)\n {\n \treturn iavf_aq_get_set_rss_key(hw, vsi_id, key, false);\n }\n@@ -515,8 +515,8 @@ enum iavf_status iavf_aq_get_rss_key(struct iavf_hw *hw,\n * set the RSS key per VSI\n **/\n enum iavf_status iavf_aq_set_rss_key(struct iavf_hw *hw,\n-\t\t\t\t u16 vsi_id,\n-\t\t\t\t struct iavf_aqc_get_set_rss_key_data *key)\n+\t\t\t\t u16 vsi_id,\n+\t\t\t\t struct iavf_aqc_get_set_rss_key_data *key)\n {\n \treturn iavf_aq_get_set_rss_key(hw, vsi_id, key, true);\n }\n@@ -1012,7 +1012,7 @@ enum iavf_status iavf_vf_reset(struct iavf_hw *hw)\n * Get information for the reason of a Wake Up event\n **/\n enum iavf_status iavf_aq_clear_all_wol_filters(struct iavf_hw *hw,\n-\tstruct iavf_asq_cmd_details *cmd_details)\n+\t\t\tstruct iavf_asq_cmd_details *cmd_details)\n {\n \tstruct iavf_aq_desc desc;\n \tenum iavf_status status;\ndiff --git a/drivers/net/iavf/base/iavf_prototype.h b/drivers/net/iavf/base/iavf_prototype.h\nindex 36b5a17f8..a5d0b0073 100644\n--- a/drivers/net/iavf/base/iavf_prototype.h\n+++ b/drivers/net/iavf/base/iavf_prototype.h\n@@ -31,8 +31,8 @@ void iavf_free_adminq_arq(struct iavf_hw *hw);\n enum iavf_status iavf_validate_mac_addr(u8 *mac_addr);\n void iavf_adminq_init_ring_data(struct iavf_hw *hw);\n enum iavf_status iavf_clean_arq_element(struct iavf_hw *hw,\n-\t\t\t\t\t struct iavf_arq_event_info *e,\n-\t\t\t\t\t u16 *events_pending);\n+\t\t\t\t\tstruct iavf_arq_event_info *e,\n+\t\t\t\t\tu16 *events_pending);\n enum iavf_status iavf_asq_send_command(struct iavf_hw *hw,\n \t\t\t\tstruct iavf_aq_desc *desc,\n \t\t\t\tvoid *buff, /* can be NULL */\n@@ -49,9 +49,9 @@ bool iavf_check_asq_alive(struct iavf_hw *hw);\n enum iavf_status iavf_aq_queue_shutdown(struct iavf_hw *hw, bool unloading);\n \n enum iavf_status iavf_aq_get_rss_lut(struct iavf_hw *hw, u16 seid,\n-\t\t\t\t\t bool pf_lut, u8 *lut, u16 lut_size);\n+\t\t\t\t bool pf_lut, u8 *lut, u16 lut_size);\n enum iavf_status iavf_aq_set_rss_lut(struct iavf_hw *hw, u16 seid,\n-\t\t\t\t\t bool pf_lut, u8 *lut, u16 lut_size);\n+\t\t\t\t bool pf_lut, u8 *lut, u16 lut_size);\n enum iavf_status iavf_aq_get_rss_key(struct iavf_hw *hw,\n \t\t\t\t u16 seid,\n \t\t\t\t struct iavf_aqc_get_set_rss_key_data *key);\n@@ -85,10 +85,10 @@ enum iavf_status iavf_aq_send_msg_to_pf(struct iavf_hw *hw,\n \t\t\t\tu8 *msg, u16 msglen,\n \t\t\t\tstruct iavf_asq_cmd_details *cmd_details);\n enum iavf_status iavf_aq_debug_dump(struct iavf_hw *hw, u8 cluster_id,\n-\t\t\t\tu8 table_id, u32 start_index, u16 buff_size,\n-\t\t\t\tvoid *buff, u16 *ret_buff_size,\n-\t\t\t\tu8 *ret_next_table, u32 *ret_next_index,\n-\t\t\t\tstruct iavf_asq_cmd_details *cmd_details);\n+\t\t\t\t u8 table_id, u32 start_index, u16 buff_size,\n+\t\t\t\t void *buff, u16 *ret_buff_size,\n+\t\t\t\t u8 *ret_next_table, u32 *ret_next_index,\n+\t\t\t\t struct iavf_asq_cmd_details *cmd_details);\n enum iavf_status iavf_aq_clear_all_wol_filters(struct iavf_hw *hw,\n \t\t\tstruct iavf_asq_cmd_details *cmd_details);\n #endif /* _IAVF_PROTOTYPE_H_ */\ndiff --git a/drivers/net/iavf/base/iavf_type.h b/drivers/net/iavf/base/iavf_type.h\nindex c1910ff75..6d63f4396 100644\n--- a/drivers/net/iavf/base/iavf_type.h\n+++ b/drivers/net/iavf/base/iavf_type.h\n@@ -11,7 +11,7 @@\n #include \"iavf_adminq.h\"\n #include \"iavf_devids.h\"\n \n-#define IAVF_RXQ_CTX_DBUFF_SHIFT 7\n+#define IAVF_RXQ_CTX_DBUFF_SHIFT\t7\n \n #define UNREFERENCED_XPARAMETER\n #define UNREFERENCED_1PARAMETER(_p) (_p);\n@@ -467,20 +467,20 @@ enum iavf_rx_desc_status_bits {\n \tIAVF_RX_DESC_STATUS_FLTSTAT_SHIFT\t= 12, /* 2 BITS */\n \tIAVF_RX_DESC_STATUS_LPBK_SHIFT\t\t= 14,\n \tIAVF_RX_DESC_STATUS_IPV6EXADD_SHIFT\t= 15,\n-\tIAVF_RX_DESC_STATUS_RESERVED2_SHIFT\t= 16, /* 2 BITS */\n+\tIAVF_RX_DESC_STATUS_RESERVED_SHIFT\t= 16, /* 2 BITS */\n \tIAVF_RX_DESC_STATUS_INT_UDP_0_SHIFT\t= 18,\n \tIAVF_RX_DESC_STATUS_LAST /* this entry must be last!!! */\n };\n \n #define IAVF_RXD_QW1_STATUS_SHIFT\t0\n-#define IAVF_RXD_QW1_STATUS_MASK\t((BIT(IAVF_RX_DESC_STATUS_LAST) - 1) << \\\n-\t\t\t\t\t IAVF_RXD_QW1_STATUS_SHIFT)\n+#define IAVF_RXD_QW1_STATUS_MASK\t((BIT(IAVF_RX_DESC_STATUS_LAST) - 1) \\\n+\t\t\t\t\t << IAVF_RXD_QW1_STATUS_SHIFT)\n \n-#define IAVF_RXD_QW1_STATUS_TSYNINDX_SHIFT IAVF_RX_DESC_STATUS_TSYNINDX_SHIFT\n-#define IAVF_RXD_QW1_STATUS_TSYNINDX_MASK\t(0x3UL << \\\n-\t\t\t\t\t IAVF_RXD_QW1_STATUS_TSYNINDX_SHIFT)\n+#define IAVF_RXD_QW1_STATUS_TSYNINDX_SHIFT IAVF_RX_DESC_STATUS_TSYNINDX_SHIFT\n+#define IAVF_RXD_QW1_STATUS_TSYNINDX_MASK (0x3UL << \\\n+\t\t\t\t\t IAVF_RXD_QW1_STATUS_TSYNINDX_SHIFT)\n \n-#define IAVF_RXD_QW1_STATUS_TSYNVALID_SHIFT IAVF_RX_DESC_STATUS_TSYNVALID_SHIFT\n+#define IAVF_RXD_QW1_STATUS_TSYNVALID_SHIFT IAVF_RX_DESC_STATUS_TSYNVALID_SHIFT\n #define IAVF_RXD_QW1_STATUS_TSYNVALID_MASK BIT_ULL(IAVF_RXD_QW1_STATUS_TSYNVALID_SHIFT)\n \n #define IAVF_RXD_QW1_STATUS_UMBCAST_SHIFT\tIAVF_RX_DESC_STATUS_UMBCAST\n@@ -892,7 +892,8 @@ enum iavf_tx_ctx_desc_eipt_offload {\n #define IAVF_TXD_CTX_GRE_TUNNELING\t(0x2ULL << IAVF_TXD_CTX_QW0_NATT_SHIFT)\n \n #define IAVF_TXD_CTX_QW0_EIP_NOINC_SHIFT\t11\n-#define IAVF_TXD_CTX_QW0_EIP_NOINC_MASK\tBIT_ULL(IAVF_TXD_CTX_QW0_EIP_NOINC_SHIFT)\n+#define IAVF_TXD_CTX_QW0_EIP_NOINC_MASK \\\n+\t\t\t\t BIT_ULL(IAVF_TXD_CTX_QW0_EIP_NOINC_SHIFT)\n \n #define IAVF_TXD_CTX_EIP_NOINC_IPID_CONST\tIAVF_TXD_CTX_QW0_EIP_NOINC_MASK\n \n", "prefixes": [ "09/17" ] }