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GET /api/patches/63523/?format=api
{ "id": 63523, "url": "http://patches.dpdk.org/api/patches/63523/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20191203070318.39620-2-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20191203070318.39620-2-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20191203070318.39620-2-qi.z.zhang@intel.com", "date": "2019-12-03T07:03:02", "name": "[01/17] net/iavf/base: remove unnecessary header file", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "238ec30613e51470b16d813a35d1e70097617c41", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 31221, "url": "http://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20191203070318.39620-2-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 7716, "url": "http://patches.dpdk.org/api/series/7716/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7716", "date": "2019-12-03T07:03:01", "name": "iavf base code update", "version": 1, "mbox": "http://patches.dpdk.org/series/7716/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/63523/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/63523/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id F0AD7A04B5;\n\tTue, 3 Dec 2019 08:00:24 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9DE945F13;\n\tTue, 3 Dec 2019 08:00:18 +0100 (CET)", "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n by dpdk.org (Postfix) with ESMTP id D0E8CA3\n for <dev@dpdk.org>; Tue, 3 Dec 2019 08:00:15 +0100 (CET)", "from fmsmga005.fm.intel.com ([10.253.24.32])\n by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 02 Dec 2019 23:00:15 -0800", "from dpdk51.sh.intel.com ([10.67.110.245])\n by fmsmga005.fm.intel.com with ESMTP; 02 Dec 2019 23:00:13 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.69,272,1571727600\"; d=\"scan'208\";a=\"410729613\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "xiaolong.ye@intel.com", "Cc": "haiyue.wang@intel.com, dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Tue, 3 Dec 2019 15:03:02 +0800", "Message-Id": "<20191203070318.39620-2-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20191203070318.39620-1-qi.z.zhang@intel.com>", "References": "<20191203070318.39620-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH 01/17] net/iavf/base: remove unnecessary header\n\tfile", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Delete iavf_hmc.h and iavf_lan_hmc.h since its not necessary.\n\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/iavf/base/iavf_hmc.h | 216 -----------------------------------\n drivers/net/iavf/base/iavf_lan_hmc.h | 171 ---------------------------\n drivers/net/iavf/base/iavf_type.h | 7 +-\n 3 files changed, 2 insertions(+), 392 deletions(-)\n delete mode 100644 drivers/net/iavf/base/iavf_hmc.h\n delete mode 100644 drivers/net/iavf/base/iavf_lan_hmc.h", "diff": "diff --git a/drivers/net/iavf/base/iavf_hmc.h b/drivers/net/iavf/base/iavf_hmc.h\ndeleted file mode 100644\nindex d861db04a..000000000\n--- a/drivers/net/iavf/base/iavf_hmc.h\n+++ /dev/null\n@@ -1,216 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2013 - 2015 Intel Corporation\n- */\n-\n-#ifndef _IAVF_HMC_H_\n-#define _IAVF_HMC_H_\n-\n-#define IAVF_HMC_MAX_BP_COUNT 512\n-\n-/* forward-declare the HW struct for the compiler */\n-struct iavf_hw;\n-\n-#define IAVF_HMC_INFO_SIGNATURE\t\t0x484D5347 /* HMSG */\n-#define IAVF_HMC_PD_CNT_IN_SD\t\t512\n-#define IAVF_HMC_DIRECT_BP_SIZE\t\t0x200000 /* 2M */\n-#define IAVF_HMC_PAGED_BP_SIZE\t\t4096\n-#define IAVF_HMC_PD_BP_BUF_ALIGNMENT\t4096\n-#define IAVF_FIRST_VF_FPM_ID\t\t16\n-\n-struct iavf_hmc_obj_info {\n-\tu64 base;\t/* base addr in FPM */\n-\tu32 max_cnt;\t/* max count available for this hmc func */\n-\tu32 cnt;\t/* count of objects driver actually wants to create */\n-\tu64 size;\t/* size in bytes of one object */\n-};\n-\n-enum iavf_sd_entry_type {\n-\tIAVF_SD_TYPE_INVALID = 0,\n-\tIAVF_SD_TYPE_PAGED = 1,\n-\tIAVF_SD_TYPE_DIRECT = 2\n-};\n-\n-struct iavf_hmc_bp {\n-\tenum iavf_sd_entry_type entry_type;\n-\tstruct iavf_dma_mem addr; /* populate to be used by hw */\n-\tu32 sd_pd_index;\n-\tu32 ref_cnt;\n-};\n-\n-struct iavf_hmc_pd_entry {\n-\tstruct iavf_hmc_bp bp;\n-\tu32 sd_index;\n-\tbool rsrc_pg;\n-\tbool valid;\n-};\n-\n-struct iavf_hmc_pd_table {\n-\tstruct iavf_dma_mem pd_page_addr; /* populate to be used by hw */\n-\tstruct iavf_hmc_pd_entry *pd_entry; /* [512] for sw book keeping */\n-\tstruct iavf_virt_mem pd_entry_virt_mem; /* virt mem for pd_entry */\n-\n-\tu32 ref_cnt;\n-\tu32 sd_index;\n-};\n-\n-struct iavf_hmc_sd_entry {\n-\tenum iavf_sd_entry_type entry_type;\n-\tbool valid;\n-\n-\tunion {\n-\t\tstruct iavf_hmc_pd_table pd_table;\n-\t\tstruct iavf_hmc_bp bp;\n-\t} u;\n-};\n-\n-struct iavf_hmc_sd_table {\n-\tstruct iavf_virt_mem addr; /* used to track sd_entry allocations */\n-\tu32 sd_cnt;\n-\tu32 ref_cnt;\n-\tstruct iavf_hmc_sd_entry *sd_entry; /* (sd_cnt*512) entries max */\n-};\n-\n-struct iavf_hmc_info {\n-\tu32 signature;\n-\t/* equals to pci func num for PF and dynamically allocated for VFs */\n-\tu8 hmc_fn_id;\n-\tu16 first_sd_index; /* index of the first available SD */\n-\n-\t/* hmc objects */\n-\tstruct iavf_hmc_obj_info *hmc_obj;\n-\tstruct iavf_virt_mem hmc_obj_virt_mem;\n-\tstruct iavf_hmc_sd_table sd_table;\n-};\n-\n-#define IAVF_INC_SD_REFCNT(sd_table)\t((sd_table)->ref_cnt++)\n-#define IAVF_INC_PD_REFCNT(pd_table)\t((pd_table)->ref_cnt++)\n-#define IAVF_INC_BP_REFCNT(bp)\t\t((bp)->ref_cnt++)\n-\n-#define IAVF_DEC_SD_REFCNT(sd_table)\t((sd_table)->ref_cnt--)\n-#define IAVF_DEC_PD_REFCNT(pd_table)\t((pd_table)->ref_cnt--)\n-#define IAVF_DEC_BP_REFCNT(bp)\t\t((bp)->ref_cnt--)\n-\n-/**\n- * IAVF_SET_PF_SD_ENTRY - marks the sd entry as valid in the hardware\n- * @hw: pointer to our hw struct\n- * @pa: pointer to physical address\n- * @sd_index: segment descriptor index\n- * @type: if sd entry is direct or paged\n- **/\n-#define IAVF_SET_PF_SD_ENTRY(hw, pa, sd_index, type)\t\t\t\\\n-{\t\t\t\t\t\t\t\t\t\\\n-\tu32 val1, val2, val3;\t\t\t\t\t\t\\\n-\tval1 = (u32)(IAVF_HI_DWORD(pa));\t\t\t\t\\\n-\tval2 = (u32)(pa) | (IAVF_HMC_MAX_BP_COUNT <<\t\t\t\\\n-\t\t IAVF_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) |\t\t\\\n-\t\t((((type) == IAVF_SD_TYPE_PAGED) ? 0 : 1) <<\t\t\\\n-\t\tIAVF_PFHMC_SDDATALOW_PMSDTYPE_SHIFT) |\t\t\t\\\n-\t\tBIT(IAVF_PFHMC_SDDATALOW_PMSDVALID_SHIFT);\t\t\\\n-\tval3 = (sd_index) | BIT_ULL(IAVF_PFHMC_SDCMD_PMSDWR_SHIFT);\t\\\n-\twr32((hw), IAVF_PFHMC_SDDATAHIGH, val1);\t\t\t\\\n-\twr32((hw), IAVF_PFHMC_SDDATALOW, val2);\t\t\t\t\\\n-\twr32((hw), IAVF_PFHMC_SDCMD, val3);\t\t\t\t\\\n-}\n-\n-/**\n- * IAVF_CLEAR_PF_SD_ENTRY - marks the sd entry as invalid in the hardware\n- * @hw: pointer to our hw struct\n- * @sd_index: segment descriptor index\n- * @type: if sd entry is direct or paged\n- **/\n-#define IAVF_CLEAR_PF_SD_ENTRY(hw, sd_index, type)\t\t\t\\\n-{\t\t\t\t\t\t\t\t\t\\\n-\tu32 val2, val3;\t\t\t\t\t\t\t\\\n-\tval2 = (IAVF_HMC_MAX_BP_COUNT <<\t\t\t\t\\\n-\t\tIAVF_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) |\t\t\\\n-\t\t((((type) == IAVF_SD_TYPE_PAGED) ? 0 : 1) <<\t\t\\\n-\t\tIAVF_PFHMC_SDDATALOW_PMSDTYPE_SHIFT);\t\t\t\\\n-\tval3 = (sd_index) | BIT_ULL(IAVF_PFHMC_SDCMD_PMSDWR_SHIFT);\t\\\n-\twr32((hw), IAVF_PFHMC_SDDATAHIGH, 0);\t\t\t\t\\\n-\twr32((hw), IAVF_PFHMC_SDDATALOW, val2);\t\t\t\t\\\n-\twr32((hw), IAVF_PFHMC_SDCMD, val3);\t\t\t\t\\\n-}\n-\n-/**\n- * IAVF_INVALIDATE_PF_HMC_PD - Invalidates the pd cache in the hardware\n- * @hw: pointer to our hw struct\n- * @sd_idx: segment descriptor index\n- * @pd_idx: page descriptor index\n- **/\n-#define IAVF_INVALIDATE_PF_HMC_PD(hw, sd_idx, pd_idx)\t\t\t\\\n-\twr32((hw), IAVF_PFHMC_PDINV,\t\t\t\t\t\\\n-\t (((sd_idx) << IAVF_PFHMC_PDINV_PMSDIDX_SHIFT) |\t\t\\\n-\t ((pd_idx) << IAVF_PFHMC_PDINV_PMPDIDX_SHIFT)))\n-\n-/**\n- * IAVF_FIND_SD_INDEX_LIMIT - finds segment descriptor index limit\n- * @hmc_info: pointer to the HMC configuration information structure\n- * @type: type of HMC resources we're searching\n- * @index: starting index for the object\n- * @cnt: number of objects we're trying to create\n- * @sd_idx: pointer to return index of the segment descriptor in question\n- * @sd_limit: pointer to return the maximum number of segment descriptors\n- *\n- * This function calculates the segment descriptor index and index limit\n- * for the resource defined by iavf_hmc_rsrc_type.\n- **/\n-#define IAVF_FIND_SD_INDEX_LIMIT(hmc_info, type, index, cnt, sd_idx, sd_limit)\\\n-{\t\t\t\t\t\t\t\t\t\\\n-\tu64 fpm_addr, fpm_limit;\t\t\t\t\t\\\n-\tfpm_addr = (hmc_info)->hmc_obj[(type)].base +\t\t\t\\\n-\t\t (hmc_info)->hmc_obj[(type)].size * (index);\t\t\\\n-\tfpm_limit = fpm_addr + (hmc_info)->hmc_obj[(type)].size * (cnt);\\\n-\t*(sd_idx) = (u32)(fpm_addr / IAVF_HMC_DIRECT_BP_SIZE);\t\t\\\n-\t*(sd_limit) = (u32)((fpm_limit - 1) / IAVF_HMC_DIRECT_BP_SIZE);\t\\\n-\t/* add one more to the limit to correct our range */\t\t\\\n-\t*(sd_limit) += 1;\t\t\t\t\t\t\\\n-}\n-\n-/**\n- * IAVF_FIND_PD_INDEX_LIMIT - finds page descriptor index limit\n- * @hmc_info: pointer to the HMC configuration information struct\n- * @type: HMC resource type we're examining\n- * @idx: starting index for the object\n- * @cnt: number of objects we're trying to create\n- * @pd_index: pointer to return page descriptor index\n- * @pd_limit: pointer to return page descriptor index limit\n- *\n- * Calculates the page descriptor index and index limit for the resource\n- * defined by iavf_hmc_rsrc_type.\n- **/\n-#define IAVF_FIND_PD_INDEX_LIMIT(hmc_info, type, idx, cnt, pd_index, pd_limit)\\\n-{\t\t\t\t\t\t\t\t\t\\\n-\tu64 fpm_adr, fpm_limit;\t\t\t\t\t\t\\\n-\tfpm_adr = (hmc_info)->hmc_obj[(type)].base +\t\t\t\\\n-\t\t (hmc_info)->hmc_obj[(type)].size * (idx);\t\t\\\n-\tfpm_limit = fpm_adr + (hmc_info)->hmc_obj[(type)].size * (cnt);\t\\\n-\t*(pd_index) = (u32)(fpm_adr / IAVF_HMC_PAGED_BP_SIZE);\t\t\\\n-\t*(pd_limit) = (u32)((fpm_limit - 1) / IAVF_HMC_PAGED_BP_SIZE);\t\\\n-\t/* add one more to the limit to correct our range */\t\t\\\n-\t*(pd_limit) += 1;\t\t\t\t\t\t\\\n-}\n-enum iavf_status_code iavf_add_sd_table_entry(struct iavf_hw *hw,\n-\t\t\t\t\t struct iavf_hmc_info *hmc_info,\n-\t\t\t\t\t u32 sd_index,\n-\t\t\t\t\t enum iavf_sd_entry_type type,\n-\t\t\t\t\t u64 direct_mode_sz);\n-\n-enum iavf_status_code iavf_add_pd_table_entry(struct iavf_hw *hw,\n-\t\t\t\t\t struct iavf_hmc_info *hmc_info,\n-\t\t\t\t\t u32 pd_index,\n-\t\t\t\t\t struct iavf_dma_mem *rsrc_pg);\n-enum iavf_status_code iavf_remove_pd_bp(struct iavf_hw *hw,\n-\t\t\t\t\tstruct iavf_hmc_info *hmc_info,\n-\t\t\t\t\tu32 idx);\n-enum iavf_status_code iavf_prep_remove_sd_bp(struct iavf_hmc_info *hmc_info,\n-\t\t\t\t\t u32 idx);\n-enum iavf_status_code iavf_remove_sd_bp_new(struct iavf_hw *hw,\n-\t\t\t\t\t struct iavf_hmc_info *hmc_info,\n-\t\t\t\t\t u32 idx, bool is_pf);\n-enum iavf_status_code iavf_prep_remove_pd_page(struct iavf_hmc_info *hmc_info,\n-\t\t\t\t\t u32 idx);\n-enum iavf_status_code iavf_remove_pd_page_new(struct iavf_hw *hw,\n-\t\t\t\t\t struct iavf_hmc_info *hmc_info,\n-\t\t\t\t\t u32 idx, bool is_pf);\n-\n-#endif /* _IAVF_HMC_H_ */\ndiff --git a/drivers/net/iavf/base/iavf_lan_hmc.h b/drivers/net/iavf/base/iavf_lan_hmc.h\ndeleted file mode 100644\nindex 8e8752c79..000000000\n--- a/drivers/net/iavf/base/iavf_lan_hmc.h\n+++ /dev/null\n@@ -1,171 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2013 - 2015 Intel Corporation\n- */\n-\n-#ifndef _IAVF_LAN_HMC_H_\n-#define _IAVF_LAN_HMC_H_\n-\n-/* forward-declare the HW struct for the compiler */\n-struct iavf_hw;\n-\n-/* HMC element context information */\n-\n-/* Rx queue context data\n- *\n- * The sizes of the variables may be larger than needed due to crossing byte\n- * boundaries. If we do not have the width of the variable set to the correct\n- * size then we could end up shifting bits off the top of the variable when the\n- * variable is at the top of a byte and crosses over into the next byte.\n- */\n-struct iavf_hmc_obj_rxq {\n-\tu16 head;\n-\tu16 cpuid; /* bigger than needed, see above for reason */\n-\tu64 base;\n-\tu16 qlen;\n-#define IAVF_RXQ_CTX_DBUFF_SHIFT 7\n-\tu16 dbuff; /* bigger than needed, see above for reason */\n-#define IAVF_RXQ_CTX_HBUFF_SHIFT 6\n-\tu16 hbuff; /* bigger than needed, see above for reason */\n-\tu8 dtype;\n-\tu8 dsize;\n-\tu8 crcstrip;\n-\tu8 fc_ena;\n-\tu8 l2tsel;\n-\tu8 hsplit_0;\n-\tu8 hsplit_1;\n-\tu8 showiv;\n-\tu32 rxmax; /* bigger than needed, see above for reason */\n-\tu8 tphrdesc_ena;\n-\tu8 tphwdesc_ena;\n-\tu8 tphdata_ena;\n-\tu8 tphhead_ena;\n-\tu16 lrxqthresh; /* bigger than needed, see above for reason */\n-\tu8 prefena;\t/* NOTE: normally must be set to 1 at init */\n-};\n-\n-/* Tx queue context data\n-*\n-* The sizes of the variables may be larger than needed due to crossing byte\n-* boundaries. If we do not have the width of the variable set to the correct\n-* size then we could end up shifting bits off the top of the variable when the\n-* variable is at the top of a byte and crosses over into the next byte.\n-*/\n-struct iavf_hmc_obj_txq {\n-\tu16 head;\n-\tu8 new_context;\n-\tu64 base;\n-\tu8 fc_ena;\n-\tu8 timesync_ena;\n-\tu8 fd_ena;\n-\tu8 alt_vlan_ena;\n-\tu16 thead_wb;\n-\tu8 cpuid;\n-\tu8 head_wb_ena;\n-\tu16 qlen;\n-\tu8 tphrdesc_ena;\n-\tu8 tphrpacket_ena;\n-\tu8 tphwdesc_ena;\n-\tu64 head_wb_addr;\n-\tu32 crc;\n-\tu16 rdylist;\n-\tu8 rdylist_act;\n-};\n-\n-/* for hsplit_0 field of Rx HMC context */\n-enum iavf_hmc_obj_rx_hsplit_0 {\n-\tIAVF_HMC_OBJ_RX_HSPLIT_0_NO_SPLIT = 0,\n-\tIAVF_HMC_OBJ_RX_HSPLIT_0_SPLIT_L2 = 1,\n-\tIAVF_HMC_OBJ_RX_HSPLIT_0_SPLIT_IP = 2,\n-\tIAVF_HMC_OBJ_RX_HSPLIT_0_SPLIT_TCP_UDP = 4,\n-\tIAVF_HMC_OBJ_RX_HSPLIT_0_SPLIT_SCTP = 8,\n-};\n-\n-/* fcoe_cntx and fcoe_filt are for debugging purpose only */\n-struct iavf_hmc_obj_fcoe_cntx {\n-\tu32 rsv[32];\n-};\n-\n-struct iavf_hmc_obj_fcoe_filt {\n-\tu32 rsv[8];\n-};\n-\n-/* Context sizes for LAN objects */\n-enum iavf_hmc_lan_object_size {\n-\tIAVF_HMC_LAN_OBJ_SZ_8 = 0x3,\n-\tIAVF_HMC_LAN_OBJ_SZ_16 = 0x4,\n-\tIAVF_HMC_LAN_OBJ_SZ_32 = 0x5,\n-\tIAVF_HMC_LAN_OBJ_SZ_64 = 0x6,\n-\tIAVF_HMC_LAN_OBJ_SZ_128 = 0x7,\n-\tIAVF_HMC_LAN_OBJ_SZ_256 = 0x8,\n-\tIAVF_HMC_LAN_OBJ_SZ_512 = 0x9,\n-};\n-\n-#define IAVF_HMC_L2OBJ_BASE_ALIGNMENT 512\n-#define IAVF_HMC_OBJ_SIZE_TXQ 128\n-#define IAVF_HMC_OBJ_SIZE_RXQ 32\n-#define IAVF_HMC_OBJ_SIZE_FCOE_CNTX 64\n-#define IAVF_HMC_OBJ_SIZE_FCOE_FILT 64\n-\n-enum iavf_hmc_lan_rsrc_type {\n-\tIAVF_HMC_LAN_FULL = 0,\n-\tIAVF_HMC_LAN_TX = 1,\n-\tIAVF_HMC_LAN_RX = 2,\n-\tIAVF_HMC_FCOE_CTX = 3,\n-\tIAVF_HMC_FCOE_FILT = 4,\n-\tIAVF_HMC_LAN_MAX = 5\n-};\n-\n-enum iavf_hmc_model {\n-\tIAVF_HMC_MODEL_DIRECT_PREFERRED = 0,\n-\tIAVF_HMC_MODEL_DIRECT_ONLY = 1,\n-\tIAVF_HMC_MODEL_PAGED_ONLY = 2,\n-\tIAVF_HMC_MODEL_UNKNOWN,\n-};\n-\n-struct iavf_hmc_lan_create_obj_info {\n-\tstruct iavf_hmc_info *hmc_info;\n-\tu32 rsrc_type;\n-\tu32 start_idx;\n-\tu32 count;\n-\tenum iavf_sd_entry_type entry_type;\n-\tu64 direct_mode_sz;\n-};\n-\n-struct iavf_hmc_lan_delete_obj_info {\n-\tstruct iavf_hmc_info *hmc_info;\n-\tu32 rsrc_type;\n-\tu32 start_idx;\n-\tu32 count;\n-};\n-\n-enum iavf_status_code iavf_init_lan_hmc(struct iavf_hw *hw, u32 txq_num,\n-\t\t\t\t\tu32 rxq_num, u32 fcoe_cntx_num,\n-\t\t\t\t\tu32 fcoe_filt_num);\n-enum iavf_status_code iavf_configure_lan_hmc(struct iavf_hw *hw,\n-\t\t\t\t\t enum iavf_hmc_model model);\n-enum iavf_status_code iavf_shutdown_lan_hmc(struct iavf_hw *hw);\n-\n-u64 iavf_calculate_l2fpm_size(u32 txq_num, u32 rxq_num,\n-\t\t\t u32 fcoe_cntx_num, u32 fcoe_filt_num);\n-enum iavf_status_code iavf_get_lan_tx_queue_context(struct iavf_hw *hw,\n-\t\t\t\t\t\t u16 queue,\n-\t\t\t\t\t\t struct iavf_hmc_obj_txq *s);\n-enum iavf_status_code iavf_clear_lan_tx_queue_context(struct iavf_hw *hw,\n-\t\t\t\t\t\t u16 queue);\n-enum iavf_status_code iavf_set_lan_tx_queue_context(struct iavf_hw *hw,\n-\t\t\t\t\t\t u16 queue,\n-\t\t\t\t\t\t struct iavf_hmc_obj_txq *s);\n-enum iavf_status_code iavf_get_lan_rx_queue_context(struct iavf_hw *hw,\n-\t\t\t\t\t\t u16 queue,\n-\t\t\t\t\t\t struct iavf_hmc_obj_rxq *s);\n-enum iavf_status_code iavf_clear_lan_rx_queue_context(struct iavf_hw *hw,\n-\t\t\t\t\t\t u16 queue);\n-enum iavf_status_code iavf_set_lan_rx_queue_context(struct iavf_hw *hw,\n-\t\t\t\t\t\t u16 queue,\n-\t\t\t\t\t\t struct iavf_hmc_obj_rxq *s);\n-enum iavf_status_code iavf_create_lan_hmc_object(struct iavf_hw *hw,\n-\t\t\t\tstruct iavf_hmc_lan_create_obj_info *info);\n-enum iavf_status_code iavf_delete_lan_hmc_object(struct iavf_hw *hw,\n-\t\t\t\tstruct iavf_hmc_lan_delete_obj_info *info);\n-\n-#endif /* _IAVF_LAN_HMC_H_ */\ndiff --git a/drivers/net/iavf/base/iavf_type.h b/drivers/net/iavf/base/iavf_type.h\nindex eb0eaa4f2..4ccde31a2 100644\n--- a/drivers/net/iavf/base/iavf_type.h\n+++ b/drivers/net/iavf/base/iavf_type.h\n@@ -9,10 +9,10 @@\n #include \"iavf_osdep.h\"\n #include \"iavf_register.h\"\n #include \"iavf_adminq.h\"\n-#include \"iavf_hmc.h\"\n-#include \"iavf_lan_hmc.h\"\n #include \"iavf_devids.h\"\n \n+#define IAVF_RXQ_CTX_DBUFF_SHIFT 7\n+\n #define UNREFERENCED_XPARAMETER\n #define UNREFERENCED_1PARAMETER(_p) (_p);\n #define UNREFERENCED_2PARAMETER(_p, _q) (_p); (_q);\n@@ -683,9 +683,6 @@ struct iavf_hw {\n \tbool nvm_release_on_done;\n \tu16 nvm_wait_opcode;\n \n-\t/* HMC info */\n-\tstruct iavf_hmc_info hmc; /* HMC info struct */\n-\n \t/* LLDP/DCBX Status */\n \tu16 dcbx_status;\n \n", "prefixes": [ "01/17" ] }