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{
    "id": 63015,
    "url": "http://patches.dpdk.org/api/patches/63015/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1573722187-148846-19-git-send-email-rosen.xu@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1573722187-148846-19-git-send-email-rosen.xu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1573722187-148846-19-git-send-email-rosen.xu@intel.com",
    "date": "2019-11-14T09:03:06",
    "name": "[v18,18/19] raw/ifpga/base: add multiple cards support",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "ebf62bddfe43d6f501ed5172b89101a7b5d5abc8",
    "submitter": {
        "id": 946,
        "url": "http://patches.dpdk.org/api/people/946/?format=api",
        "name": "Xu, Rosen",
        "email": "rosen.xu@intel.com"
    },
    "delegate": {
        "id": 31221,
        "url": "http://patches.dpdk.org/api/users/31221/?format=api",
        "username": "yexl",
        "first_name": "xiaolong",
        "last_name": "ye",
        "email": "xiaolong.ye@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1573722187-148846-19-git-send-email-rosen.xu@intel.com/mbox/",
    "series": [
        {
            "id": 7455,
            "url": "http://patches.dpdk.org/api/series/7455/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7455",
            "date": "2019-11-14T09:02:48",
            "name": "add PCIe AER disable and IRQ support for ipn3ke",
            "version": 18,
            "mbox": "http://patches.dpdk.org/series/7455/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/63015/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/63015/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 73FC6A04C2;\n\tThu, 14 Nov 2019 10:07:19 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B5EAD1BF0E;\n\tThu, 14 Nov 2019 10:05:10 +0100 (CET)",
            "from mga17.intel.com (mga17.intel.com [192.55.52.151])\n by dpdk.org (Postfix) with ESMTP id 3300C1BEF1\n for <dev@dpdk.org>; Thu, 14 Nov 2019 10:05:01 +0100 (CET)",
            "from fmsmga006.fm.intel.com ([10.253.24.20])\n by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 14 Nov 2019 01:05:00 -0800",
            "from dpdk-rosen-02.sh.intel.com ([10.67.110.156])\n by fmsmga006.fm.intel.com with ESMTP; 14 Nov 2019 01:04:58 -0800"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.68,302,1569308400\"; d=\"scan'208\";a=\"406259667\"",
        "From": "Rosen Xu <rosen.xu@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "rosen.xu@intel.com, tianfei.zhang@intel.com, andy.pei@intel.com,\n xiaolong.ye@intel.com, ferruh.yigit@intel.com",
        "Date": "Thu, 14 Nov 2019 17:03:06 +0800",
        "Message-Id": "<1573722187-148846-19-git-send-email-rosen.xu@intel.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1573722187-148846-1-git-send-email-rosen.xu@intel.com>",
        "References": "<1571917119-149534-2-git-send-email-andy.pei@intel.com>\n <1573722187-148846-1-git-send-email-rosen.xu@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v18 18/19] raw/ifpga/base: add multiple cards\n\tsupport",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Tianfei zhang <tianfei.zhang@intel.com>\n\nIn PAC N3000 card, there is one MAX10 chip in each card, and\nall of the sensors are connected to MAX10 chip. To support multiple\ncards in one server, we introducing a sensor device list under\nintel_max10_device instead of a global list. On the other hand, we\nusing separate intel_max10_device instance for each opae_adatper.\n\nAdd mutex lock on do_transaction() function for SPI driver to avoid\nrace condition.\n\nSigned-off-by: Tianfei zhang <tianfei.zhang@intel.com>\nSigned-off-by: Andy Pei <andy.pei@intel.com>\n---\n drivers/raw/ifpga/base/ifpga_fme.c            |  40 +++++++---\n drivers/raw/ifpga/base/opae_debug.c           |   3 +\n drivers/raw/ifpga/base/opae_hw_api.c          |  14 ++--\n drivers/raw/ifpga/base/opae_hw_api.h          |  15 ++--\n drivers/raw/ifpga/base/opae_i2c.c             |  44 ++++++++---\n drivers/raw/ifpga/base/opae_i2c.h             |   3 +-\n drivers/raw/ifpga/base/opae_intel_max10.c     | 110 ++++++++++++++------------\n drivers/raw/ifpga/base/opae_intel_max10.h     |  19 +++--\n drivers/raw/ifpga/base/opae_spi.c             |   5 --\n drivers/raw/ifpga/base/opae_spi.h             |   3 +-\n drivers/raw/ifpga/base/opae_spi_transaction.c |  44 +++++++++--\n drivers/raw/ifpga/ifpga_rawdev.c              |  14 ++--\n 12 files changed, 205 insertions(+), 109 deletions(-)",
    "diff": "diff --git a/drivers/raw/ifpga/base/ifpga_fme.c b/drivers/raw/ifpga/base/ifpga_fme.c\nindex 799d67d..c31a94c 100644\n--- a/drivers/raw/ifpga/base/ifpga_fme.c\n+++ b/drivers/raw/ifpga/base/ifpga_fme.c\n@@ -839,8 +839,13 @@ static int board_type_to_info(u32 type,\n static int fme_get_board_interface(struct ifpga_fme_hw *fme)\n {\n \tstruct fme_bitstream_id id;\n+\tstruct ifpga_hw *hw;\n \tu32 val;\n \n+\thw = fme->parent;\n+\tif (!hw)\n+\t\treturn -ENODEV;\n+\n \tif (fme_hdr_get_bitstream_id(fme, &id.id))\n \t\treturn -EINVAL;\n \n@@ -854,7 +859,10 @@ static int fme_get_board_interface(struct ifpga_fme_hw *fme)\n \tfme->board_info.seu = id.seu;\n \tfme->board_info.ptp = id.ptp;\n \n-\tdev_info(fme, \"found: board: %s type: %s\\n\",\n+\tdev_info(fme, \"found: PCI dev: %02x:%02x:%x board: %s type: %s\\n\",\n+\t\t\thw->pci_data->bus,\n+\t\t\thw->pci_data->devid,\n+\t\t\thw->pci_data->function,\n \t\t\tboard_major_to_string(fme->board_info.major),\n \t\t\tboard_type_to_string(fme->board_info.type));\n \n@@ -882,11 +890,11 @@ static int fme_get_board_interface(struct ifpga_fme_hw *fme)\n \t\t\tfme->board_info.nums_of_fvl,\n \t\t\tfme->board_info.ports_per_fvl);\n \n-\tif (max10_sys_read(MAX10_BUILD_VER, &val))\n+\tif (max10_sys_read(fme->max10_dev, MAX10_BUILD_VER, &val))\n \t\treturn -EINVAL;\n \tfme->board_info.max10_version = val & 0xffffff;\n \n-\tif (max10_sys_read(NIOS2_FW_VERSION, &val))\n+\tif (max10_sys_read(fme->max10_dev, NIOS2_FW_VERSION, &val))\n \t\treturn -EINVAL;\n \tfme->board_info.nios_fw_version = val & 0xffffff;\n \n@@ -897,12 +905,12 @@ static int fme_get_board_interface(struct ifpga_fme_hw *fme)\n \treturn 0;\n }\n \n-static int spi_self_checking(void)\n+static int spi_self_checking(struct intel_max10_device *dev)\n {\n \tu32 val;\n \tint ret;\n \n-\tret = max10_sys_read(MAX10_TEST_REG, &val);\n+\tret = max10_sys_read(dev, MAX10_TEST_REG, &val);\n \tif (ret)\n \t\treturn -EIO;\n \n@@ -937,10 +945,11 @@ static int fme_spi_init(struct ifpga_feature *feature)\n \t\tgoto spi_fail;\n \t}\n \n+\n \tfme->max10_dev = max10;\n \n \t/* SPI self test */\n-\tif (spi_self_checking()) {\n+\tif (spi_self_checking(max10)) {\n \t\tret = -EIO;\n \t\tgoto max10_fail;\n \t}\n@@ -1041,8 +1050,18 @@ static int fme_nios_spi_init(struct ifpga_feature *feature)\n \tstruct ifpga_fme_hw *fme = (struct ifpga_fme_hw *)feature->parent;\n \tstruct altera_spi_device *spi_master;\n \tstruct intel_max10_device *max10;\n+\tstruct ifpga_hw *hw;\n+\tstruct opae_manager *mgr;\n \tint ret = 0;\n \n+\thw = fme->parent;\n+\tif (!hw)\n+\t\treturn -ENODEV;\n+\n+\tmgr = hw->adapter->mgr;\n+\tif (!mgr)\n+\t\treturn -ENODEV;\n+\n \tdev_info(fme, \"FME SPI Master (NIOS) Init.\\n\");\n \tdev_debug(fme, \"FME SPI base addr %p.\\n\",\n \t\t\tfeature->addr);\n@@ -1080,12 +1099,15 @@ static int fme_nios_spi_init(struct ifpga_feature *feature)\n \t\tgoto release_dev;\n \t}\n \n+\tmax10->bus = hw->pci_data->bus;\n+\n \tfme_get_board_interface(fme);\n \n \tfme->max10_dev = max10;\n+\tmgr->sensor_list = &max10->opae_sensor_list;\n \n \t/* SPI self test */\n-\tif (spi_self_checking())\n+\tif (spi_self_checking(max10))\n \t\tgoto spi_fail;\n \n \treturn ret;\n@@ -1344,7 +1366,7 @@ int fme_mgr_get_retimer_status(struct ifpga_fme_hw *fme,\n \tif (!dev)\n \t\treturn -ENODEV;\n \n-\tif (max10_sys_read(PKVL_LINK_STATUS, &val)) {\n+\tif (max10_sys_read(dev, PKVL_LINK_STATUS, &val)) {\n \t\tdev_err(dev, \"%s: read pkvl status fail\\n\", __func__);\n \t\treturn -EINVAL;\n \t}\n@@ -1372,7 +1394,7 @@ int fme_mgr_get_sensor_value(struct ifpga_fme_hw *fme,\n \tif (!dev)\n \t\treturn -ENODEV;\n \n-\tif (max10_sys_read(sensor->value_reg, value)) {\n+\tif (max10_sys_read(dev, sensor->value_reg, value)) {\n \t\tdev_err(dev, \"%s: read sensor value register 0x%x fail\\n\",\n \t\t\t\t__func__, sensor->value_reg);\n \t\treturn -EINVAL;\ndiff --git a/drivers/raw/ifpga/base/opae_debug.c b/drivers/raw/ifpga/base/opae_debug.c\nindex 88f2d5c..dad3ea3 100644\n--- a/drivers/raw/ifpga/base/opae_debug.c\n+++ b/drivers/raw/ifpga/base/opae_debug.c\n@@ -59,6 +59,9 @@ static void opae_adapter_data_dump(void *data)\n \t\topae_log(\"OPAE Adapter Type = PCI\\n\");\n \t\topae_log(\"PCI Device ID: 0x%04x\\n\", d_pci->device_id);\n \t\topae_log(\"PCI Vendor ID: 0x%04x\\n\", d_pci->vendor_id);\n+\t\topae_log(\"PCI bus: 0x%04x\\n\", d_pci->bus);\n+\t\topae_log(\"PCI devid: 0x%04x\\n\", d_pci->devid);\n+\t\topae_log(\"PCI function: 0x%04x\\n\", d_pci->function);\n \n \t\tfor (i = 0; i < PCI_MAX_RESOURCE; i++) {\n \t\t\tr = &d_pci->region[i];\ndiff --git a/drivers/raw/ifpga/base/opae_hw_api.c b/drivers/raw/ifpga/base/opae_hw_api.c\nindex 1ccc967..c969dfe 100644\n--- a/drivers/raw/ifpga/base/opae_hw_api.c\n+++ b/drivers/raw/ifpga/base/opae_hw_api.c\n@@ -583,11 +583,12 @@ int opae_manager_get_retimer_status(struct opae_manager *mgr,\n  * Return: the pointer of the opae_sensor_info\n  */\n struct opae_sensor_info *\n-opae_mgr_get_sensor_by_id(unsigned int id)\n+opae_mgr_get_sensor_by_id(struct opae_manager *mgr,\n+\t\tunsigned int id)\n {\n \tstruct opae_sensor_info *sensor;\n \n-\topae_mgr_for_each_sensor(sensor)\n+\topae_mgr_for_each_sensor(mgr, sensor)\n \t\tif (sensor->id == id)\n \t\t\treturn sensor;\n \n@@ -601,11 +602,12 @@ struct opae_sensor_info *\n  * Return: the pointer of the opae_sensor_info\n  */\n struct opae_sensor_info *\n-opae_mgr_get_sensor_by_name(const char *name)\n+opae_mgr_get_sensor_by_name(struct opae_manager *mgr,\n+\t\tconst char *name)\n {\n \tstruct opae_sensor_info *sensor;\n \n-\topae_mgr_for_each_sensor(sensor)\n+\topae_mgr_for_each_sensor(mgr, sensor)\n \t\tif (!strcmp(sensor->name, name))\n \t\t\treturn sensor;\n \n@@ -630,7 +632,7 @@ struct opae_sensor_info *\n \tif (!mgr)\n \t\treturn -EINVAL;\n \n-\tsensor = opae_mgr_get_sensor_by_name(name);\n+\tsensor = opae_mgr_get_sensor_by_name(mgr, name);\n \tif (!sensor)\n \t\treturn -ENODEV;\n \n@@ -658,7 +660,7 @@ struct opae_sensor_info *\n \tif (!mgr)\n \t\treturn -EINVAL;\n \n-\tsensor = opae_mgr_get_sensor_by_id(id);\n+\tsensor = opae_mgr_get_sensor_by_id(mgr, id);\n \tif (!sensor)\n \t\treturn -ENODEV;\n \ndiff --git a/drivers/raw/ifpga/base/opae_hw_api.h b/drivers/raw/ifpga/base/opae_hw_api.h\nindex b78fbd5..cdf369f 100644\n--- a/drivers/raw/ifpga/base/opae_hw_api.h\n+++ b/drivers/raw/ifpga/base/opae_hw_api.h\n@@ -40,6 +40,7 @@ struct opae_manager {\n \tstruct opae_adapter *adapter;\n \tstruct opae_manager_ops *ops;\n \tstruct opae_manager_networking_ops *network_ops;\n+\tstruct opae_sensor_list *sensor_list;\n \tvoid *data;\n };\n \n@@ -75,9 +76,8 @@ struct opae_manager_networking_ops {\n \t\t\tstruct opae_retimer_status *status);\n };\n \n-extern struct opae_sensor_list opae_sensor_list;\n-#define opae_mgr_for_each_sensor(sensor) \\\n-\tTAILQ_FOREACH(sensor, &opae_sensor_list, node)\n+#define opae_mgr_for_each_sensor(mgr, sensor) \\\n+\tTAILQ_FOREACH(sensor, mgr->sensor_list, node)\n \n /* OPAE Manager APIs */\n struct opae_manager *\n@@ -88,8 +88,10 @@ int opae_manager_flash(struct opae_manager *mgr, int acc_id, const char *buf,\n \t\t       u32 size, u64 *status);\n int opae_manager_get_eth_group_region_info(struct opae_manager *mgr,\n \t\tu8 group_id, struct opae_eth_group_region_info *info);\n-struct opae_sensor_info *opae_mgr_get_sensor_by_name(const char *name);\n-struct opae_sensor_info *opae_mgr_get_sensor_by_id(unsigned int id);\n+struct opae_sensor_info *opae_mgr_get_sensor_by_name(struct opae_manager *mgr,\n+\t\tconst char *name);\n+struct opae_sensor_info *opae_mgr_get_sensor_by_id(struct opae_manager *mgr,\n+\t\tunsigned int id);\n int opae_mgr_get_sensor_value_by_name(struct opae_manager *mgr,\n \t\tconst char *name, unsigned int *value);\n int opae_mgr_get_sensor_value_by_id(struct opae_manager *mgr,\n@@ -241,6 +243,9 @@ struct opae_adapter_data_pci {\n \tenum opae_adapter_type type;\n \tu16 device_id;\n \tu16 vendor_id;\n+\tu16 bus; /*Device bus for PCI */\n+\tu16 devid; /* Device ID */\n+\tu16 function; /* Device function */\n \tstruct opae_reg_region region[PCI_MAX_RESOURCE];\n \tint vfio_dev_fd;  /* VFIO device file descriptor */\n };\ndiff --git a/drivers/raw/ifpga/base/opae_i2c.c b/drivers/raw/ifpga/base/opae_i2c.c\nindex f8bc247..846d751 100644\n--- a/drivers/raw/ifpga/base/opae_i2c.c\n+++ b/drivers/raw/ifpga/base/opae_i2c.c\n@@ -28,6 +28,9 @@ int i2c_read(struct altera_i2c_dev *dev, int flags, unsigned int slave_addr,\n {\n \tu8 msgbuf[2];\n \tint i = 0;\n+\tint ret;\n+\n+\tpthread_mutex_lock(&dev->lock);\n \n \tif (flags & I2C_FLAG_ADDR16)\n \t\tmsgbuf[i++] = offset >> 8;\n@@ -49,10 +52,16 @@ int i2c_read(struct altera_i2c_dev *dev, int flags, unsigned int slave_addr,\n \t\t},\n \t};\n \n-\tif (!dev->xfer)\n-\t\treturn -ENODEV;\n+\tif (!dev->xfer) {\n+\t\tret = -ENODEV;\n+\t\tgoto exit;\n+\t}\n+\n+\tret = i2c_transfer(dev, msg, 2);\n \n-\treturn i2c_transfer(dev, msg, 2);\n+exit:\n+\tpthread_mutex_unlock(&dev->lock);\n+\treturn ret;\n }\n \n int i2c_write(struct altera_i2c_dev *dev, int flags, unsigned int slave_addr,\n@@ -63,12 +72,18 @@ int i2c_write(struct altera_i2c_dev *dev, int flags, unsigned int slave_addr,\n \tint ret;\n \tint i = 0;\n \n-\tif (!dev->xfer)\n-\t\treturn -ENODEV;\n+\tpthread_mutex_lock(&dev->lock);\n+\n+\tif (!dev->xfer) {\n+\t\tret = -ENODEV;\n+\t\tgoto exit;\n+\t}\n \n \tbuf = opae_malloc(I2C_MAX_OFFSET_LEN + len);\n-\tif (!buf)\n-\t\treturn -ENOMEM;\n+\tif (!buf) {\n+\t\tret = -ENOMEM;\n+\t\tgoto exit;\n+\t}\n \n \tmsg.addr = slave_addr;\n \tmsg.flags = 0;\n@@ -84,6 +99,8 @@ int i2c_write(struct altera_i2c_dev *dev, int flags, unsigned int slave_addr,\n \tret = i2c_transfer(dev, &msg, 1);\n \n \topae_free(buf);\n+exit:\n+\tpthread_mutex_unlock(&dev->lock);\n \treturn ret;\n }\n \n@@ -477,14 +494,19 @@ struct altera_i2c_dev *altera_i2c_probe(void *base)\n \tdev->i2c_clk = dev->i2c_param.ref_clk * 1000000;\n \tdev->xfer = altera_i2c_xfer;\n \n+\tif (pthread_mutex_init(&dev->lock, NULL))\n+\t\treturn NULL;\n+\n \taltera_i2c_hardware_init(dev);\n \n \treturn dev;\n }\n \n-int altera_i2c_remove(struct altera_i2c_dev *dev)\n+void altera_i2c_remove(struct altera_i2c_dev *dev)\n {\n-\taltera_i2c_disable(dev);\n-\n-\treturn 0;\n+\tif (dev) {\n+\t\tpthread_mutex_destroy(&dev->lock);\n+\t\taltera_i2c_disable(dev);\n+\t\topae_free(dev);\n+\t}\n }\ndiff --git a/drivers/raw/ifpga/base/opae_i2c.h b/drivers/raw/ifpga/base/opae_i2c.h\nindex 8890c8f..266e127 100644\n--- a/drivers/raw/ifpga/base/opae_i2c.h\n+++ b/drivers/raw/ifpga/base/opae_i2c.h\n@@ -93,6 +93,7 @@ struct altera_i2c_dev {\n \tu32 isr_mask;\n \tu8 *buf;\n \tint (*xfer)(struct altera_i2c_dev *dev, struct i2c_msg *msg, int num);\n+\tpthread_mutex_t lock;\n };\n \n /**\n@@ -114,7 +115,7 @@ enum i2c_msg_flags {\n };\n \n struct altera_i2c_dev *altera_i2c_probe(void *base);\n-int altera_i2c_remove(struct altera_i2c_dev *dev);\n+void altera_i2c_remove(struct altera_i2c_dev *dev);\n int i2c_read(struct altera_i2c_dev *dev, int flags, unsigned int slave_addr,\n \t\tu32 offset, u8 *buf, u32 count);\n int i2c_write(struct altera_i2c_dev *dev, int flags, unsigned int slave_addr,\ndiff --git a/drivers/raw/ifpga/base/opae_intel_max10.c b/drivers/raw/ifpga/base/opae_intel_max10.c\nindex 748ab56..8e23ca1 100644\n--- a/drivers/raw/ifpga/base/opae_intel_max10.c\n+++ b/drivers/raw/ifpga/base/opae_intel_max10.c\n@@ -5,45 +5,50 @@\n #include \"opae_intel_max10.h\"\n #include <libfdt.h>\n \n-static struct intel_max10_device *g_max10;\n-\n-struct opae_sensor_list opae_sensor_list =\n-\tTAILQ_HEAD_INITIALIZER(opae_sensor_list);\n-\n-int max10_reg_read(unsigned int reg, unsigned int *val)\n+int max10_reg_read(struct intel_max10_device *dev,\n+\tunsigned int reg, unsigned int *val)\n {\n-\tif (!g_max10)\n+\tif (!dev)\n \t\treturn -ENODEV;\n \n-\treturn spi_transaction_read(g_max10->spi_tran_dev,\n+\tdev_debug(dev, \"%s: bus:0x%x, reg:0x%x\\n\", __func__, dev->bus, reg);\n+\n+\treturn spi_transaction_read(dev->spi_tran_dev,\n \t\t\treg, 4, (unsigned char *)val);\n }\n \n-int max10_reg_write(unsigned int reg, unsigned int val)\n+int max10_reg_write(struct intel_max10_device *dev,\n+\tunsigned int reg, unsigned int val)\n {\n \tunsigned int tmp = val;\n \n-\tif (!g_max10)\n+\tif (!dev)\n \t\treturn -ENODEV;\n \n-\treturn spi_transaction_write(g_max10->spi_tran_dev,\n+\tdev_debug(dev, \"%s: bus:0x%x, reg:0x%x, val:0x%x\\n\", __func__,\n+\t\t\tdev->bus, reg, val);\n+\n+\treturn spi_transaction_write(dev->spi_tran_dev,\n \t\t\treg, 4, (unsigned char *)&tmp);\n }\n \n-int max10_sys_read(unsigned int offset, unsigned int *val)\n+int max10_sys_read(struct intel_max10_device *dev,\n+\tunsigned int offset, unsigned int *val)\n {\n-\tif (!g_max10)\n+\tif (!dev)\n \t\treturn -ENODEV;\n \n-\treturn max10_reg_read(g_max10->base + offset, val);\n+\n+\treturn max10_reg_read(dev, dev->base + offset, val);\n }\n \n-int max10_sys_write(unsigned int offset, unsigned int val)\n+int max10_sys_write(struct intel_max10_device *dev,\n+\tunsigned int offset, unsigned int val)\n {\n-\tif (!g_max10)\n+\tif (!dev)\n \t\treturn -ENODEV;\n \n-\treturn max10_reg_write(g_max10->base + offset, val);\n+\treturn max10_reg_write(dev, dev->base + offset, val);\n }\n \n static struct max10_compatible_id max10_id_table[] = {\n@@ -86,8 +91,8 @@ static void max10_check_capability(struct intel_max10_device *max10)\n \t\tmax10->flags |= MAX10_FLAGS_MAC_CACHE;\n }\n \n-static int altera_nor_flash_read(u32 offset,\n-\t\tvoid *buffer, u32 len)\n+static int altera_nor_flash_read(struct intel_max10_device *dev,\n+\tu32 offset, void *buffer, u32 len)\n {\n \tint word_len;\n \tint i;\n@@ -95,13 +100,13 @@ static int altera_nor_flash_read(u32 offset,\n \tunsigned int value;\n \tint ret;\n \n-\tif (!buffer || len <= 0)\n+\tif (!dev || !buffer || len <= 0)\n \t\treturn -ENODEV;\n \n \tword_len = len/4;\n \n \tfor (i = 0; i < word_len; i++) {\n-\t\tret = max10_reg_read(offset + i*4,\n+\t\tret = max10_reg_read(dev, offset + i*4,\n \t\t\t\t&value);\n \t\tif (ret)\n \t\t\treturn -EBUSY;\n@@ -112,12 +117,12 @@ static int altera_nor_flash_read(u32 offset,\n \treturn 0;\n }\n \n-static int enable_nor_flash(bool on)\n+static int enable_nor_flash(struct intel_max10_device *dev, bool on)\n {\n \tunsigned int val = 0;\n \tint ret;\n \n-\tret = max10_sys_read(RSU_REG, &val);\n+\tret = max10_sys_read(dev, RSU_REG, &val);\n \tif (ret) {\n \t\tdev_err(NULL \"enabling flash error\\n\");\n \t\treturn ret;\n@@ -128,7 +133,7 @@ static int enable_nor_flash(bool on)\n \telse\n \t\tval &= ~RSU_ENABLE;\n \n-\treturn max10_sys_write(RSU_REG, val);\n+\treturn max10_sys_write(dev, RSU_REG, val);\n }\n \n static int init_max10_device_table(struct intel_max10_device *max10)\n@@ -140,7 +145,7 @@ static int init_max10_device_table(struct intel_max10_device *max10)\n \tu32 dt_size, dt_addr, val;\n \tint ret;\n \n-\tret = max10_sys_read(DT_AVAIL_REG, &val);\n+\tret = max10_sys_read(max10, DT_AVAIL_REG, &val);\n \tif (ret) {\n \t\tdev_err(max10 \"cannot read DT_AVAIL_REG\\n\");\n \t\treturn ret;\n@@ -151,19 +156,19 @@ static int init_max10_device_table(struct intel_max10_device *max10)\n \t\treturn -EINVAL;\n \t}\n \n-\tret = max10_sys_read(DT_BASE_ADDR_REG, &dt_addr);\n+\tret = max10_sys_read(max10, DT_BASE_ADDR_REG, &dt_addr);\n \tif (ret) {\n \t\tdev_info(max10 \"cannot get base addr of device table\\n\");\n \t\treturn ret;\n \t}\n \n-\tret = enable_nor_flash(true);\n+\tret = enable_nor_flash(max10, true);\n \tif (ret) {\n \t\tdev_err(max10 \"fail to enable flash\\n\");\n \t\treturn ret;\n \t}\n \n-\tret = altera_nor_flash_read(dt_addr, &hdr, sizeof(hdr));\n+\tret = altera_nor_flash_read(max10, dt_addr, &hdr, sizeof(hdr));\n \tif (ret) {\n \t\tdev_err(max10 \"read fdt header fail\\n\");\n \t\tgoto done;\n@@ -188,7 +193,7 @@ static int init_max10_device_table(struct intel_max10_device *max10)\n \t\tgoto done;\n \t}\n \n-\tret = altera_nor_flash_read(dt_addr, fdt_root, dt_size);\n+\tret = altera_nor_flash_read(max10, dt_addr, fdt_root, dt_size);\n \tif (ret) {\n \t\tdev_err(max10 \"cannot read device table\\n\");\n \t\tgoto done;\n@@ -207,7 +212,7 @@ static int init_max10_device_table(struct intel_max10_device *max10)\n \tmax10->fdt_root = fdt_root;\n \n done:\n-\tret = enable_nor_flash(false);\n+\tret = enable_nor_flash(max10, false);\n \n \tif (ret && fdt_root)\n \t\topae_free(fdt_root);\n@@ -298,12 +303,12 @@ static int fdt_get_named_reg(const void *fdt, int node, const char *name,\n \treturn fdt_get_reg(fdt, node, idx, start, size);\n }\n \n-static void max10_sensor_uinit(void)\n+static void max10_sensor_uinit(struct intel_max10_device *dev)\n {\n \tstruct opae_sensor_info *info;\n \n-\tTAILQ_FOREACH(info, &opae_sensor_list, node) {\n-\t\tTAILQ_REMOVE(&opae_sensor_list, info, node);\n+\tTAILQ_FOREACH(info, &dev->opae_sensor_list, node) {\n+\t\tTAILQ_REMOVE(&dev->opae_sensor_list, info, node);\n \t\topae_free(info);\n \t}\n }\n@@ -313,8 +318,8 @@ static bool sensor_reg_valid(struct sensor_reg *reg)\n \treturn !!reg->size;\n }\n \n-static int max10_add_sensor(struct raw_sensor_info *info,\n-\t\tstruct opae_sensor_info *sensor)\n+static int max10_add_sensor(struct intel_max10_device *dev,\n+\tstruct raw_sensor_info *info, struct opae_sensor_info *sensor)\n {\n \tint i;\n \tint ret = 0;\n@@ -332,12 +337,15 @@ static int max10_add_sensor(struct raw_sensor_info *info,\n \t\tif (!sensor_reg_valid(&info->regs[i]))\n \t\t\tcontinue;\n \n-\t\tret = max10_sys_read(info->regs[i].regoff, &val);\n+\t\tret = max10_sys_read(dev, info->regs[i].regoff, &val);\n \t\tif (ret)\n \t\t\tbreak;\n \n-\t\tif (val == 0xdeadbeef)\n+\t\tif (val == 0xdeadbeef) {\n+\t\t\tdev_debug(dev, \"%s: sensor:%s invalid 0x%x at:%d\\n\",\n+\t\t\t\t__func__, sensor->name, val, i);\n \t\t\tcontinue;\n+\t\t}\n \n \t\tval *= info->multiplier;\n \n@@ -458,7 +466,7 @@ static int max10_add_sensor(struct raw_sensor_info *info,\n \t\tnum = fdt_getprop(fdt_root, offset, \"multiplier\", NULL);\n \t\traw->multiplier = num ? fdt32_to_cpu(*num) : 1;\n \n-\t\tdev_info(dev, \"found sensor from DTB: %s: %s: %u: %u\\n\",\n+\t\tdev_debug(dev, \"found sensor from DTB: %s: %s: %u: %u\\n\",\n \t\t\t\traw->name, raw->type,\n \t\t\t\traw->id, raw->multiplier);\n \n@@ -473,15 +481,16 @@ static int max10_add_sensor(struct raw_sensor_info *info,\n \t\t\tgoto free_sensor;\n \t\t}\n \n-\t\tif (max10_add_sensor(raw, sensor)) {\n+\t\tif (max10_add_sensor(dev, raw, sensor)) {\n \t\t\tret = -EINVAL;\n \t\t\topae_free(sensor);\n \t\t\tgoto free_sensor;\n \t\t}\n \n-\t\tif (sensor->flags & OPAE_SENSOR_VALID)\n-\t\t\tTAILQ_INSERT_TAIL(&opae_sensor_list, sensor, node);\n-\t\telse\n+\t\tif (sensor->flags & OPAE_SENSOR_VALID) {\n+\t\t\tTAILQ_INSERT_TAIL(&dev->opae_sensor_list, sensor, node);\n+\t\t\tdev_info(dev, \"found valid sensor: %s\\n\", sensor->name);\n+\t\t} else\n \t\t\topae_free(sensor);\n \n \t\topae_free(raw);\n@@ -492,7 +501,7 @@ static int max10_add_sensor(struct raw_sensor_info *info,\n free_sensor:\n \tif (raw)\n \t\topae_free(raw);\n-\tmax10_sensor_uinit();\n+\tmax10_sensor_uinit(dev);\n \treturn ret;\n }\n \n@@ -500,7 +509,7 @@ static int check_max10_version(struct intel_max10_device *dev)\n {\n \tunsigned int v;\n \n-\tif (!max10_reg_read(MAX10_SEC_BASE_ADDR + MAX10_BUILD_VER,\n+\tif (!max10_reg_read(dev, MAX10_SEC_BASE_ADDR + MAX10_BUILD_VER,\n \t\t\t\t&v)) {\n \t\tif (v != 0xffffffff) {\n \t\t\tdev_info(dev, \"secure MAX10 detected\\n\");\n@@ -565,6 +574,8 @@ struct intel_max10_device *\n \tif (!dev)\n \t\treturn NULL;\n \n+\tTAILQ_INIT(&dev->opae_sensor_list);\n+\n \tdev->spi_master = spi;\n \n \tdev->spi_tran_dev = spi_transaction_init(spi, chipselect);\n@@ -573,9 +584,6 @@ struct intel_max10_device *\n \t\tgoto free_dev;\n \t}\n \n-\t/* set the max10 device firstly */\n-\tg_max10 = dev;\n-\n \t/* check the max10 version */\n \tret = check_max10_version(dev);\n \tif (ret) {\n@@ -601,7 +609,7 @@ struct intel_max10_device *\n \t}\n \n \t/* read FPGA loading information */\n-\tret = max10_sys_read(FPGA_PAGE_INFO, &val);\n+\tret = max10_sys_read(dev, FPGA_PAGE_INFO, &val);\n \tif (ret) {\n \t\tdev_err(dev, \"fail to get FPGA loading info\\n\");\n \t\tgoto release_max10_hw;\n@@ -611,14 +619,13 @@ struct intel_max10_device *\n \treturn dev;\n \n release_max10_hw:\n-\tmax10_sensor_uinit();\n+\tmax10_sensor_uinit(dev);\n free_dtb:\n \tif (dev->fdt_root)\n \t\topae_free(dev->fdt_root);\n \tif (dev->spi_tran_dev)\n \t\tspi_transaction_remove(dev->spi_tran_dev);\n free_dev:\n-\tg_max10 = NULL;\n \topae_free(dev);\n \n \treturn NULL;\n@@ -629,7 +636,7 @@ int intel_max10_device_remove(struct intel_max10_device *dev)\n \tif (!dev)\n \t\treturn 0;\n \n-\tmax10_sensor_uinit();\n+\tmax10_sensor_uinit(dev);\n \n \tif (dev->spi_tran_dev)\n \t\tspi_transaction_remove(dev->spi_tran_dev);\n@@ -637,7 +644,6 @@ int intel_max10_device_remove(struct intel_max10_device *dev)\n \tif (dev->fdt_root)\n \t\topae_free(dev->fdt_root);\n \n-\tg_max10 = NULL;\n \topae_free(dev);\n \n \treturn 0;\ndiff --git a/drivers/raw/ifpga/base/opae_intel_max10.h b/drivers/raw/ifpga/base/opae_intel_max10.h\nindex e632941..123cdc4 100644\n--- a/drivers/raw/ifpga/base/opae_intel_max10.h\n+++ b/drivers/raw/ifpga/base/opae_intel_max10.h\n@@ -26,6 +26,9 @@ struct max10_compatible_id {\n #define MAX10_FLAGS_SECURE\t\tBIT(6)\n #define MAX10_FLAGS_MAC_CACHE\t\tBIT(7)\n \n+/** List of opae sensors */\n+TAILQ_HEAD(opae_sensor_list, opae_sensor_info);\n+\n struct intel_max10_device {\n \tunsigned int flags; /*max10 hardware capability*/\n \tstruct altera_spi_device *spi_master;\n@@ -33,6 +36,8 @@ struct intel_max10_device {\n \tstruct max10_compatible_id *id; /*max10 compatible*/\n \tchar *fdt_root;\n \tunsigned int base; /* max10 base address */\n+\tu16 bus;\n+\tstruct opae_sensor_list opae_sensor_list;\n };\n \n /* retimer speed */\n@@ -136,17 +141,19 @@ struct opae_retimer_status {\n \n #define DFT_MAX_SIZE\t\t0x7e0000\n \n-int max10_reg_read(unsigned int reg, unsigned int *val);\n-int max10_reg_write(unsigned int reg, unsigned int val);\n-int max10_sys_read(unsigned int offset, unsigned int *val);\n-int max10_sys_write(unsigned int offset, unsigned int val);\n+int max10_reg_read(struct intel_max10_device *dev,\n+\tunsigned int reg, unsigned int *val);\n+int max10_reg_write(struct intel_max10_device *dev,\n+\tunsigned int reg, unsigned int val);\n+int max10_sys_read(struct intel_max10_device *dev,\n+\tunsigned int offset, unsigned int *val);\n+int max10_sys_write(struct intel_max10_device *dev,\n+\tunsigned int offset, unsigned int val);\n struct intel_max10_device *\n intel_max10_device_probe(struct altera_spi_device *spi,\n \t\tint chipselect);\n int intel_max10_device_remove(struct intel_max10_device *dev);\n \n-/** List of opae sensors */\n-TAILQ_HEAD(opae_sensor_list, opae_sensor_info);\n \n #define SENSOR_REG_VALUE 0x0\n #define SENSOR_REG_HIGH_WARN 0x1\ndiff --git a/drivers/raw/ifpga/base/opae_spi.c b/drivers/raw/ifpga/base/opae_spi.c\nindex cc52782..bfdc83e 100644\n--- a/drivers/raw/ifpga/base/opae_spi.c\n+++ b/drivers/raw/ifpga/base/opae_spi.c\n@@ -181,7 +181,6 @@ static int spi_txrx(struct altera_spi_device *dev)\n \tu32 rxd;\n \tunsigned int tx_data;\n \tu32 status;\n-\tint retry = 0;\n \tint ret;\n \n \twhile (count < dev->len) {\n@@ -194,10 +193,6 @@ static int spi_txrx(struct altera_spi_device *dev)\n \t\t\t\treturn -EIO;\n \t\t\tif (status & ALTERA_SPI_STATUS_RRDY_MSK)\n \t\t\t\tbreak;\n-\t\t\tif (retry++ > SPI_MAX_RETRY) {\n-\t\t\t\tdev_err(dev, \"%s, read timeout\\n\", __func__);\n-\t\t\t\treturn -EBUSY;\n-\t\t\t}\n \t\t}\n \n \t\tret = spi_reg_read(dev, ALTERA_SPI_RXDATA, &rxd);\ndiff --git a/drivers/raw/ifpga/base/opae_spi.h b/drivers/raw/ifpga/base/opae_spi.h\nindex 6355deb..d20a4c3 100644\n--- a/drivers/raw/ifpga/base/opae_spi.h\n+++ b/drivers/raw/ifpga/base/opae_spi.h\n@@ -38,7 +38,7 @@\n #define SPI_WRITE 0x20\n #define WRITE_DATA_MASK GENMASK_ULL(31, 0)\n \n-#define SPI_MAX_RETRY 100000\n+#define SPI_MAX_RETRY 1000000\n \n #define TYPE_SPI 0\n #define TYPE_NIOS_SPI 1\n@@ -102,6 +102,7 @@ struct spi_transaction_dev {\n \tstruct altera_spi_device *dev;\n \tint chipselect;\n \tstruct spi_tran_buffer *buffer;\n+\tpthread_mutex_t lock;\n };\n \n struct spi_tran_header {\ndiff --git a/drivers/raw/ifpga/base/opae_spi_transaction.c b/drivers/raw/ifpga/base/opae_spi_transaction.c\nindex 06ca625..013efee 100644\n--- a/drivers/raw/ifpga/base/opae_spi_transaction.c\n+++ b/drivers/raw/ifpga/base/opae_spi_transaction.c\n@@ -154,6 +154,8 @@ static int byte_to_core_convert(struct spi_transaction_dev *dev,\n \tunsigned int rx_len = 0;\n \tint retry = 0;\n \tint spi_flags;\n+\tunsigned long timeout = msecs_to_timer_cycles(1000);\n+\tunsigned long ticks;\n \tunsigned int resp_max_len = 2 * resp_len;\n \n \tprint_buffer(\"before bytes:\", send_data, send_len);\n@@ -207,8 +209,11 @@ static int byte_to_core_convert(struct spi_transaction_dev *dev,\n \tif (ret != SPI_FOUND_EOP) {\n \t\ttx_buffer = NULL;\n \t\ttx_len = 0;\n-\t\tif (retry++ > 10) {\n-\t\t\tdev_err(NULL, \"cannot found valid data from SPI\\n\");\n+\t\tticks = rte_get_timer_cycles();\n+\t\tif (time_after(ticks, timeout) &&\n+\t\t\t\tretry++ > SPI_MAX_RETRY) {\n+\t\t\tdev_err(NULL, \"Have retry %d, found invalid packet data\\n\",\n+\t\t\t\tretry);\n \t\t\treturn -EBUSY;\n \t\t}\n \n@@ -427,23 +432,36 @@ static int do_transaction(struct spi_transaction_dev *dev, unsigned int addr,\n int spi_transaction_read(struct spi_transaction_dev *dev, unsigned int addr,\n \t\tunsigned int size, unsigned char *data)\n {\n-\treturn do_transaction(dev, addr, size, data,\n+\tint ret;\n+\n+\tpthread_mutex_lock(&dev->lock);\n+\tret = do_transaction(dev, addr, size, data,\n \t\t\t(size > SPI_REG_BYTES) ?\n \t\t\tSPI_TRAN_SEQ_READ : SPI_TRAN_NON_SEQ_READ);\n+\tpthread_mutex_unlock(&dev->lock);\n+\n+\treturn ret;\n }\n \n int spi_transaction_write(struct spi_transaction_dev *dev, unsigned int addr,\n \t\tunsigned int size, unsigned char *data)\n {\n-\treturn do_transaction(dev, addr, size, data,\n+\tint ret;\n+\n+\tpthread_mutex_lock(&dev->lock);\n+\tret = do_transaction(dev, addr, size, data,\n \t\t\t(size > SPI_REG_BYTES) ?\n \t\t\tSPI_TRAN_SEQ_WRITE : SPI_TRAN_NON_SEQ_WRITE);\n+\tpthread_mutex_unlock(&dev->lock);\n+\n+\treturn ret;\n }\n \n struct spi_transaction_dev *spi_transaction_init(struct altera_spi_device *dev,\n \t\tint chipselect)\n {\n \tstruct spi_transaction_dev *spi_tran_dev;\n+\tint ret;\n \n \tspi_tran_dev = opae_malloc(sizeof(struct spi_transaction_dev));\n \tif (!spi_tran_dev)\n@@ -453,18 +471,28 @@ struct spi_transaction_dev *spi_transaction_init(struct altera_spi_device *dev,\n \tspi_tran_dev->chipselect = chipselect;\n \n \tspi_tran_dev->buffer = opae_malloc(sizeof(struct spi_tran_buffer));\n-\tif (!spi_tran_dev->buffer) {\n-\t\topae_free(spi_tran_dev);\n-\t\treturn NULL;\n+\tif (!spi_tran_dev->buffer)\n+\t\tgoto err;\n+\n+\tret = pthread_mutex_init(&spi_tran_dev->lock, NULL);\n+\tif (ret) {\n+\t\tdev_err(spi_tran_dev, \"fail to init mutex lock\\n\");\n+\t\tgoto err;\n \t}\n \n \treturn spi_tran_dev;\n+\n+err:\n+\topae_free(spi_tran_dev);\n+\treturn NULL;\n }\n \n void spi_transaction_remove(struct spi_transaction_dev *dev)\n {\n \tif (dev && dev->buffer)\n \t\topae_free(dev->buffer);\n-\tif (dev)\n+\tif (dev) {\n+\t\tpthread_mutex_destroy(&dev->lock);\n \t\topae_free(dev);\n+\t}\n }\ndiff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c\nindex cfcbf68..775731c 100644\n--- a/drivers/raw/ifpga/ifpga_rawdev.c\n+++ b/drivers/raw/ifpga/ifpga_rawdev.c\n@@ -361,7 +361,7 @@ static int ifpga_rawdev_fill_info(struct ifpga_rawdev *ifpga_dev,\n \tif (!mgr)\n \t\treturn -ENODEV;\n \n-\topae_mgr_for_each_sensor(sensor) {\n+\topae_mgr_for_each_sensor(mgr, sensor) {\n \t\tif (!(sensor->flags & OPAE_SENSOR_VALID))\n \t\t\tgoto fail;\n \n@@ -370,8 +370,8 @@ static int ifpga_rawdev_fill_info(struct ifpga_rawdev *ifpga_dev,\n \t\t\tgoto fail;\n \n \t\tif (value == 0xdeadbeef) {\n-\t\t\tIFPGA_RAWDEV_PMD_ERR(\"sensor %s is invalid value %x\\n\",\n-\t\t\t\t\tsensor->name, value);\n+\t\t\tIFPGA_RAWDEV_PMD_ERR(\"dev_id %d sensor %s value %x\\n\",\n+\t\t\t\t\traw_dev->dev_id, sensor->name, value);\n \t\t\tcontinue;\n \t\t}\n \n@@ -394,8 +394,9 @@ static int ifpga_rawdev_fill_info(struct ifpga_rawdev *ifpga_dev,\n \t\t/* monitor 12V AUX sensor */\n \t\tif (!strcmp(sensor->name, \"12V AUX Voltage\")) {\n \t\t\tif (value < AUX_VOLTAGE_WARN) {\n-\t\t\t\tIFPGA_RAWDEV_PMD_INFO(\"%s reach theshold %d\\n\",\n-\t\t\t\t\t\tsensor->name, value);\n+\t\t\t\tIFPGA_RAWDEV_PMD_INFO(\n+\t\t\t\t\t\"%s reach theshold %d mV\\n\",\n+\t\t\t\t\tsensor->name, value);\n \t\t\t\t*gsd_start = true;\n \t\t\t\tbreak;\n \t\t\t}\n@@ -1433,6 +1434,9 @@ static int ifpga_register_fme_interrupt(struct opae_manager *mgr)\n \t}\n \tdata->device_id = pci_dev->id.device_id;\n \tdata->vendor_id = pci_dev->id.vendor_id;\n+\tdata->bus = pci_dev->addr.bus;\n+\tdata->devid = pci_dev->addr.devid;\n+\tdata->function = pci_dev->addr.function;\n \tdata->vfio_dev_fd = pci_dev->intr_handle.vfio_dev_fd;\n \n \tadapter = rawdev->dev_private;\n",
    "prefixes": [
        "v18",
        "18/19"
    ]
}