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Update a patch.

GET /api/patches/63013/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 63013,
    "url": "http://patches.dpdk.org/api/patches/63013/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1573722187-148846-17-git-send-email-rosen.xu@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1573722187-148846-17-git-send-email-rosen.xu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1573722187-148846-17-git-send-email-rosen.xu@intel.com",
    "date": "2019-11-14T09:03:04",
    "name": "[v18,16/19] raw/ifpga/base: add new API get board info",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "f5455afcffa6f947ccca17ed800c5ba30f4f7f4d",
    "submitter": {
        "id": 946,
        "url": "http://patches.dpdk.org/api/people/946/?format=api",
        "name": "Xu, Rosen",
        "email": "rosen.xu@intel.com"
    },
    "delegate": {
        "id": 31221,
        "url": "http://patches.dpdk.org/api/users/31221/?format=api",
        "username": "yexl",
        "first_name": "xiaolong",
        "last_name": "ye",
        "email": "xiaolong.ye@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1573722187-148846-17-git-send-email-rosen.xu@intel.com/mbox/",
    "series": [
        {
            "id": 7455,
            "url": "http://patches.dpdk.org/api/series/7455/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7455",
            "date": "2019-11-14T09:02:48",
            "name": "add PCIe AER disable and IRQ support for ipn3ke",
            "version": 18,
            "mbox": "http://patches.dpdk.org/series/7455/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/63013/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/63013/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 31A96A04C2;\n\tThu, 14 Nov 2019 10:06:58 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 60F821BF00;\n\tThu, 14 Nov 2019 10:05:06 +0100 (CET)",
            "from mga17.intel.com (mga17.intel.com [192.55.52.151])\n by dpdk.org (Postfix) with ESMTP id B2BDE1BEBC\n for <dev@dpdk.org>; Thu, 14 Nov 2019 10:04:57 +0100 (CET)",
            "from fmsmga006.fm.intel.com ([10.253.24.20])\n by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 14 Nov 2019 01:04:57 -0800",
            "from dpdk-rosen-02.sh.intel.com ([10.67.110.156])\n by fmsmga006.fm.intel.com with ESMTP; 14 Nov 2019 01:04:55 -0800"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.68,302,1569308400\"; d=\"scan'208\";a=\"406259629\"",
        "From": "Rosen Xu <rosen.xu@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "rosen.xu@intel.com, tianfei.zhang@intel.com, andy.pei@intel.com,\n xiaolong.ye@intel.com, ferruh.yigit@intel.com",
        "Date": "Thu, 14 Nov 2019 17:03:04 +0800",
        "Message-Id": "<1573722187-148846-17-git-send-email-rosen.xu@intel.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1573722187-148846-1-git-send-email-rosen.xu@intel.com>",
        "References": "<1571917119-149534-2-git-send-email-andy.pei@intel.com>\n <1573722187-148846-1-git-send-email-rosen.xu@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v18 16/19] raw/ifpga/base: add new API get board\n\tinfo",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Tianfei zhang <tianfei.zhang@intel.com>\n\nAdd new API to get the board info.\nopae_mgr_get_board_info()\n\nSigned-off-by: Tianfei zhang <tianfei.zhang@intel.com>\nSigned-off-by: Andy Pei <andy.pei@intel.com>\n---\n drivers/raw/ifpga/base/ifpga_api.c     | 11 +++++++\n drivers/raw/ifpga/base/ifpga_defines.h | 55 ++++++++++++++++++++++++++--------\n drivers/raw/ifpga/base/ifpga_fme.c     | 53 +++++++++++++++++++++++++-------\n drivers/raw/ifpga/base/ifpga_hw.h      |  2 +-\n drivers/raw/ifpga/base/opae_hw_api.c   | 20 +++++++++++++\n drivers/raw/ifpga/base/opae_hw_api.h   |  5 ++++\n 6 files changed, 121 insertions(+), 25 deletions(-)",
    "diff": "diff --git a/drivers/raw/ifpga/base/ifpga_api.c b/drivers/raw/ifpga/base/ifpga_api.c\nindex 33d1da3..6dbd715 100644\n--- a/drivers/raw/ifpga/base/ifpga_api.c\n+++ b/drivers/raw/ifpga/base/ifpga_api.c\n@@ -218,10 +218,21 @@ static int ifpga_mgr_get_sensor_value(struct opae_manager *mgr,\n \treturn fme_mgr_get_sensor_value(fme, sensor, value);\n }\n \n+static int ifpga_mgr_get_board_info(struct opae_manager *mgr,\n+\t\tstruct opae_board_info **info)\n+{\n+\tstruct ifpga_fme_hw *fme = mgr->data;\n+\n+\t*info = &fme->board_info;\n+\n+\treturn 0;\n+}\n+\n struct opae_manager_ops ifpga_mgr_ops = {\n \t.flash = ifpga_mgr_flash,\n \t.get_eth_group_region_info = ifpga_mgr_get_eth_group_region_info,\n \t.get_sensor_value = ifpga_mgr_get_sensor_value,\n+\t.get_board_info = ifpga_mgr_get_board_info,\n };\n \n static int ifpga_mgr_read_mac_rom(struct opae_manager *mgr, int offset,\ndiff --git a/drivers/raw/ifpga/base/ifpga_defines.h b/drivers/raw/ifpga/base/ifpga_defines.h\nindex 1e84b15..9f0147d 100644\n--- a/drivers/raw/ifpga/base/ifpga_defines.h\n+++ b/drivers/raw/ifpga/base/ifpga_defines.h\n@@ -1667,18 +1667,29 @@ struct bts_header {\n \t(((bts_hdr)->guid_h == GBS_GUID_H) &&\t\t\\\n \t((bts_hdr)->guid_l == GBS_GUID_L))\n \n+#define check_support(n) (n == 1 ? \"support\" : \"no\")\n+\n /* bitstream id definition */\n struct fme_bitstream_id {\n \tunion {\n \t\tu64 id;\n \t\tstruct {\n-\t\t\tu64 hash:32;\n-\t\t\tu64 interface:4;\n-\t\t\tu64 reserved:12;\n-\t\t\tu64 debug:4;\n-\t\t\tu64 patch:4;\n-\t\t\tu64 minor:4;\n-\t\t\tu64 major:4;\n+\t\t\tu8 build_patch:8;\n+\t\t\tu8 build_minor:8;\n+\t\t\tu8 build_major:8;\n+\t\t\tu8 fvl_bypass:1;\n+\t\t\tu8 mac_lightweight:1;\n+\t\t\tu8 disagregate:1;\n+\t\t\tu8 lightweiht:1;\n+\t\t\tu8 seu:1;\n+\t\t\tu8 ptp:1;\n+\t\t\tu8 reserve:2;\n+\t\t\tu8 interface:4;\n+\t\t\tu32 afu_revision:12;\n+\t\t\tu8 patch:4;\n+\t\t\tu8 minor:4;\n+\t\t\tu8 major:4;\n+\t\t\tu8 reserved:4;\n \t\t};\n \t};\n };\n@@ -1691,13 +1702,31 @@ enum board_interface {\n \tVC_2_2_25G = 4,\n };\n \n-struct ifpga_fme_board_info {\n+enum pac_major {\n+\tVISTA_CREEK = 0,\n+\tRUSH_CREEK = 1,\n+\tDARBY_CREEK = 2,\n+};\n+\n+enum pac_minor {\n+\tDCP_1_0 = 0,\n+\tDCP_1_1 = 1,\n+\tDCP_1_2 = 2,\n+};\n+\n+struct opae_board_info {\n+\tenum pac_major major;\n+\tenum pac_minor minor;\n \tenum board_interface type;\n-\tu32 build_hash;\n-\tu32 debug_version;\n-\tu32 patch_version;\n-\tu32 minor_version;\n-\tu32 major_version;\n+\n+\t/* PAC features */\n+\tu8 fvl_bypass;\n+\tu8 mac_lightweight;\n+\tu8 disaggregate;\n+\tu8 lightweight;\n+\tu8 seu;\n+\tu8 ptp;\n+\n \tu32 max10_version;\n \tu32 nios_fw_version;\n \tu32 nums_of_retimer;\ndiff --git a/drivers/raw/ifpga/base/ifpga_fme.c b/drivers/raw/ifpga/base/ifpga_fme.c\nindex 2bc7c10..799d67d 100644\n--- a/drivers/raw/ifpga/base/ifpga_fme.c\n+++ b/drivers/raw/ifpga/base/ifpga_fme.c\n@@ -787,8 +787,22 @@ static const char *board_type_to_string(u32 type)\n \treturn \"unknown\";\n }\n \n+static const char *board_major_to_string(u32 major)\n+{\n+\tswitch (major) {\n+\tcase VISTA_CREEK:\n+\t\treturn \"VISTA_CREEK\";\n+\tcase RUSH_CREEK:\n+\t\treturn \"RUSH_CREEK\";\n+\tcase DARBY_CREEK:\n+\t\treturn \"DARBY_CREEK\";\n+\t}\n+\n+\treturn \"unknown\";\n+}\n+\n static int board_type_to_info(u32 type,\n-\t\tstruct ifpga_fme_board_info *info)\n+\t\tstruct opae_board_info *info)\n {\n \tswitch (type) {\n \tcase VC_8_10G:\n@@ -830,17 +844,34 @@ static int fme_get_board_interface(struct ifpga_fme_hw *fme)\n \tif (fme_hdr_get_bitstream_id(fme, &id.id))\n \t\treturn -EINVAL;\n \n+\tfme->board_info.major = id.major;\n+\tfme->board_info.minor = id.minor;\n \tfme->board_info.type = id.interface;\n-\tfme->board_info.build_hash = id.hash;\n-\tfme->board_info.debug_version = id.debug;\n-\tfme->board_info.major_version = id.major;\n-\tfme->board_info.minor_version = id.minor;\n-\n-\tdev_info(fme, \"board type: %s major_version:%u minor_version:%u build_hash:%u\\n\",\n-\t\t\tboard_type_to_string(fme->board_info.type),\n-\t\t\tfme->board_info.major_version,\n-\t\t\tfme->board_info.minor_version,\n-\t\t\tfme->board_info.build_hash);\n+\tfme->board_info.fvl_bypass = id.fvl_bypass;\n+\tfme->board_info.mac_lightweight = id.mac_lightweight;\n+\tfme->board_info.lightweight = id.lightweiht;\n+\tfme->board_info.disaggregate = id.disagregate;\n+\tfme->board_info.seu = id.seu;\n+\tfme->board_info.ptp = id.ptp;\n+\n+\tdev_info(fme, \"found: board: %s type: %s\\n\",\n+\t\t\tboard_major_to_string(fme->board_info.major),\n+\t\t\tboard_type_to_string(fme->board_info.type));\n+\n+\tdev_info(fme, \"support feature:\\n\"\n+\t\t\t\"fvl_bypass:%s\\n\"\n+\t\t\t\"mac_lightweight:%s\\n\"\n+\t\t\t\"lightweight:%s\\n\"\n+\t\t\t\"disaggregate:%s\\n\"\n+\t\t\t\"seu:%s\\n\"\n+\t\t\t\"ptp1588:%s\\n\",\n+\t\t\tcheck_support(fme->board_info.fvl_bypass),\n+\t\t\tcheck_support(fme->board_info.mac_lightweight),\n+\t\t\tcheck_support(fme->board_info.lightweight),\n+\t\t\tcheck_support(fme->board_info.disaggregate),\n+\t\t\tcheck_support(fme->board_info.seu),\n+\t\t\tcheck_support(fme->board_info.ptp));\n+\n \n \tif (board_type_to_info(fme->board_info.type, &fme->board_info))\n \t\treturn -EINVAL;\ndiff --git a/drivers/raw/ifpga/base/ifpga_hw.h b/drivers/raw/ifpga/base/ifpga_hw.h\nindex ff91c46..7c3307f 100644\n--- a/drivers/raw/ifpga/base/ifpga_hw.h\n+++ b/drivers/raw/ifpga/base/ifpga_hw.h\n@@ -88,7 +88,7 @@ struct ifpga_fme_hw {\n \tvoid *eth_dev[MAX_ETH_GROUP_DEVICES];\n \tstruct opae_reg_region\n \t\teth_group_region[MAX_ETH_GROUP_DEVICES];\n-\tstruct ifpga_fme_board_info board_info;\n+\tstruct opae_board_info board_info;\n \tint nums_eth_dev;\n \tunsigned int nums_acc_region;\n };\ndiff --git a/drivers/raw/ifpga/base/opae_hw_api.c b/drivers/raw/ifpga/base/opae_hw_api.c\nindex d0e66d6..1ccc967 100644\n--- a/drivers/raw/ifpga/base/opae_hw_api.c\n+++ b/drivers/raw/ifpga/base/opae_hw_api.c\n@@ -690,3 +690,23 @@ struct opae_sensor_info *\n \n \treturn -ENOENT;\n }\n+\n+/**\n+ * opae_manager_get_board_info - get board info\n+ * sensor value\n+ * @info: opae_board_info for the card\n+ *\n+ * Return: 0 on success, otherwise error code\n+ */\n+int\n+opae_mgr_get_board_info(struct opae_manager *mgr,\n+\t\tstruct opae_board_info **info)\n+{\n+\tif (!mgr || !info)\n+\t\treturn -EINVAL;\n+\n+\tif (mgr->ops && mgr->ops->get_board_info)\n+\t\treturn mgr->ops->get_board_info(mgr, info);\n+\n+\treturn -ENOENT;\n+}\ndiff --git a/drivers/raw/ifpga/base/opae_hw_api.h b/drivers/raw/ifpga/base/opae_hw_api.h\nindex 0d7be01..b78fbd5 100644\n--- a/drivers/raw/ifpga/base/opae_hw_api.h\n+++ b/drivers/raw/ifpga/base/opae_hw_api.h\n@@ -13,6 +13,7 @@\n #include \"opae_osdep.h\"\n #include \"opae_intel_max10.h\"\n #include \"opae_eth_group.h\"\n+#include \"ifpga_defines.h\"\n \n #ifndef PCI_MAX_RESOURCE\n #define PCI_MAX_RESOURCE 6\n@@ -51,6 +52,8 @@ struct opae_manager_ops {\n \tint (*get_sensor_value)(struct opae_manager *mgr,\n \t\t\tstruct opae_sensor_info *sensor,\n \t\t\tunsigned int *value);\n+\tint (*get_board_info)(struct opae_manager *mgr,\n+\t\t\tstruct opae_board_info **info);\n };\n \n /* networking management ops in FME */\n@@ -319,4 +322,6 @@ int opae_manager_eth_group_write_reg(struct opae_manager *mgr, u8 group_id,\n \t\tu8 type, u8 index, u16 addr, u32 data);\n int opae_manager_eth_group_read_reg(struct opae_manager *mgr, u8 group_id,\n \t\tu8 type, u8 index, u16 addr, u32 *data);\n+int opae_mgr_get_board_info(struct opae_manager *mgr,\n+\t\tstruct opae_board_info **info);\n #endif /* _OPAE_HW_API_H_*/\n",
    "prefixes": [
        "v18",
        "16/19"
    ]
}