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GET /api/patches/63011/?format=api
{ "id": 63011, "url": "http://patches.dpdk.org/api/patches/63011/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1573722187-148846-15-git-send-email-rosen.xu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1573722187-148846-15-git-send-email-rosen.xu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1573722187-148846-15-git-send-email-rosen.xu@intel.com", "date": "2019-11-14T09:03:02", "name": "[v18,14/19] raw/ifpga/base: configure FEC mode", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "8940908fef511f139f56dad88258df8ecc45efc7", "submitter": { "id": 946, "url": "http://patches.dpdk.org/api/people/946/?format=api", "name": "Xu, Rosen", "email": "rosen.xu@intel.com" }, "delegate": { "id": 31221, "url": "http://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1573722187-148846-15-git-send-email-rosen.xu@intel.com/mbox/", "series": [ { "id": 7455, "url": "http://patches.dpdk.org/api/series/7455/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7455", "date": "2019-11-14T09:02:48", "name": "add PCIe AER disable and IRQ support for ipn3ke", "version": 18, "mbox": "http://patches.dpdk.org/series/7455/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/63011/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/63011/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D3ACEA04C2;\n\tThu, 14 Nov 2019 10:06:41 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id A3AB41BEF5;\n\tThu, 14 Nov 2019 10:05:01 +0100 (CET)", "from mga17.intel.com (mga17.intel.com [192.55.52.151])\n by dpdk.org (Postfix) with ESMTP id E349C1BED2\n for <dev@dpdk.org>; Thu, 14 Nov 2019 10:04:52 +0100 (CET)", "from fmsmga006.fm.intel.com ([10.253.24.20])\n by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 14 Nov 2019 01:04:52 -0800", "from dpdk-rosen-02.sh.intel.com ([10.67.110.156])\n by fmsmga006.fm.intel.com with ESMTP; 14 Nov 2019 01:04:51 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.68,302,1569308400\"; d=\"scan'208\";a=\"406259604\"", "From": "Rosen Xu <rosen.xu@intel.com>", "To": "dev@dpdk.org", "Cc": "rosen.xu@intel.com, tianfei.zhang@intel.com, andy.pei@intel.com,\n xiaolong.ye@intel.com, ferruh.yigit@intel.com", "Date": "Thu, 14 Nov 2019 17:03:02 +0800", "Message-Id": "<1573722187-148846-15-git-send-email-rosen.xu@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1573722187-148846-1-git-send-email-rosen.xu@intel.com>", "References": "<1571917119-149534-2-git-send-email-andy.pei@intel.com>\n <1573722187-148846-1-git-send-email-rosen.xu@intel.com>", "Subject": "[dpdk-dev] [PATCH v18 14/19] raw/ifpga/base: configure FEC mode", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Tianfei zhang <tianfei.zhang@intel.com>\n\nWe can change the PKVL FEC mode when the A10 NIOS FW\ninitialization. The end-user can use this feature the\nchange the FEC mode, the default mode is RS FEC mode.\n\nSigned-off-by: Tianfei zhang <tianfei.zhang@intel.com>\nSigned-off-by: Andy Pei <andy.pei@intel.com>\n---\n drivers/raw/ifpga/base/ifpga_fme.c | 42 +++++++++++++++++++++++++++++---------\n drivers/raw/ifpga/base/opae_spi.h | 23 +++++++++++++--------\n 2 files changed, 47 insertions(+), 18 deletions(-)", "diff": "diff --git a/drivers/raw/ifpga/base/ifpga_fme.c b/drivers/raw/ifpga/base/ifpga_fme.c\nindex 87fa596..2bc7c10 100644\n--- a/drivers/raw/ifpga/base/ifpga_fme.c\n+++ b/drivers/raw/ifpga/base/ifpga_fme.c\n@@ -941,9 +941,34 @@ static int nios_spi_wait_init_done(struct altera_spi_device *dev)\n \tu32 val = 0;\n \tunsigned long timeout = msecs_to_timer_cycles(10000);\n \tunsigned long ticks;\n+\tint major_version;\n \n+\tif (spi_reg_read(dev, NIOS_VERSION, &val))\n+\t\treturn -EIO;\n+\n+\tmajor_version = (val >> NIOS_VERSION_MAJOR_SHIFT) &\n+\t\tNIOS_VERSION_MAJOR;\n+\tdev_debug(dev, \"A10 NIOS FW version %d\\n\", major_version);\n+\n+\tif (major_version >= 3) {\n+\t\t/* read NIOS_INIT to check if PKVL INIT done or not */\n+\t\tif (spi_reg_read(dev, NIOS_INIT, &val))\n+\t\t\treturn -EIO;\n+\n+\t\t/* check if PKVLs are initialized already */\n+\t\tif (val & NIOS_INIT_DONE || val & NIOS_INIT_START)\n+\t\t\tgoto nios_init_done;\n+\n+\t\t/* start to config the default FEC mode */\n+\t\tval = NIOS_INIT_START;\n+\n+\t\tif (spi_reg_write(dev, NIOS_INIT, val))\n+\t\t\treturn -EIO;\n+\t}\n+\n+nios_init_done:\n \tdo {\n-\t\tif (spi_reg_read(dev, NIOS_SPI_INIT_DONE, &val))\n+\t\tif (spi_reg_read(dev, NIOS_INIT, &val))\n \t\t\treturn -EIO;\n \t\tif (val)\n \t\t\tbreak;\n@@ -961,23 +986,20 @@ static int nios_spi_check_error(struct altera_spi_device *dev)\n {\n \tu32 value = 0;\n \n-\tif (spi_reg_read(dev, NIOS_SPI_INIT_STS0, &value))\n+\tif (spi_reg_read(dev, PKVL_A_MODE_STS, &value))\n \t\treturn -EIO;\n \n-\tdev_debug(dev, \"SPI init status0 0x%x\\n\", value);\n+\tdev_debug(dev, \"PKVL A Mode Status 0x%x\\n\", value);\n \n-\t/* Error code: 0xFFF0 to 0xFFFC */\n-\tif (value >= 0xFFF0 && value <= 0xFFFC)\n+\tif (value >= 0x100)\n \t\treturn -EINVAL;\n \n-\tvalue = 0;\n-\tif (spi_reg_read(dev, NIOS_SPI_INIT_STS1, &value))\n+\tif (spi_reg_read(dev, PKVL_B_MODE_STS, &value))\n \t\treturn -EIO;\n \n-\tdev_debug(dev, \"SPI init status1 0x%x\\n\", value);\n+\tdev_debug(dev, \"PKVL B Mode Status 0x%x\\n\", value);\n \n-\t/* Error code: 0xFFF0 to 0xFFFC */\n-\tif (value >= 0xFFF0 && value <= 0xFFFC)\n+\tif (value >= 0x100)\n \t\treturn -EINVAL;\n \n \treturn 0;\ndiff --git a/drivers/raw/ifpga/base/opae_spi.h b/drivers/raw/ifpga/base/opae_spi.h\nindex ab66e1f..6355deb 100644\n--- a/drivers/raw/ifpga/base/opae_spi.h\n+++ b/drivers/raw/ifpga/base/opae_spi.h\n@@ -149,12 +149,19 @@ int spi_reg_write(struct altera_spi_device *dev, u32 reg,\n #define NIOS_SPI_STAT 0x18\n #define NIOS_SPI_VALID BIT_ULL(32)\n #define NIOS_SPI_READ_DATA GENMASK_ULL(31, 0)\n-#define NIOS_SPI_INIT_DONE 0x1000\n-\n-#define NIOS_SPI_INIT_DONE 0x1000\n-#define NIOS_SPI_INIT_STS0 0x1020\n-#define NIOS_SPI_INIT_STS1 0x1024\n-#define PKVL_STATUS_RESET 0\n-#define PKVL_10G_MODE 1\n-#define PKVL_25G_MODE 2\n+\n+#define NIOS_INIT\t\t0x1000\n+#define REQ_FEC_MODE\t\tGENMASK(23, 8)\n+#define FEC_MODE_NO\t\t0x0\n+#define FEC_MODE_KR\t\t0x5555\n+#define FEC_MODE_RS\t\t0xaaaa\n+#define NIOS_INIT_START\t\tBIT(1)\n+#define NIOS_INIT_DONE\t\tBIT(0)\n+#define NIOS_VERSION\t\t0x1004\n+#define NIOS_VERSION_MAJOR_SHIFT 28\n+#define NIOS_VERSION_MAJOR\tGENMASK(31, 28)\n+#define NIOS_VERSION_MINOR\tGENMASK(27, 24)\n+#define NIOS_VERSION_PATCH\tGENMASK(23, 20)\n+#define PKVL_A_MODE_STS\t\t0x1020\n+#define PKVL_B_MODE_STS\t\t0x1024\n #endif\n", "prefixes": [ "v18", "14/19" ] }