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GET /api/patches/62837/?format=api
{ "id": 62837, "url": "http://patches.dpdk.org/api/patches/62837/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20191111131914.16559-6-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20191111131914.16559-6-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20191111131914.16559-6-pbhagavatula@marvell.com", "date": "2019-11-11T13:19:09", "name": "[v17,05/10] examples/eventdev_pipeline: split port init sequence", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "15c87e1e7ca78ceb4e2671e7acb7b98a541db853", "submitter": { "id": 1183, "url": "http://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20191111131914.16559-6-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 7386, "url": "http://patches.dpdk.org/api/series/7386/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7386", "date": "2019-11-11T13:19:04", "name": "ethdev: add new Rx offload flags", "version": 17, "mbox": "http://patches.dpdk.org/series/7386/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/62837/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/62837/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 49982A04B9;\n\tMon, 11 Nov 2019 14:20:01 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 7E23B2BAE;\n\tMon, 11 Nov 2019 14:19:50 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 5DD382BA2\n for <dev@dpdk.org>; Mon, 11 Nov 2019 14:19:48 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n xABDFRKm001139; Mon, 11 Nov 2019 05:19:47 -0800", "from sc-exch01.marvell.com ([199.233.58.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 2w5upuxv8w-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 11 Nov 2019 05:19:47 -0800", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH01.marvell.com\n (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Mon, 11 Nov\n 2019 05:19:46 -0800", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n Transport; Mon, 11 Nov 2019 05:19:46 -0800", "from BG-LT7430.marvell.com (unknown [10.28.17.38])\n by maili.marvell.com (Postfix) with ESMTP id 9DB373F703F;\n Mon, 11 Nov 2019 05:19:43 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0818;\n bh=FruYKGg81ZbB+fwKE6ygdXLm5Kz1UIEajFHtOticRVQ=;\n b=wTSY4SCbsHLmCMm7f2jUCoKzqYq8XyNafobKm4LoH72XvPqSfqE4tJj+5dBKcDoWHXLI\n 8LRLaE7tbBEyJB8lsirvWEJJ7sH5on1lLBPzwsLSJBRWc6ZTTmDCmR6k83UZQ2pcfC+h\n UFx2zpkVoACWPx9lNf+6GVQAezKFLCnsiOTdQ5CHgeA3XIFbQTtMsgNqUcq2CEtq0BmD\n 9DgK+XT9pqDpabqI7WkltG2YXx1ZIcvuPPOKj7b5gMOeQddiVpudYyJur9mqzkGXrR3M\n tKLejev6mFRwaHUJ9KcHYMsb0bEys9lbVtHGCW1d749s4rBo5m+5w8aB8cpdSiomuLlN KQ==", "From": "<pbhagavatula@marvell.com>", "To": "<ferruh.yigit@intel.com>, <arybchenko@solarflare.com>,\n <jerinj@marvell.com>, <thomas@monjalon.net>, Harry van Haaren\n <harry.van.haaren@intel.com>", "CC": "<dev@dpdk.org>, Pavan Nikhilesh <pbhagavatula@marvell.com>", "Date": "Mon, 11 Nov 2019 18:49:09 +0530", "Message-ID": "<20191111131914.16559-6-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20191111131914.16559-1-pbhagavatula@marvell.com>", "References": "<20191106191803.15098-1-pbhagavatula@marvell.com>\n <20191111131914.16559-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.95,18.0.572\n definitions=2019-11-11_03:2019-11-11,2019-11-11 signatures=0", "Subject": "[dpdk-dev] [PATCH v17 05/10] examples/eventdev_pipeline: split port\n\tinit sequence", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nSplit port initialization sequence based on event device capabilities.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n examples/eventdev_pipeline/main.c | 128 -----------------\n .../pipeline_worker_generic.c | 129 ++++++++++++++++++\n .../eventdev_pipeline/pipeline_worker_tx.c | 128 +++++++++++++++++\n 3 files changed, 257 insertions(+), 128 deletions(-)", "diff": "diff --git a/examples/eventdev_pipeline/main.c b/examples/eventdev_pipeline/main.c\nindex f77830282..d3ff1bbe4 100644\n--- a/examples/eventdev_pipeline/main.c\n+++ b/examples/eventdev_pipeline/main.c\n@@ -242,133 +242,6 @@ parse_app_args(int argc, char **argv)\n \t}\n }\n \n-/*\n- * Initializes a given port using global settings and with the RX buffers\n- * coming from the mbuf_pool passed as a parameter.\n- */\n-static inline int\n-port_init(uint8_t port, struct rte_mempool *mbuf_pool)\n-{\n-\tstruct rte_eth_rxconf rx_conf;\n-\tstatic const struct rte_eth_conf port_conf_default = {\n-\t\t.rxmode = {\n-\t\t\t.mq_mode = ETH_MQ_RX_RSS,\n-\t\t\t.max_rx_pkt_len = RTE_ETHER_MAX_LEN,\n-\t\t},\n-\t\t.rx_adv_conf = {\n-\t\t\t.rss_conf = {\n-\t\t\t\t.rss_hf = ETH_RSS_IP |\n-\t\t\t\t\t ETH_RSS_TCP |\n-\t\t\t\t\t ETH_RSS_UDP,\n-\t\t\t}\n-\t\t}\n-\t};\n-\tconst uint16_t rx_rings = 1, tx_rings = 1;\n-\tconst uint16_t rx_ring_size = 512, tx_ring_size = 512;\n-\tstruct rte_eth_conf port_conf = port_conf_default;\n-\tint retval;\n-\tuint16_t q;\n-\tstruct rte_eth_dev_info dev_info;\n-\tstruct rte_eth_txconf txconf;\n-\n-\tif (!rte_eth_dev_is_valid_port(port))\n-\t\treturn -1;\n-\n-\tretval = rte_eth_dev_info_get(port, &dev_info);\n-\tif (retval != 0) {\n-\t\tprintf(\"Error during getting device (port %u) info: %s\\n\",\n-\t\t\t\tport, strerror(-retval));\n-\t\treturn retval;\n-\t}\n-\n-\tif (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)\n-\t\tport_conf.txmode.offloads |=\n-\t\t\tDEV_TX_OFFLOAD_MBUF_FAST_FREE;\n-\trx_conf = dev_info.default_rxconf;\n-\trx_conf.offloads = port_conf.rxmode.offloads;\n-\n-\tport_conf.rx_adv_conf.rss_conf.rss_hf &=\n-\t\tdev_info.flow_type_rss_offloads;\n-\tif (port_conf.rx_adv_conf.rss_conf.rss_hf !=\n-\t\t\tport_conf_default.rx_adv_conf.rss_conf.rss_hf) {\n-\t\tprintf(\"Port %u modified RSS hash function based on hardware support,\"\n-\t\t\t\"requested:%#\"PRIx64\" configured:%#\"PRIx64\"\\n\",\n-\t\t\tport,\n-\t\t\tport_conf_default.rx_adv_conf.rss_conf.rss_hf,\n-\t\t\tport_conf.rx_adv_conf.rss_conf.rss_hf);\n-\t}\n-\n-\t/* Configure the Ethernet device. */\n-\tretval = rte_eth_dev_configure(port, rx_rings, tx_rings, &port_conf);\n-\tif (retval != 0)\n-\t\treturn retval;\n-\n-\t/* Allocate and set up 1 RX queue per Ethernet port. */\n-\tfor (q = 0; q < rx_rings; q++) {\n-\t\tretval = rte_eth_rx_queue_setup(port, q, rx_ring_size,\n-\t\t\t\trte_eth_dev_socket_id(port), &rx_conf,\n-\t\t\t\tmbuf_pool);\n-\t\tif (retval < 0)\n-\t\t\treturn retval;\n-\t}\n-\n-\ttxconf = dev_info.default_txconf;\n-\ttxconf.offloads = port_conf_default.txmode.offloads;\n-\t/* Allocate and set up 1 TX queue per Ethernet port. */\n-\tfor (q = 0; q < tx_rings; q++) {\n-\t\tretval = rte_eth_tx_queue_setup(port, q, tx_ring_size,\n-\t\t\t\trte_eth_dev_socket_id(port), &txconf);\n-\t\tif (retval < 0)\n-\t\t\treturn retval;\n-\t}\n-\n-\t/* Display the port MAC address. */\n-\tstruct rte_ether_addr addr;\n-\tretval = rte_eth_macaddr_get(port, &addr);\n-\tif (retval != 0) {\n-\t\tprintf(\"Failed to get MAC address (port %u): %s\\n\",\n-\t\t\t\tport, rte_strerror(-retval));\n-\t\treturn retval;\n-\t}\n-\n-\tprintf(\"Port %u MAC: %02\" PRIx8 \" %02\" PRIx8 \" %02\" PRIx8\n-\t\t\t \" %02\" PRIx8 \" %02\" PRIx8 \" %02\" PRIx8 \"\\n\",\n-\t\t\t(unsigned int)port,\n-\t\t\taddr.addr_bytes[0], addr.addr_bytes[1],\n-\t\t\taddr.addr_bytes[2], addr.addr_bytes[3],\n-\t\t\taddr.addr_bytes[4], addr.addr_bytes[5]);\n-\n-\t/* Enable RX in promiscuous mode for the Ethernet device. */\n-\tretval = rte_eth_promiscuous_enable(port);\n-\tif (retval != 0)\n-\t\treturn retval;\n-\n-\treturn 0;\n-}\n-\n-static int\n-init_ports(uint16_t num_ports)\n-{\n-\tuint16_t portid;\n-\n-\tif (!cdata.num_mbuf)\n-\t\tcdata.num_mbuf = 16384 * num_ports;\n-\n-\tstruct rte_mempool *mp = rte_pktmbuf_pool_create(\"packet_pool\",\n-\t\t\t/* mbufs */ cdata.num_mbuf,\n-\t\t\t/* cache_size */ 512,\n-\t\t\t/* priv_size*/ 0,\n-\t\t\t/* data_room_size */ RTE_MBUF_DEFAULT_BUF_SIZE,\n-\t\t\trte_socket_id());\n-\n-\tRTE_ETH_FOREACH_DEV(portid)\n-\t\tif (port_init(portid, mp) != 0)\n-\t\t\trte_exit(EXIT_FAILURE, \"Cannot init port %\"PRIu16 \"\\n\",\n-\t\t\t\t\tportid);\n-\n-\treturn 0;\n-}\n-\n static void\n do_capability_setup(uint8_t eventdev_id)\n {\n@@ -515,7 +388,6 @@ main(int argc, char **argv)\n \tif (dev_id < 0)\n \t\trte_exit(EXIT_FAILURE, \"Error setting up eventdev\\n\");\n \n-\tinit_ports(num_ports);\n \tfdata->cap.adptr_setup(num_ports);\n \n \t/* Start the Ethernet port. */\ndiff --git a/examples/eventdev_pipeline/pipeline_worker_generic.c b/examples/eventdev_pipeline/pipeline_worker_generic.c\nindex 766c8e958..0058ba700 100644\n--- a/examples/eventdev_pipeline/pipeline_worker_generic.c\n+++ b/examples/eventdev_pipeline/pipeline_worker_generic.c\n@@ -271,6 +271,134 @@ setup_eventdev_generic(struct worker_data *worker_data)\n \treturn dev_id;\n }\n \n+/*\n+ * Initializes a given port using global settings and with the RX buffers\n+ * coming from the mbuf_pool passed as a parameter.\n+ */\n+static inline int\n+port_init(uint8_t port, struct rte_mempool *mbuf_pool)\n+{\n+\tstruct rte_eth_rxconf rx_conf;\n+\tstatic const struct rte_eth_conf port_conf_default = {\n+\t\t.rxmode = {\n+\t\t\t.mq_mode = ETH_MQ_RX_RSS,\n+\t\t\t.max_rx_pkt_len = RTE_ETHER_MAX_LEN,\n+\t\t},\n+\t\t.rx_adv_conf = {\n+\t\t\t.rss_conf = {\n+\t\t\t\t.rss_hf = ETH_RSS_IP |\n+\t\t\t\t\t ETH_RSS_TCP |\n+\t\t\t\t\t ETH_RSS_UDP,\n+\t\t\t}\n+\t\t}\n+\t};\n+\tconst uint16_t rx_rings = 1, tx_rings = 1;\n+\tconst uint16_t rx_ring_size = 512, tx_ring_size = 512;\n+\tstruct rte_eth_conf port_conf = port_conf_default;\n+\tint retval;\n+\tuint16_t q;\n+\tstruct rte_eth_dev_info dev_info;\n+\tstruct rte_eth_txconf txconf;\n+\n+\tif (!rte_eth_dev_is_valid_port(port))\n+\t\treturn -1;\n+\n+\tretval = rte_eth_dev_info_get(port, &dev_info);\n+\tif (retval != 0) {\n+\t\tprintf(\"Error during getting device (port %u) info: %s\\n\",\n+\t\t\t\tport, strerror(-retval));\n+\t\treturn retval;\n+\t}\n+\n+\tif (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)\n+\t\tport_conf.txmode.offloads |=\n+\t\t\tDEV_TX_OFFLOAD_MBUF_FAST_FREE;\n+\n+\trx_conf = dev_info.default_rxconf;\n+\trx_conf.offloads = port_conf.rxmode.offloads;\n+\n+\tport_conf.rx_adv_conf.rss_conf.rss_hf &=\n+\t\tdev_info.flow_type_rss_offloads;\n+\tif (port_conf.rx_adv_conf.rss_conf.rss_hf !=\n+\t\t\tport_conf_default.rx_adv_conf.rss_conf.rss_hf) {\n+\t\tprintf(\"Port %u modified RSS hash function based on hardware support,\"\n+\t\t\t\"requested:%#\"PRIx64\" configured:%#\"PRIx64\"\\n\",\n+\t\t\tport,\n+\t\t\tport_conf_default.rx_adv_conf.rss_conf.rss_hf,\n+\t\t\tport_conf.rx_adv_conf.rss_conf.rss_hf);\n+\t}\n+\n+\t/* Configure the Ethernet device. */\n+\tretval = rte_eth_dev_configure(port, rx_rings, tx_rings, &port_conf);\n+\tif (retval != 0)\n+\t\treturn retval;\n+\n+\t/* Allocate and set up 1 RX queue per Ethernet port. */\n+\tfor (q = 0; q < rx_rings; q++) {\n+\t\tretval = rte_eth_rx_queue_setup(port, q, rx_ring_size,\n+\t\t\t\trte_eth_dev_socket_id(port), &rx_conf,\n+\t\t\t\tmbuf_pool);\n+\t\tif (retval < 0)\n+\t\t\treturn retval;\n+\t}\n+\n+\ttxconf = dev_info.default_txconf;\n+\ttxconf.offloads = port_conf_default.txmode.offloads;\n+\t/* Allocate and set up 1 TX queue per Ethernet port. */\n+\tfor (q = 0; q < tx_rings; q++) {\n+\t\tretval = rte_eth_tx_queue_setup(port, q, tx_ring_size,\n+\t\t\t\trte_eth_dev_socket_id(port), &txconf);\n+\t\tif (retval < 0)\n+\t\t\treturn retval;\n+\t}\n+\n+\t/* Display the port MAC address. */\n+\tstruct rte_ether_addr addr;\n+\tretval = rte_eth_macaddr_get(port, &addr);\n+\tif (retval != 0) {\n+\t\tprintf(\"Failed to get MAC address (port %u): %s\\n\",\n+\t\t\t\tport, rte_strerror(-retval));\n+\t\treturn retval;\n+\t}\n+\n+\tprintf(\"Port %u MAC: %02\" PRIx8 \" %02\" PRIx8 \" %02\" PRIx8\n+\t\t\t\" %02\" PRIx8 \" %02\" PRIx8 \" %02\" PRIx8 \"\\n\",\n+\t\t\t(unsigned int)port,\n+\t\t\taddr.addr_bytes[0], addr.addr_bytes[1],\n+\t\t\taddr.addr_bytes[2], addr.addr_bytes[3],\n+\t\t\taddr.addr_bytes[4], addr.addr_bytes[5]);\n+\n+\t/* Enable RX in promiscuous mode for the Ethernet device. */\n+\tretval = rte_eth_promiscuous_enable(port);\n+\tif (retval != 0)\n+\t\treturn retval;\n+\n+\treturn 0;\n+}\n+\n+static int\n+init_ports(uint16_t num_ports)\n+{\n+\tuint16_t portid;\n+\n+\tif (!cdata.num_mbuf)\n+\t\tcdata.num_mbuf = 16384 * num_ports;\n+\n+\tstruct rte_mempool *mp = rte_pktmbuf_pool_create(\"packet_pool\",\n+\t\t\t/* mbufs */ cdata.num_mbuf,\n+\t\t\t/* cache_size */ 512,\n+\t\t\t/* priv_size*/ 0,\n+\t\t\t/* data_room_size */ RTE_MBUF_DEFAULT_BUF_SIZE,\n+\t\t\trte_socket_id());\n+\n+\tRTE_ETH_FOREACH_DEV(portid)\n+\t\tif (port_init(portid, mp) != 0)\n+\t\t\trte_exit(EXIT_FAILURE, \"Cannot init port %\"PRIu16 \"\\n\",\n+\t\t\t\t\tportid);\n+\n+\treturn 0;\n+}\n+\n static void\n init_adapters(uint16_t nb_ports)\n {\n@@ -297,6 +425,7 @@ init_adapters(uint16_t nb_ports)\n \t\tadptr_p_conf.enqueue_depth =\n \t\t\tdev_info.max_event_port_enqueue_depth;\n \n+\tinit_ports(nb_ports);\n \t/* Create one adapter for all the ethernet ports. */\n \tret = rte_event_eth_rx_adapter_create(cdata.rx_adapter_id, evdev_id,\n \t\t\t&adptr_p_conf);\ndiff --git a/examples/eventdev_pipeline/pipeline_worker_tx.c b/examples/eventdev_pipeline/pipeline_worker_tx.c\nindex a0f40c27c..55bb2f762 100644\n--- a/examples/eventdev_pipeline/pipeline_worker_tx.c\n+++ b/examples/eventdev_pipeline/pipeline_worker_tx.c\n@@ -603,6 +603,133 @@ service_rx_adapter(void *arg)\n \treturn 0;\n }\n \n+/*\n+ * Initializes a given port using global settings and with the RX buffers\n+ * coming from the mbuf_pool passed as a parameter.\n+ */\n+static inline int\n+port_init(uint8_t port, struct rte_mempool *mbuf_pool)\n+{\n+\tstruct rte_eth_rxconf rx_conf;\n+\tstatic const struct rte_eth_conf port_conf_default = {\n+\t\t.rxmode = {\n+\t\t\t.mq_mode = ETH_MQ_RX_RSS,\n+\t\t\t.max_rx_pkt_len = RTE_ETHER_MAX_LEN,\n+\t\t},\n+\t\t.rx_adv_conf = {\n+\t\t\t.rss_conf = {\n+\t\t\t\t.rss_hf = ETH_RSS_IP |\n+\t\t\t\t\t ETH_RSS_TCP |\n+\t\t\t\t\t ETH_RSS_UDP,\n+\t\t\t}\n+\t\t}\n+\t};\n+\tconst uint16_t rx_rings = 1, tx_rings = 1;\n+\tconst uint16_t rx_ring_size = 512, tx_ring_size = 512;\n+\tstruct rte_eth_conf port_conf = port_conf_default;\n+\tint retval;\n+\tuint16_t q;\n+\tstruct rte_eth_dev_info dev_info;\n+\tstruct rte_eth_txconf txconf;\n+\n+\tif (!rte_eth_dev_is_valid_port(port))\n+\t\treturn -1;\n+\n+\tretval = rte_eth_dev_info_get(port, &dev_info);\n+\tif (retval != 0) {\n+\t\tprintf(\"Error during getting device (port %u) info: %s\\n\",\n+\t\t\t\tport, strerror(-retval));\n+\t\treturn retval;\n+\t}\n+\n+\tif (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)\n+\t\tport_conf.txmode.offloads |=\n+\t\t\tDEV_TX_OFFLOAD_MBUF_FAST_FREE;\n+\trx_conf = dev_info.default_rxconf;\n+\trx_conf.offloads = port_conf.rxmode.offloads;\n+\n+\tport_conf.rx_adv_conf.rss_conf.rss_hf &=\n+\t\tdev_info.flow_type_rss_offloads;\n+\tif (port_conf.rx_adv_conf.rss_conf.rss_hf !=\n+\t\t\tport_conf_default.rx_adv_conf.rss_conf.rss_hf) {\n+\t\tprintf(\"Port %u modified RSS hash function based on hardware support,\"\n+\t\t\t\"requested:%#\"PRIx64\" configured:%#\"PRIx64\"\\n\",\n+\t\t\tport,\n+\t\t\tport_conf_default.rx_adv_conf.rss_conf.rss_hf,\n+\t\t\tport_conf.rx_adv_conf.rss_conf.rss_hf);\n+\t}\n+\n+\t/* Configure the Ethernet device. */\n+\tretval = rte_eth_dev_configure(port, rx_rings, tx_rings, &port_conf);\n+\tif (retval != 0)\n+\t\treturn retval;\n+\n+\t/* Allocate and set up 1 RX queue per Ethernet port. */\n+\tfor (q = 0; q < rx_rings; q++) {\n+\t\tretval = rte_eth_rx_queue_setup(port, q, rx_ring_size,\n+\t\t\t\trte_eth_dev_socket_id(port), &rx_conf,\n+\t\t\t\tmbuf_pool);\n+\t\tif (retval < 0)\n+\t\t\treturn retval;\n+\t}\n+\n+\ttxconf = dev_info.default_txconf;\n+\ttxconf.offloads = port_conf_default.txmode.offloads;\n+\t/* Allocate and set up 1 TX queue per Ethernet port. */\n+\tfor (q = 0; q < tx_rings; q++) {\n+\t\tretval = rte_eth_tx_queue_setup(port, q, tx_ring_size,\n+\t\t\t\trte_eth_dev_socket_id(port), &txconf);\n+\t\tif (retval < 0)\n+\t\t\treturn retval;\n+\t}\n+\n+\t/* Display the port MAC address. */\n+\tstruct rte_ether_addr addr;\n+\tretval = rte_eth_macaddr_get(port, &addr);\n+\tif (retval != 0) {\n+\t\tprintf(\"Failed to get MAC address (port %u): %s\\n\",\n+\t\t\t\tport, rte_strerror(-retval));\n+\t\treturn retval;\n+\t}\n+\n+\tprintf(\"Port %u MAC: %02\" PRIx8 \" %02\" PRIx8 \" %02\" PRIx8\n+\t\t\t\" %02\" PRIx8 \" %02\" PRIx8 \" %02\" PRIx8 \"\\n\",\n+\t\t\t(unsigned int)port,\n+\t\t\taddr.addr_bytes[0], addr.addr_bytes[1],\n+\t\t\taddr.addr_bytes[2], addr.addr_bytes[3],\n+\t\t\taddr.addr_bytes[4], addr.addr_bytes[5]);\n+\n+\t/* Enable RX in promiscuous mode for the Ethernet device. */\n+\tretval = rte_eth_promiscuous_enable(port);\n+\tif (retval != 0)\n+\t\treturn retval;\n+\n+\treturn 0;\n+}\n+\n+static int\n+init_ports(uint16_t num_ports)\n+{\n+\tuint16_t portid;\n+\n+\tif (!cdata.num_mbuf)\n+\t\tcdata.num_mbuf = 16384 * num_ports;\n+\n+\tstruct rte_mempool *mp = rte_pktmbuf_pool_create(\"packet_pool\",\n+\t\t\t/* mbufs */ cdata.num_mbuf,\n+\t\t\t/* cache_size */ 512,\n+\t\t\t/* priv_size*/ 0,\n+\t\t\t/* data_room_size */ RTE_MBUF_DEFAULT_BUF_SIZE,\n+\t\t\trte_socket_id());\n+\n+\tRTE_ETH_FOREACH_DEV(portid)\n+\t\tif (port_init(portid, mp) != 0)\n+\t\t\trte_exit(EXIT_FAILURE, \"Cannot init port %\"PRIu16 \"\\n\",\n+\t\t\t\t\tportid);\n+\n+\treturn 0;\n+}\n+\n static void\n init_adapters(uint16_t nb_ports)\n {\n@@ -621,6 +748,7 @@ init_adapters(uint16_t nb_ports)\n \t\t.new_event_threshold = 4096,\n \t};\n \n+\tinit_ports(nb_ports);\n \tif (adptr_p_conf.new_event_threshold > dev_info.max_num_events)\n \t\tadptr_p_conf.new_event_threshold = dev_info.max_num_events;\n \tif (adptr_p_conf.dequeue_depth > dev_info.max_event_port_dequeue_depth)\n", "prefixes": [ "v17", "05/10" ] }