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GET /api/patches/62684/?format=api
{ "id": 62684, "url": "http://patches.dpdk.org/api/patches/62684/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1573146604-17803-9-git-send-email-viacheslavo@mellanox.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1573146604-17803-9-git-send-email-viacheslavo@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1573146604-17803-9-git-send-email-viacheslavo@mellanox.com", "date": "2019-11-07T17:09:53", "name": "[v3,08/19] net/mlx5: check metadata registers availability", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "71d0f7fa6f7978558518273adfbc7abe0bd5fa92", "submitter": { "id": 1102, "url": "http://patches.dpdk.org/api/people/1102/?format=api", "name": "Slava Ovsiienko", "email": "viacheslavo@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1573146604-17803-9-git-send-email-viacheslavo@mellanox.com/mbox/", "series": [ { "id": 7336, "url": "http://patches.dpdk.org/api/series/7336/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7336", "date": "2019-11-07T17:09:46", "name": "net/mlx5: implement extensive metadata feature", "version": 3, "mbox": "http://patches.dpdk.org/series/7336/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/62684/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/62684/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6542DA034E;\n\tThu, 7 Nov 2019 18:11:15 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id C1BBE1BFCD;\n\tThu, 7 Nov 2019 18:10:29 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 2759B1BFB2\n for <dev@dpdk.org>; Thu, 7 Nov 2019 18:10:23 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n viacheslavo@mellanox.com)\n with ESMTPS (AES256-SHA encrypted); 7 Nov 2019 19:10:21 +0200", "from pegasus11.mtr.labs.mlnx (pegasus11.mtr.labs.mlnx\n [10.210.16.104])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id xA7HALmr022741;\n Thu, 7 Nov 2019 19:10:21 +0200", "from pegasus11.mtr.labs.mlnx (localhost [127.0.0.1])\n by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id xA7HALUb017953;\n Thu, 7 Nov 2019 17:10:21 GMT", "(from viacheslavo@localhost)\n by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id xA7HALmE017952;\n Thu, 7 Nov 2019 17:10:21 GMT" ], "X-Authentication-Warning": "pegasus11.mtr.labs.mlnx: viacheslavo set sender to\n viacheslavo@mellanox.com using -f", "From": "Viacheslav Ovsiienko <viacheslavo@mellanox.com>", "To": "dev@dpdk.org", "Cc": "matan@mellanox.com, rasland@mellanox.com, thomas@monjalon.net,\n orika@mellanox.com, Yongseok Koh <yskoh@mellanox.com>", "Date": "Thu, 7 Nov 2019 17:09:53 +0000", "Message-Id": "<1573146604-17803-9-git-send-email-viacheslavo@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1573146604-17803-1-git-send-email-viacheslavo@mellanox.com>", "References": "<1572940915-29416-1-git-send-email-viacheslavo@mellanox.com>\n <1573146604-17803-1-git-send-email-viacheslavo@mellanox.com>", "Subject": "[dpdk-dev] [PATCH v3 08/19] net/mlx5: check metadata registers\n\tavailability", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The metadata registers reg_c provide support for TAG and\nSET_TAG features. Although there are 8 registers are available\non the current mlx5 devices, some of them can be reserved.\nThe availability should be queried by iterative trial-and-error\nimplemented by mlx5_flow_discover_mreg_c() routine.\n\nIf reg_c is available, it can be regarded inclusively that\nthe extensive metadata support is possible. E.g. metadata\nregister copy action, supporting 16 modify header actions\n(instead of 8 by default) preserving register across\ndifferent domains (FDB and NIC) and so on.\n\nSigned-off-by: Yongseok Koh <yskoh@mellanox.com>\nSigned-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\n---\n drivers/net/mlx5/mlx5.c | 11 +++++\n drivers/net/mlx5/mlx5.h | 11 ++++-\n drivers/net/mlx5/mlx5_ethdev.c | 8 +++-\n drivers/net/mlx5/mlx5_flow.c | 98 +++++++++++++++++++++++++++++++++++++++++\n drivers/net/mlx5/mlx5_flow.h | 13 ------\n drivers/net/mlx5/mlx5_flow_dv.c | 9 ++--\n drivers/net/mlx5/mlx5_prm.h | 18 ++++++++\n 7 files changed, 148 insertions(+), 20 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex 72c30bf..1b86b7b 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -2341,6 +2341,17 @@ struct mlx5_flow_id_pool *\n \t\tgoto error;\n \t}\n \tpriv->config.flow_prio = err;\n+\t/* Query availibility of metadata reg_c's. */\n+\terr = mlx5_flow_discover_mreg_c(eth_dev);\n+\tif (err < 0) {\n+\t\terr = -err;\n+\t\tgoto error;\n+\t}\n+\tif (!mlx5_flow_ext_mreg_supported(eth_dev)) {\n+\t\tDRV_LOG(DEBUG,\n+\t\t\t\"port %u extensive metadata register is not supported\",\n+\t\t\teth_dev->data->port_id);\n+\t}\n \treturn eth_dev;\n error:\n \tif (priv) {\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex f644998..6b82c6d 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -37,6 +37,7 @@\n #include \"mlx5_autoconf.h\"\n #include \"mlx5_defs.h\"\n #include \"mlx5_glue.h\"\n+#include \"mlx5_prm.h\"\n \n enum {\n \tPCI_VENDOR_ID_MELLANOX = 0x15b3,\n@@ -252,6 +253,8 @@ struct mlx5_dev_config {\n \t} mprq; /* Configurations for Multi-Packet RQ. */\n \tint mps; /* Multi-packet send supported mode. */\n \tunsigned int flow_prio; /* Number of flow priorities. */\n+\tenum modify_reg flow_mreg_c[MLX5_MREG_C_NUM];\n+\t/* Availibility of mreg_c's. */\n \tunsigned int tso_max_payload_sz; /* Maximum TCP payload for TSO. */\n \tunsigned int ind_table_max_size; /* Maximum indirection table size. */\n \tunsigned int max_dump_files_num; /* Maximum dump files per queue. */\n@@ -561,6 +564,10 @@ struct mlx5_flow_tbl_resource {\n \n #define MLX5_MAX_TABLES UINT16_MAX\n #define MLX5_HAIRPIN_TX_TABLE (UINT16_MAX - 1)\n+/* Reserve the last two tables for metadata register copy. */\n+#define MLX5_FLOW_MREG_ACT_TABLE_GROUP (MLX5_MAX_TABLES - 1)\n+#define MLX5_FLOW_MREG_CP_TABLE_GROUP \\\n+\t(MLX5_FLOW_MREG_ACT_TABLE_GROUP - 1)\n #define MLX5_MAX_TABLES_FDB UINT16_MAX\n \n #define MLX5_DBR_PAGE_SIZE 4096 /* Must be >= 512. */\n@@ -786,7 +793,7 @@ int mlx5_dev_to_pci_addr(const char *dev_path,\n int mlx5_is_removed(struct rte_eth_dev *dev);\n eth_tx_burst_t mlx5_select_tx_function(struct rte_eth_dev *dev);\n eth_rx_burst_t mlx5_select_rx_function(struct rte_eth_dev *dev);\n-struct mlx5_priv *mlx5_port_to_eswitch_info(uint16_t port);\n+struct mlx5_priv *mlx5_port_to_eswitch_info(uint16_t port, bool valid);\n struct mlx5_priv *mlx5_dev_to_eswitch_info(struct rte_eth_dev *dev);\n int mlx5_sysfs_switch_info(unsigned int ifindex,\n \t\t\t struct mlx5_switch_info *info);\n@@ -866,6 +873,8 @@ int mlx5_xstats_get_names(struct rte_eth_dev *dev __rte_unused,\n \n /* mlx5_flow.c */\n \n+int mlx5_flow_discover_mreg_c(struct rte_eth_dev *eth_dev);\n+bool mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev);\n int mlx5_flow_discover_priorities(struct rte_eth_dev *dev);\n void mlx5_flow_print(struct rte_flow *flow);\n int mlx5_flow_validate(struct rte_eth_dev *dev,\ndiff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c\nindex c2bed2f..2b7c867 100644\n--- a/drivers/net/mlx5/mlx5_ethdev.c\n+++ b/drivers/net/mlx5/mlx5_ethdev.c\n@@ -1793,6 +1793,10 @@ int mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size)\n *\n * @param[in] port\n * Device port id.\n+ * @param[in] valid\n+ * Device port id is valid, skip check. This flag is useful\n+ * when trials are performed from probing and device is not\n+ * flagged as valid yet (in attaching process).\n * @param[out] es_domain_id\n * E-Switch domain id.\n * @param[out] es_port_id\n@@ -1803,7 +1807,7 @@ int mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size)\n * on success, NULL otherwise and rte_errno is set.\n */\n struct mlx5_priv *\n-mlx5_port_to_eswitch_info(uint16_t port)\n+mlx5_port_to_eswitch_info(uint16_t port, bool valid)\n {\n \tstruct rte_eth_dev *dev;\n \tstruct mlx5_priv *priv;\n@@ -1812,7 +1816,7 @@ struct mlx5_priv *\n \t\trte_errno = EINVAL;\n \t\treturn NULL;\n \t}\n-\tif (!rte_eth_dev_is_valid_port(port)) {\n+\tif (!valid && !rte_eth_dev_is_valid_port(port)) {\n \t\trte_errno = ENODEV;\n \t\treturn NULL;\n \t}\ndiff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c\nindex 6e6c845..f32ea8d 100644\n--- a/drivers/net/mlx5/mlx5_flow.c\n+++ b/drivers/net/mlx5/mlx5_flow.c\n@@ -368,6 +368,33 @@ static enum modify_reg flow_get_reg_id(struct rte_eth_dev *dev,\n \t\t\t\t NULL, \"invalid feature name\");\n }\n \n+\n+/**\n+ * Check extensive flow metadata register support.\n+ *\n+ * @param dev\n+ * Pointer to rte_eth_dev structure.\n+ *\n+ * @return\n+ * True if device supports extensive flow metadata register, otherwise false.\n+ */\n+bool\n+mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_dev_config *config = &priv->config;\n+\n+\t/*\n+\t * Having available reg_c can be regarded inclusively as supporting\n+\t * extensive flow metadata register, which could mean,\n+\t * - metadata register copy action by modify header.\n+\t * - 16 modify header actions is supported.\n+\t * - reg_c's are preserved across different domain (FDB and NIC) on\n+\t * packet loopback by flow lookup miss.\n+\t */\n+\treturn config->flow_mreg_c[2] != REG_NONE;\n+}\n+\n /**\n * Discover the maximum number of priority available.\n *\n@@ -4033,3 +4060,74 @@ struct rte_flow *\n \t}\n \treturn 0;\n }\n+\n+/**\n+ * Discover availability of metadata reg_c's.\n+ *\n+ * Iteratively use test flows to check availability.\n+ *\n+ * @param[in] dev\n+ * Pointer to the Ethernet device structure.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+int\n+mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_dev_config *config = &priv->config;\n+\tenum modify_reg idx;\n+\tint n = 0;\n+\n+\t/* reg_c[0] and reg_c[1] are reserved. */\n+\tconfig->flow_mreg_c[n++] = REG_C_0;\n+\tconfig->flow_mreg_c[n++] = REG_C_1;\n+\t/* Discover availability of other reg_c's. */\n+\tfor (idx = REG_C_2; idx <= REG_C_7; ++idx) {\n+\t\tstruct rte_flow_attr attr = {\n+\t\t\t.group = MLX5_FLOW_MREG_CP_TABLE_GROUP,\n+\t\t\t.priority = MLX5_FLOW_PRIO_RSVD,\n+\t\t\t.ingress = 1,\n+\t\t};\n+\t\tstruct rte_flow_item items[] = {\n+\t\t\t[0] = {\n+\t\t\t\t.type = RTE_FLOW_ITEM_TYPE_END,\n+\t\t\t},\n+\t\t};\n+\t\tstruct rte_flow_action actions[] = {\n+\t\t\t[0] = {\n+\t\t\t\t.type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,\n+\t\t\t\t.conf = &(struct mlx5_flow_action_copy_mreg){\n+\t\t\t\t\t.src = REG_C_1,\n+\t\t\t\t\t.dst = idx,\n+\t\t\t\t},\n+\t\t\t},\n+\t\t\t[1] = {\n+\t\t\t\t.type = RTE_FLOW_ACTION_TYPE_JUMP,\n+\t\t\t\t.conf = &(struct rte_flow_action_jump){\n+\t\t\t\t\t.group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,\n+\t\t\t\t},\n+\t\t\t},\n+\t\t\t[2] = {\n+\t\t\t\t.type = RTE_FLOW_ACTION_TYPE_END,\n+\t\t\t},\n+\t\t};\n+\t\tstruct rte_flow *flow;\n+\t\tstruct rte_flow_error error;\n+\n+\t\tif (!config->dv_flow_en)\n+\t\t\tbreak;\n+\t\t/* Create internal flow, validation skips copy action. */\n+\t\tflow = flow_list_create(dev, NULL, &attr, items,\n+\t\t\t\t\tactions, false, &error);\n+\t\tif (!flow)\n+\t\t\tcontinue;\n+\t\tif (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))\n+\t\t\tconfig->flow_mreg_c[n++] = idx;\n+\t\tflow_list_destroy(dev, NULL, flow);\n+\t}\n+\tfor (; n < MLX5_MREG_C_NUM; ++n)\n+\t\tconfig->flow_mreg_c[n] = REG_NONE;\n+\treturn 0;\n+}\ndiff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex b9a9507..f2b6726 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -27,19 +27,6 @@\n #include \"mlx5.h\"\n #include \"mlx5_prm.h\"\n \n-enum modify_reg {\n-\tREG_A,\n-\tREG_B,\n-\tREG_C_0,\n-\tREG_C_1,\n-\tREG_C_2,\n-\tREG_C_3,\n-\tREG_C_4,\n-\tREG_C_5,\n-\tREG_C_6,\n-\tREG_C_7,\n-};\n-\n /* Private rte flow items. */\n enum mlx5_rte_flow_item_type {\n \tMLX5_RTE_FLOW_ITEM_TYPE_END = INT_MIN,\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 9b2eba5..da3589f 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -832,6 +832,7 @@ struct field_modify_info modify_tcp[] = {\n }\n \n static enum mlx5_modification_field reg_to_field[] = {\n+\t[REG_NONE] = MLX5_MODI_OUT_NONE,\n \t[REG_A] = MLX5_MODI_META_DATA_REG_A,\n \t[REG_B] = MLX5_MODI_META_DATA_REG_B,\n \t[REG_C_0] = MLX5_MODI_META_REG_C_0,\n@@ -1040,7 +1041,7 @@ struct field_modify_info modify_tcp[] = {\n \t\treturn ret;\n \tif (!spec)\n \t\treturn 0;\n-\tesw_priv = mlx5_port_to_eswitch_info(spec->id);\n+\tesw_priv = mlx5_port_to_eswitch_info(spec->id, false);\n \tif (!esw_priv)\n \t\treturn rte_flow_error_set(error, rte_errno,\n \t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,\n@@ -2697,7 +2698,7 @@ struct field_modify_info modify_tcp[] = {\n \t\t\t\t\t \"failed to obtain E-Switch info\");\n \tport_id = action->conf;\n \tport = port_id->original ? dev->data->port_id : port_id->id;\n-\tact_priv = mlx5_port_to_eswitch_info(port);\n+\tact_priv = mlx5_port_to_eswitch_info(port, false);\n \tif (!act_priv)\n \t\treturn rte_flow_error_set\n \t\t\t\t(error, rte_errno,\n@@ -5092,7 +5093,7 @@ struct field_modify_info modify_tcp[] = {\n \n \tmask = pid_m ? pid_m->id : 0xffff;\n \tid = pid_v ? pid_v->id : dev->data->port_id;\n-\tpriv = mlx5_port_to_eswitch_info(id);\n+\tpriv = mlx5_port_to_eswitch_info(id, item == NULL);\n \tif (!priv)\n \t\treturn -rte_errno;\n \t/* Translate to vport field or to metadata, depending on mode. */\n@@ -5540,7 +5541,7 @@ struct field_modify_info modify_tcp[] = {\n \t\t\t(const struct rte_flow_action_port_id *)action->conf;\n \n \tport = conf->original ? dev->data->port_id : conf->id;\n-\tpriv = mlx5_port_to_eswitch_info(port);\n+\tpriv = mlx5_port_to_eswitch_info(port, false);\n \tif (!priv)\n \t\treturn rte_flow_error_set(error, -rte_errno,\n \t\t\t\t\t RTE_FLOW_ERROR_TYPE_ACTION,\ndiff --git a/drivers/net/mlx5/mlx5_prm.h b/drivers/net/mlx5/mlx5_prm.h\nindex b9e53f5..c17ba66 100644\n--- a/drivers/net/mlx5/mlx5_prm.h\n+++ b/drivers/net/mlx5/mlx5_prm.h\n@@ -392,6 +392,7 @@ enum {\n \n /* The field of packet to be modified. */\n enum mlx5_modification_field {\n+\tMLX5_MODI_OUT_NONE = -1,\n \tMLX5_MODI_OUT_SMAC_47_16 = 1,\n \tMLX5_MODI_OUT_SMAC_15_0,\n \tMLX5_MODI_OUT_ETHERTYPE,\n@@ -455,6 +456,23 @@ enum mlx5_modification_field {\n \tMLX5_MODI_IN_TCP_ACK_NUM = 0x5C,\n };\n \n+/* Total number of metadata reg_c's. */\n+#define MLX5_MREG_C_NUM (MLX5_MODI_META_REG_C_7 - MLX5_MODI_META_REG_C_0 + 1)\n+\n+enum modify_reg {\n+\tREG_NONE = 0,\n+\tREG_A,\n+\tREG_B,\n+\tREG_C_0,\n+\tREG_C_1,\n+\tREG_C_2,\n+\tREG_C_3,\n+\tREG_C_4,\n+\tREG_C_5,\n+\tREG_C_6,\n+\tREG_C_7,\n+};\n+\n /* Modification sub command. */\n struct mlx5_modification_cmd {\n \tunion {\n", "prefixes": [ "v3", "08/19" ] }