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GET /api/patches/62436/?format=api
{ "id": 62436, "url": "http://patches.dpdk.org/api/patches/62436/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1572940915-29416-16-git-send-email-viacheslavo@mellanox.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1572940915-29416-16-git-send-email-viacheslavo@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1572940915-29416-16-git-send-email-viacheslavo@mellanox.com", "date": "2019-11-05T08:01:50", "name": "[15/20] net/mlx5: extend flow meta data support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "96cc40aba73a018ba1ff14b6db4b69e429b7f0ea", "submitter": { "id": 1102, "url": "http://patches.dpdk.org/api/people/1102/?format=api", "name": "Slava Ovsiienko", "email": "viacheslavo@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1572940915-29416-16-git-send-email-viacheslavo@mellanox.com/mbox/", "series": [ { "id": 7242, "url": "http://patches.dpdk.org/api/series/7242/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7242", "date": "2019-11-05T08:01:35", "name": "net/mlx5: implement extensive metadata feature", "version": 1, "mbox": "http://patches.dpdk.org/series/7242/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/62436/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/62436/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id DAC88A0352;\n\tTue, 5 Nov 2019 09:06:16 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D12AD1BEF1;\n\tTue, 5 Nov 2019 09:02:34 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id AFC621BE9F\n for <dev@dpdk.org>; Tue, 5 Nov 2019 09:02:18 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n viacheslavo@mellanox.com)\n with ESMTPS (AES256-SHA encrypted); 5 Nov 2019 10:02:14 +0200", "from pegasus11.mtr.labs.mlnx (pegasus11.mtr.labs.mlnx\n [10.210.16.104])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id xA582E2j026530;\n Tue, 5 Nov 2019 10:02:14 +0200", "from pegasus11.mtr.labs.mlnx (localhost [127.0.0.1])\n by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id xA582Ean030786;\n Tue, 5 Nov 2019 08:02:14 GMT", "(from viacheslavo@localhost)\n by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id xA582E3h030785;\n Tue, 5 Nov 2019 08:02:14 GMT" ], "X-Authentication-Warning": "pegasus11.mtr.labs.mlnx: viacheslavo set sender to\n viacheslavo@mellanox.com using -f", "From": "Viacheslav Ovsiienko <viacheslavo@mellanox.com>", "To": "dev@dpdk.org", "Cc": "matan@mellanox.com, rasland@mellanox.com, thomas@monjalon.net,\n orika@mellanox.com, Yongseok Koh <yskoh@mellanox.com>", "Date": "Tue, 5 Nov 2019 08:01:50 +0000", "Message-Id": "<1572940915-29416-16-git-send-email-viacheslavo@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1572940915-29416-1-git-send-email-viacheslavo@mellanox.com>", "References": "<1572940915-29416-1-git-send-email-viacheslavo@mellanox.com>", "Subject": "[dpdk-dev] [PATCH 15/20] net/mlx5: extend flow meta data support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "META item is supported on both Rx and Tx. 'transfer' attribute\nis also supported. SET_META action is also added.\n\nDue to restriction on reg_c[meta], various bit width might be\navailable. If devarg parameter dv_xmeta_en=1, the META uses\nmetadata register reg_c[0], which may be required for internal\nkernel or firmware needs. In this case PMD queries kernel about\navailable fields in reg_c[0] and restricts the register usage\naccordingly. If devarg parameter dv_xmeta_en=2, the META feature\nuses reg_c[1], there should be no limitations on the data width.\n\nHowever, extensive MEAT feature is currently disabled until\nregister copy on loopback is supported by forthcoming patches.\n\nSigned-off-by: Yongseok Koh <yskoh@mellanox.com>\nSigned-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\n---\n drivers/net/mlx5/mlx5_flow.h | 4 +-\n drivers/net/mlx5/mlx5_flow_dv.c | 250 +++++++++++++++++++++++++++++++++++++---\n 2 files changed, 235 insertions(+), 19 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex d6209ff..ef16aef 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -196,6 +196,7 @@ enum mlx5_feature_name {\n #define MLX5_FLOW_ACTION_DEC_TCP_ACK (1u << 31)\n #define MLX5_FLOW_ACTION_SET_TAG (1ull << 32)\n #define MLX5_FLOW_ACTION_MARK_EXT (1ull << 33)\n+#define MLX5_FLOW_ACTION_SET_META (1ull << 34)\n \n #define MLX5_FLOW_FATE_ACTIONS \\\n \t(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | \\\n@@ -231,7 +232,8 @@ enum mlx5_feature_name {\n \t\t\t\t MLX5_FLOW_ACTION_DEC_TCP_ACK | \\\n \t\t\t\t MLX5_FLOW_ACTION_OF_SET_VLAN_VID | \\\n \t\t\t\t MLX5_FLOW_ACTION_SET_TAG | \\\n-\t\t\t\t MLX5_FLOW_ACTION_MARK_EXT)\n+\t\t\t\t MLX5_FLOW_ACTION_MARK_EXT | \\\n+\t\t\t\t MLX5_FLOW_ACTION_SET_META)\n \n #define MLX5_FLOW_VLAN_ACTIONS (MLX5_FLOW_ACTION_OF_POP_VLAN | \\\n \t\t\t\tMLX5_FLOW_ACTION_OF_PUSH_VLAN)\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 5714a6d..19f58cb 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -1043,6 +1043,103 @@ struct field_modify_info modify_tcp[] = {\n }\n \n /**\n+ * Get metadata register index for specified steering domain.\n+ *\n+ * @param[in] dev\n+ * Pointer to the rte_eth_dev structure.\n+ * @param[in] attr\n+ * Attributes of flow to determine steering domain.\n+ * @param[out] error\n+ * Pointer to the error structure.\n+ *\n+ * @return\n+ * positive index on success, a negative errno value otherwise\n+ * and rte_errno is set.\n+ */\n+static enum modify_reg\n+flow_dv_get_metadata_reg(struct rte_eth_dev *dev,\n+\t\t\t const struct rte_flow_attr *attr,\n+\t\t\t struct rte_flow_error *error)\n+{\n+\tenum modify_reg reg =\n+\t\tmlx5_flow_get_reg_id(dev, attr->transfer ?\n+\t\t\t\t\t MLX5_METADATA_FDB :\n+\t\t\t\t\t attr->egress ?\n+\t\t\t\t\t MLX5_METADATA_TX :\n+\t\t\t\t\t MLX5_METADATA_RX, 0, error);\n+\tif (reg < 0)\n+\t\treturn rte_flow_error_set(error,\n+\t\t\t\t\t ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t NULL, \"unavailable \"\n+\t\t\t\t\t \"metadata register\");\n+\treturn reg;\n+}\n+\n+/**\n+ * Convert SET_META action to DV specification.\n+ *\n+ * @param[in] dev\n+ * Pointer to the rte_eth_dev structure.\n+ * @param[in,out] resource\n+ * Pointer to the modify-header resource.\n+ * @param[in] attr\n+ * Attributes of flow that includes this item.\n+ * @param[in] conf\n+ * Pointer to action specification.\n+ * @param[out] error\n+ * Pointer to the error structure.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+static int\n+flow_dv_convert_action_set_meta\n+\t\t\t(struct rte_eth_dev *dev,\n+\t\t\t struct mlx5_flow_dv_modify_hdr_resource *resource,\n+\t\t\t const struct rte_flow_attr *attr,\n+\t\t\t const struct rte_flow_action_set_meta *conf,\n+\t\t\t struct rte_flow_error *error)\n+{\n+\tuint32_t data = conf->data;\n+\tuint32_t mask = conf->mask;\n+\tstruct rte_flow_item item = {\n+\t\t.spec = &data,\n+\t\t.mask = &mask,\n+\t};\n+\tstruct field_modify_info reg_c_x[] = {\n+\t\t[1] = {0, 0, 0},\n+\t};\n+\tenum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);\n+\n+\tif (reg < 0)\n+\t\treturn reg;\n+\t/*\n+\t * In datapath code there is no endianness\n+\t * coversions for perfromance reasons, all\n+\t * pattern conversions are done in rte_flow.\n+\t */\n+\tif (reg == REG_C_0) {\n+\t\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\t\tuint32_t msk_c0 = priv->sh->dv_regc0_mask;\n+\t\tuint32_t shl_c0 = rte_bsf32(msk_c0);\n+\n+\t\tdata = rte_cpu_to_be_32(data);\n+\t\tmask = rte_cpu_to_be_32(mask);\n+\t\tmsk_c0 = rte_cpu_to_be_32(msk_c0);\n+\t\tmask <<= shl_c0;\n+\t\tdata <<= shl_c0;\n+\t\tassert(msk_c0);\n+\t\tassert(!(~msk_c0 & mask));\n+\t\tdata = rte_be_to_cpu_32(data);\n+\t\tmask = rte_be_to_cpu_32(mask);\n+\t}\n+\treg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};\n+\t/* The routine expects parameters in memory as big-endian ones. */\n+\treturn flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,\n+\t\t\t\t\t MLX5_MODIFICATION_TYPE_SET, error);\n+}\n+\n+/**\n * Validate MARK item.\n *\n * @param[in] dev\n@@ -1132,11 +1229,14 @@ struct field_modify_info modify_tcp[] = {\n \t\t\t const struct rte_flow_attr *attr,\n \t\t\t struct rte_flow_error *error)\n {\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_dev_config *config = &priv->config;\n \tconst struct rte_flow_item_meta *spec = item->spec;\n \tconst struct rte_flow_item_meta *mask = item->mask;\n-\tconst struct rte_flow_item_meta nic_mask = {\n+\tstruct rte_flow_item_meta nic_mask = {\n \t\t.data = UINT32_MAX\n \t};\n+\tenum modify_reg reg;\n \tint ret;\n \n \tif (!spec)\n@@ -1146,23 +1246,27 @@ struct field_modify_info modify_tcp[] = {\n \t\t\t\t\t \"data cannot be empty\");\n \tif (!spec->data)\n \t\treturn rte_flow_error_set(error, EINVAL,\n-\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM_SPEC,\n-\t\t\t\t\t NULL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,\n \t\t\t\t\t \"data cannot be zero\");\n+\tif (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {\n+\t\tif (!mlx5_flow_ext_mreg_supported(dev))\n+\t\t\treturn rte_flow_error_set(error, ENOTSUP,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM, item,\n+\t\t\t\t\t \"extended metadata register\"\n+\t\t\t\t\t \" isn't supported\");\n+\t\treg = flow_dv_get_metadata_reg(dev, attr, error);\n+\t\tif (reg < 0)\n+\t\t\treturn reg;\n+\t\tif (reg != REG_A && reg != REG_B)\n+\t\t\tnic_mask.data = priv->sh->dv_meta_mask;\n+\t}\n \tif (!mask)\n \t\tmask = &rte_flow_item_meta_mask;\n \tret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,\n \t\t\t\t\t(const uint8_t *)&nic_mask,\n \t\t\t\t\tsizeof(struct rte_flow_item_meta),\n \t\t\t\t\terror);\n-\tif (ret < 0)\n-\t\treturn ret;\n-\tif (attr->ingress)\n-\t\treturn rte_flow_error_set(error, ENOTSUP,\n-\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,\n-\t\t\t\t\t NULL,\n-\t\t\t\t\t \"pattern not supported for ingress\");\n-\treturn 0;\n+\treturn ret;\n }\n \n /**\n@@ -1718,6 +1822,67 @@ struct field_modify_info modify_tcp[] = {\n }\n \n /**\n+ * Validate SET_META action.\n+ *\n+ * @param[in] dev\n+ * Pointer to the rte_eth_dev structure.\n+ * @param[in] action\n+ * Pointer to the encap action.\n+ * @param[in] action_flags\n+ * Holds the actions detected until now.\n+ * @param[in] attr\n+ * Pointer to flow attributes\n+ * @param[out] error\n+ * Pointer to error structure.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+static int\n+flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,\n+\t\t\t\t const struct rte_flow_action *action,\n+\t\t\t\t uint64_t action_flags __rte_unused,\n+\t\t\t\t const struct rte_flow_attr *attr,\n+\t\t\t\t struct rte_flow_error *error)\n+{\n+\tconst struct rte_flow_action_set_meta *conf;\n+\tuint32_t nic_mask = UINT32_MAX;\n+\tenum modify_reg reg;\n+\n+\tif (!mlx5_flow_ext_mreg_supported(dev))\n+\t\treturn rte_flow_error_set(error, ENOTSUP,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ACTION, action,\n+\t\t\t\t\t \"extended metadata register\"\n+\t\t\t\t\t \" isn't supported\");\n+\treg = flow_dv_get_metadata_reg(dev, attr, error);\n+\tif (reg < 0)\n+\t\treturn reg;\n+\tif (reg != REG_A && reg != REG_B) {\n+\t\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\n+\t\tnic_mask = priv->sh->dv_meta_mask;\n+\t}\n+\tif (!(action->conf))\n+\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ACTION, action,\n+\t\t\t\t\t \"configuration cannot be null\");\n+\tconf = (const struct rte_flow_action_set_meta *)action->conf;\n+\tif (!conf->mask)\n+\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ACTION, action,\n+\t\t\t\t\t \"zero mask doesn't have any effect\");\n+\tif (conf->mask & ~nic_mask)\n+\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ACTION, action,\n+\t\t\t\t\t \"meta data must be within reg C0\");\n+\tif (!(conf->data & conf->mask))\n+\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ACTION, action,\n+\t\t\t\t\t \"zero value has no effect\");\n+\treturn 0;\n+}\n+\n+/**\n * Validate SET_TAG action.\n *\n * @param[in] dev\n@@ -4245,6 +4410,17 @@ struct field_modify_info modify_tcp[] = {\n \t\t\t\t++actions_n;\n \t\t\t}\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_SET_META:\n+\t\t\tret = flow_dv_validate_action_set_meta(dev, actions,\n+\t\t\t\t\t\t\t action_flags,\n+\t\t\t\t\t\t\t attr, error);\n+\t\t\tif (ret < 0)\n+\t\t\t\treturn ret;\n+\t\t\t/* Count all modify-header actions as one action. */\n+\t\t\tif (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))\n+\t\t\t\t++actions_n;\n+\t\t\taction_flags |= MLX5_FLOW_ACTION_SET_META;\n+\t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_SET_TAG:\n \t\t\tret = flow_dv_validate_action_set_tag(dev, actions,\n \t\t\t\t\t\t\t action_flags,\n@@ -5524,15 +5700,21 @@ struct field_modify_info modify_tcp[] = {\n /**\n * Add META item to matcher\n *\n+ * @param[in] dev\n+ * The devich to configure through.\n * @param[in, out] matcher\n * Flow matcher.\n * @param[in, out] key\n * Flow matcher value.\n+ * @param[in] attr\n+ * Attributes of flow that includes this item.\n * @param[in] item\n * Flow pattern to translate.\n */\n static void\n-flow_dv_translate_item_meta(void *matcher, void *key,\n+flow_dv_translate_item_meta(struct rte_eth_dev *dev,\n+\t\t\t void *matcher, void *key,\n+\t\t\t const struct rte_flow_attr *attr,\n \t\t\t const struct rte_flow_item *item)\n {\n \tconst struct rte_flow_item_meta *meta_m;\n@@ -5542,10 +5724,34 @@ struct field_modify_info modify_tcp[] = {\n \tif (!meta_m)\n \t\tmeta_m = &rte_flow_item_meta_mask;\n \tmeta_v = (const void *)item->spec;\n-\tif (meta_v)\n-\t\tflow_dv_match_meta_reg(matcher, key, REG_A,\n-\t\t\t\t rte_cpu_to_be_32(meta_v->data),\n-\t\t\t\t rte_cpu_to_be_32(meta_m->data));\n+\tif (meta_v) {\n+\t\tenum modify_reg reg;\n+\t\tuint32_t value = meta_v->data;\n+\t\tuint32_t mask = meta_m->data;\n+\n+\t\treg = flow_dv_get_metadata_reg(dev, attr, NULL);\n+\t\tif (reg < 0)\n+\t\t\treturn;\n+\t\t/*\n+\t\t * In datapath code there is no endianness\n+\t\t * coversions for perfromance reasons, all\n+\t\t * pattern conversions are done in rte_flow.\n+\t\t */\n+\t\tvalue = rte_cpu_to_be_32(value);\n+\t\tmask = rte_cpu_to_be_32(mask);\n+\t\tif (reg == REG_C_0) {\n+\t\t\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\t\t\tuint32_t msk_c0 = priv->sh->dv_regc0_mask;\n+\t\t\tuint32_t shl_c0 = rte_bsf32(msk_c0);\n+\n+\t\t\tmsk_c0 = rte_cpu_to_be_32(msk_c0);\n+\t\t\tvalue <<= shl_c0;\n+\t\t\tmask <<= shl_c0;\n+\t\t\tassert(msk_c0);\n+\t\t\tassert(!(~msk_c0 & mask));\n+\t\t}\n+\t\tflow_dv_match_meta_reg(matcher, key, reg, value, mask);\n+\t}\n }\n \n /**\n@@ -6313,6 +6519,14 @@ struct field_modify_info modify_tcp[] = {\n \t\t\tdev_flow->dv.actions[actions_n++] =\n \t\t\t\tdev_flow->dv.tag_resource->action;\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_SET_META:\n+\t\t\tif (flow_dv_convert_action_set_meta\n+\t\t\t\t(dev, &mhdr_res, attr,\n+\t\t\t\t (const struct rte_flow_action_set_meta *)\n+\t\t\t\t actions->conf, error))\n+\t\t\t\treturn -rte_errno;\n+\t\t\taction_flags |= MLX5_FLOW_ACTION_SET_META;\n+\t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_SET_TAG:\n \t\t\tif (flow_dv_convert_action_set_tag\n \t\t\t\t(dev, &mhdr_res,\n@@ -6767,8 +6981,8 @@ struct field_modify_info modify_tcp[] = {\n \t\t\tlast_item = MLX5_FLOW_ITEM_MARK;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ITEM_TYPE_META:\n-\t\t\tflow_dv_translate_item_meta(match_mask, match_value,\n-\t\t\t\t\t\t items);\n+\t\t\tflow_dv_translate_item_meta(dev, match_mask,\n+\t\t\t\t\t\t match_value, attr, items);\n \t\t\tlast_item = MLX5_FLOW_ITEM_METADATA;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ITEM_TYPE_ICMP:\n", "prefixes": [ "15/20" ] }