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GET /api/patches/62326/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 62326,
    "url": "http://patches.dpdk.org/api/patches/62326/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/998b84e14a43607bde8013ac88531d8bbce0e498.1572621163.git.vladimir.medvedkin@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<998b84e14a43607bde8013ac88531d8bbce0e498.1572621163.git.vladimir.medvedkin@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/998b84e14a43607bde8013ac88531d8bbce0e498.1572621163.git.vladimir.medvedkin@intel.com",
    "date": "2019-11-01T15:21:44",
    "name": "[v6,11/12] test/fib: add FIB library performance autotests",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "09e344bad782970f27a240e09155a3eabe3a2192",
    "submitter": {
        "id": 1216,
        "url": "http://patches.dpdk.org/api/people/1216/?format=api",
        "name": "Vladimir Medvedkin",
        "email": "vladimir.medvedkin@intel.com"
    },
    "delegate": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/998b84e14a43607bde8013ac88531d8bbce0e498.1572621163.git.vladimir.medvedkin@intel.com/mbox/",
    "series": [
        {
            "id": 7198,
            "url": "http://patches.dpdk.org/api/series/7198/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7198",
            "date": "2019-11-01T15:21:33",
            "name": "lib: add RIB and FIB liraries",
            "version": 6,
            "mbox": "http://patches.dpdk.org/series/7198/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/62326/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/62326/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 810F9A00BE;\n\tFri,  1 Nov 2019 16:24:14 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 782391E8AB;\n\tFri,  1 Nov 2019 16:22:15 +0100 (CET)",
            "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n by dpdk.org (Postfix) with ESMTP id 6F14E1E548\n for <dev@dpdk.org>; Fri,  1 Nov 2019 16:22:12 +0100 (CET)",
            "from orsmga004.jf.intel.com ([10.7.209.38])\n by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 01 Nov 2019 08:22:12 -0700",
            "from silpixa00400072.ir.intel.com ([10.237.222.213])\n by orsmga004.jf.intel.com with ESMTP; 01 Nov 2019 08:22:10 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.68,256,1569308400\"; d=\"scan'208\";a=\"351979163\"",
        "From": "Vladimir Medvedkin <vladimir.medvedkin@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "bruce.richardson@intel.com, konstantin.ananyev@intel.com,\n thomas@monjalon.net, aconole@redhat.com",
        "Date": "Fri,  1 Nov 2019 15:21:44 +0000",
        "Message-Id": "\n <998b84e14a43607bde8013ac88531d8bbce0e498.1572621163.git.vladimir.medvedkin@intel.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": [
            "<cover.1572621162.git.vladimir.medvedkin@intel.com>",
            "<cover.1572621162.git.vladimir.medvedkin@intel.com>"
        ],
        "References": [
            "<cover.1572621162.git.vladimir.medvedkin@intel.com>",
            "<cover.1568221361.git.vladimir.medvedkin@intel.com>\n <cover.1572621162.git.vladimir.medvedkin@intel.com>"
        ],
        "Subject": "[dpdk-dev] [PATCH v6 11/12] test/fib: add FIB library performance\n\tautotests",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Performance tests for the new FIB library.\n\nSigned-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>\n---\n app/test/Makefile         |   1 +\n app/test/autotest_data.py |   6 +\n app/test/meson.build      |   2 +\n app/test/test_fib_perf.c  | 411 ++++++++++++++++++++++++++++++++++++++++++++++\n 4 files changed, 420 insertions(+)\n create mode 100644 app/test/test_fib_perf.c",
    "diff": "diff --git a/app/test/Makefile b/app/test/Makefile\nindex c230dbf..3a3f920 100644\n--- a/app/test/Makefile\n+++ b/app/test/Makefile\n@@ -128,6 +128,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_RIB) += test_rib.c\n SRCS-$(CONFIG_RTE_LIBRTE_RIB) += test_rib6.c\n SRCS-$(CONFIG_RTE_LIBRTE_FIB) += test_fib.c\n SRCS-$(CONFIG_RTE_LIBRTE_FIB) += test_fib6.c\n+SRCS-$(CONFIG_RTE_LIBRTE_FIB) += test_fib_perf.c\n \n SRCS-$(CONFIG_RTE_LIBRTE_LPM) += test_lpm.c\n SRCS-$(CONFIG_RTE_LIBRTE_LPM) += test_lpm_perf.c\ndiff --git a/app/test/autotest_data.py b/app/test/autotest_data.py\nindex 5c220db..0783979 100644\n--- a/app/test/autotest_data.py\n+++ b/app/test/autotest_data.py\n@@ -719,6 +719,12 @@\n         \"Report\":  None,\n     },\n     {\n+        \"Name\":    \"FIB perf autotest\",\n+        \"Command\": \"fib_perf_autotest\",\n+        \"Func\":    default_autotest,\n+        \"Report\":  None,\n+    },\n+    {\n          \"Name\":    \"Efd perf autotest\",\n          \"Command\": \"efd_perf_autotest\",\n          \"Func\":    default_autotest,\ndiff --git a/app/test/meson.build b/app/test/meson.build\nindex 0b83ada..929883a 100644\n--- a/app/test/meson.build\n+++ b/app/test/meson.build\n@@ -48,6 +48,7 @@ test_sources = files('commands.c',\n \t'test_external_mem.c',\n \t'test_fbarray.c',\n \t'test_fib.c',\n+\t'test_fib_perf.c',\n \t'test_fib6.c',\n \t'test_func_reentrancy.c',\n \t'test_flow_classify.c',\n@@ -256,6 +257,7 @@ perf_test_names = [\n         'reciprocal_division_perf',\n         'lpm_perf_autotest',\n         'fib_slow_autotest',\n+        'fib_perf_autotest',\n         'red_all',\n         'barrier_autotest',\n         'hash_multiwriter_autotest',\ndiff --git a/app/test/test_fib_perf.c b/app/test/test_fib_perf.c\nnew file mode 100644\nindex 0000000..573087c\n--- /dev/null\n+++ b/app/test/test_fib_perf.c\n@@ -0,0 +1,411 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Vladimir Medvedkin <medvedkinv@gmail.com>\n+ * Copyright(c) 2019 Intel Corporation\n+ */\n+\n+#include <stdio.h>\n+#include <stdint.h>\n+#include <stdlib.h>\n+#include <math.h>\n+\n+#include <rte_cycles.h>\n+#include <rte_random.h>\n+#include <rte_branch_prediction.h>\n+#include <rte_ip.h>\n+#include <rte_fib.h>\n+\n+#include \"test.h\"\n+#include \"test_xmmt_ops.h\"\n+\n+#define TEST_FIB_ASSERT(cond) do {\t\t\t\t\\\n+\tif (!(cond)) {\t\t\t\t\t\t\\\n+\t\tprintf(\"Error at line %d:\\n\", __LINE__);\t\\\n+\t\treturn -1;\t\t\t\t\t\\\n+\t}                                                       \\\n+} while (0)\n+\n+#define ITERATIONS (1 << 10)\n+#define BATCH_SIZE (1 << 12)\n+#define BULK_SIZE 32\n+\n+#define MAX_RULE_NUM (1200000)\n+\n+struct route_rule {\n+\tuint32_t ip;\n+\tuint8_t depth;\n+};\n+\n+struct route_rule large_route_table[MAX_RULE_NUM];\n+\n+static uint32_t num_route_entries;\n+#define NUM_ROUTE_ENTRIES num_route_entries\n+\n+enum {\n+\tIP_CLASS_A,\n+\tIP_CLASS_B,\n+\tIP_CLASS_C\n+};\n+#define RTE_FIB_MAX_DEPTH\t32\n+/* struct route_rule_count defines the total number of rules in following a/b/c\n+ * each item in a[]/b[]/c[] is the number of common IP address class A/B/C, not\n+ * including the ones for private local network.\n+ */\n+struct route_rule_count {\n+\tuint32_t a[RTE_FIB_MAX_DEPTH];\n+\tuint32_t b[RTE_FIB_MAX_DEPTH];\n+\tuint32_t c[RTE_FIB_MAX_DEPTH];\n+};\n+\n+/* All following numbers of each depth of each common IP class are just\n+ * got from previous large constant table in app/test/test_lpm_routes.h .\n+ * In order to match similar performance, they keep same depth and IP\n+ * address coverage as previous constant table. These numbers don't\n+ * include any private local IP address. As previous large const rule\n+ * table was just dumped from a real router, there are no any IP address\n+ * in class C or D.\n+ */\n+static struct route_rule_count rule_count = {\n+\t.a = { /* IP class A in which the most significant bit is 0 */\n+\t\t    0, /* depth =  1 */\n+\t\t    0, /* depth =  2 */\n+\t\t    1, /* depth =  3 */\n+\t\t    0, /* depth =  4 */\n+\t\t    2, /* depth =  5 */\n+\t\t    1, /* depth =  6 */\n+\t\t    3, /* depth =  7 */\n+\t\t  185, /* depth =  8 */\n+\t\t   26, /* depth =  9 */\n+\t\t   16, /* depth = 10 */\n+\t\t   39, /* depth = 11 */\n+\t\t  144, /* depth = 12 */\n+\t\t  233, /* depth = 13 */\n+\t\t  528, /* depth = 14 */\n+\t\t  866, /* depth = 15 */\n+\t\t 3856, /* depth = 16 */\n+\t\t 3268, /* depth = 17 */\n+\t\t 5662, /* depth = 18 */\n+\t\t17301, /* depth = 19 */\n+\t\t22226, /* depth = 20 */\n+\t\t11147, /* depth = 21 */\n+\t\t16746, /* depth = 22 */\n+\t\t17120, /* depth = 23 */\n+\t\t77578, /* depth = 24 */\n+\t\t  401, /* depth = 25 */\n+\t\t  656, /* depth = 26 */\n+\t\t 1107, /* depth = 27 */\n+\t\t 1121, /* depth = 28 */\n+\t\t 2316, /* depth = 29 */\n+\t\t  717, /* depth = 30 */\n+\t\t   10, /* depth = 31 */\n+\t\t   66  /* depth = 32 */\n+\t},\n+\t.b = { /* IP class A in which the most 2 significant bits are 10 */\n+\t\t    0, /* depth =  1 */\n+\t\t    0, /* depth =  2 */\n+\t\t    0, /* depth =  3 */\n+\t\t    0, /* depth =  4 */\n+\t\t    1, /* depth =  5 */\n+\t\t    1, /* depth =  6 */\n+\t\t    1, /* depth =  7 */\n+\t\t    3, /* depth =  8 */\n+\t\t    3, /* depth =  9 */\n+\t\t   30, /* depth = 10 */\n+\t\t   25, /* depth = 11 */\n+\t\t  168, /* depth = 12 */\n+\t\t  305, /* depth = 13 */\n+\t\t  569, /* depth = 14 */\n+\t\t 1129, /* depth = 15 */\n+\t\t50800, /* depth = 16 */\n+\t\t 1645, /* depth = 17 */\n+\t\t 1820, /* depth = 18 */\n+\t\t 3506, /* depth = 19 */\n+\t\t 3258, /* depth = 20 */\n+\t\t 3424, /* depth = 21 */\n+\t\t 4971, /* depth = 22 */\n+\t\t 6885, /* depth = 23 */\n+\t\t39771, /* depth = 24 */\n+\t\t  424, /* depth = 25 */\n+\t\t  170, /* depth = 26 */\n+\t\t  433, /* depth = 27 */\n+\t\t   92, /* depth = 28 */\n+\t\t  366, /* depth = 29 */\n+\t\t  377, /* depth = 30 */\n+\t\t    2, /* depth = 31 */\n+\t\t  200  /* depth = 32 */\n+\t},\n+\t.c = { /* IP class A in which the most 3 significant bits are 110 */\n+\t\t     0, /* depth =  1 */\n+\t\t     0, /* depth =  2 */\n+\t\t     0, /* depth =  3 */\n+\t\t     0, /* depth =  4 */\n+\t\t     0, /* depth =  5 */\n+\t\t     0, /* depth =  6 */\n+\t\t     0, /* depth =  7 */\n+\t\t    12, /* depth =  8 */\n+\t\t     8, /* depth =  9 */\n+\t\t     9, /* depth = 10 */\n+\t\t    33, /* depth = 11 */\n+\t\t    69, /* depth = 12 */\n+\t\t   237, /* depth = 13 */\n+\t\t  1007, /* depth = 14 */\n+\t\t  1717, /* depth = 15 */\n+\t\t 14663, /* depth = 16 */\n+\t\t  8070, /* depth = 17 */\n+\t\t 16185, /* depth = 18 */\n+\t\t 48261, /* depth = 19 */\n+\t\t 36870, /* depth = 20 */\n+\t\t 33960, /* depth = 21 */\n+\t\t 50638, /* depth = 22 */\n+\t\t 61422, /* depth = 23 */\n+\t\t466549, /* depth = 24 */\n+\t\t  1829, /* depth = 25 */\n+\t\t  4824, /* depth = 26 */\n+\t\t  4927, /* depth = 27 */\n+\t\t  5914, /* depth = 28 */\n+\t\t 10254, /* depth = 29 */\n+\t\t  4905, /* depth = 30 */\n+\t\t     1, /* depth = 31 */\n+\t\t   716  /* depth = 32 */\n+\t}\n+};\n+\n+static void generate_random_rule_prefix(uint32_t ip_class, uint8_t depth)\n+{\n+/* IP address class A, the most significant bit is 0 */\n+#define IP_HEAD_MASK_A\t\t\t0x00000000\n+#define IP_HEAD_BIT_NUM_A\t\t1\n+\n+/* IP address class B, the most significant 2 bits are 10 */\n+#define IP_HEAD_MASK_B\t\t\t0x80000000\n+#define IP_HEAD_BIT_NUM_B\t\t2\n+\n+/* IP address class C, the most significant 3 bits are 110 */\n+#define IP_HEAD_MASK_C\t\t\t0xC0000000\n+#define IP_HEAD_BIT_NUM_C\t\t3\n+\n+\tuint32_t class_depth;\n+\tuint32_t range;\n+\tuint32_t mask;\n+\tuint32_t step;\n+\tuint32_t start;\n+\tuint32_t fixed_bit_num;\n+\tuint32_t ip_head_mask;\n+\tuint32_t rule_num;\n+\tuint32_t k;\n+\tstruct route_rule *ptr_rule;\n+\n+\tif (ip_class == IP_CLASS_A) {        /* IP Address class A */\n+\t\tfixed_bit_num = IP_HEAD_BIT_NUM_A;\n+\t\tip_head_mask = IP_HEAD_MASK_A;\n+\t\trule_num = rule_count.a[depth - 1];\n+\t} else if (ip_class == IP_CLASS_B) { /* IP Address class B */\n+\t\tfixed_bit_num = IP_HEAD_BIT_NUM_B;\n+\t\tip_head_mask = IP_HEAD_MASK_B;\n+\t\trule_num = rule_count.b[depth - 1];\n+\t} else {                             /* IP Address class C */\n+\t\tfixed_bit_num = IP_HEAD_BIT_NUM_C;\n+\t\tip_head_mask = IP_HEAD_MASK_C;\n+\t\trule_num = rule_count.c[depth - 1];\n+\t}\n+\n+\tif (rule_num == 0)\n+\t\treturn;\n+\n+\t/* the number of rest bits which don't include the most significant\n+\t * fixed bits for this IP address class\n+\t */\n+\tclass_depth = depth - fixed_bit_num;\n+\n+\t/* range is the maximum number of rules for this depth and\n+\t * this IP address class\n+\t */\n+\trange = 1 << class_depth;\n+\n+\t/* only mask the most depth significant generated bits\n+\t * except fixed bits for IP address class\n+\t */\n+\tmask = range - 1;\n+\n+\t/* Widen coverage of IP address in generated rules */\n+\tif (range <= rule_num)\n+\t\tstep = 1;\n+\telse\n+\t\tstep = round((double)range / rule_num);\n+\n+\t/* Only generate rest bits except the most significant\n+\t * fixed bits for IP address class\n+\t */\n+\tstart = lrand48() & mask;\n+\tptr_rule = &large_route_table[num_route_entries];\n+\tfor (k = 0; k < rule_num; k++) {\n+\t\tptr_rule->ip = (start << (RTE_FIB_MAX_DEPTH - depth))\n+\t\t\t| ip_head_mask;\n+\t\tptr_rule->depth = depth;\n+\t\tptr_rule++;\n+\t\tstart = (start + step) & mask;\n+\t}\n+\tnum_route_entries += rule_num;\n+}\n+\n+static void insert_rule_in_random_pos(uint32_t ip, uint8_t depth)\n+{\n+\tuint32_t pos;\n+\tint try_count = 0;\n+\tstruct route_rule tmp;\n+\n+\tdo {\n+\t\tpos = lrand48();\n+\t\ttry_count++;\n+\t} while ((try_count < 10) && (pos > num_route_entries));\n+\n+\tif ((pos > num_route_entries) || (pos >= MAX_RULE_NUM))\n+\t\tpos = num_route_entries >> 1;\n+\n+\ttmp = large_route_table[pos];\n+\tlarge_route_table[pos].ip = ip;\n+\tlarge_route_table[pos].depth = depth;\n+\tif (num_route_entries < MAX_RULE_NUM)\n+\t\tlarge_route_table[num_route_entries++] = tmp;\n+}\n+\n+static void generate_large_route_rule_table(void)\n+{\n+\tuint32_t ip_class;\n+\tuint8_t  depth;\n+\n+\tnum_route_entries = 0;\n+\tmemset(large_route_table, 0, sizeof(large_route_table));\n+\n+\tfor (ip_class = IP_CLASS_A; ip_class <= IP_CLASS_C; ip_class++) {\n+\t\tfor (depth = 1; depth <= RTE_FIB_MAX_DEPTH; depth++)\n+\t\t\tgenerate_random_rule_prefix(ip_class, depth);\n+\t}\n+\n+\t/* Add following rules to keep same as previous large constant table,\n+\t * they are 4 rules with private local IP address and 1 all-zeros prefix\n+\t * with depth = 8.\n+\t */\n+\tinsert_rule_in_random_pos(RTE_IPV4(0, 0, 0, 0), 8);\n+\tinsert_rule_in_random_pos(RTE_IPV4(10, 2, 23, 147), 32);\n+\tinsert_rule_in_random_pos(RTE_IPV4(192, 168, 100, 10), 24);\n+\tinsert_rule_in_random_pos(RTE_IPV4(192, 168, 25, 100), 24);\n+\tinsert_rule_in_random_pos(RTE_IPV4(192, 168, 129, 124), 32);\n+}\n+\n+static void\n+print_route_distribution(const struct route_rule *table, uint32_t n)\n+{\n+\tunsigned int i, j;\n+\n+\tprintf(\"Route distribution per prefix width:\\n\");\n+\tprintf(\"DEPTH    QUANTITY (PERCENT)\\n\");\n+\tprintf(\"---------------------------\\n\");\n+\n+\t/* Count depths. */\n+\tfor (i = 1; i <= 32; i++) {\n+\t\tunsigned int depth_counter = 0;\n+\t\tdouble percent_hits;\n+\n+\t\tfor (j = 0; j < n; j++)\n+\t\t\tif (table[j].depth == (uint8_t) i)\n+\t\t\t\tdepth_counter++;\n+\n+\t\tpercent_hits = ((double)depth_counter)/((double)n) * 100;\n+\t\tprintf(\"%.2u%15u (%.2f)\\n\", i, depth_counter, percent_hits);\n+\t}\n+\tprintf(\"\\n\");\n+}\n+\n+static int\n+test_fib_perf(void)\n+{\n+\tstruct rte_fib *fib = NULL;\n+\tstruct rte_fib_conf config;\n+\n+\tconfig.max_routes = 2000000;\n+\tconfig.type = RTE_FIB_DIR24_8;\n+\tconfig.default_nh = 0;\n+\tconfig.dir24_8.nh_sz = RTE_FIB_DIR24_8_4B;\n+\tconfig.dir24_8.num_tbl8 = 65535;\n+\tuint64_t begin, total_time;\n+\tunsigned int i, j;\n+\tuint32_t next_hop_add = 0xAA;\n+\tint status = 0;\n+\tint64_t count = 0;\n+\n+\trte_srand(rte_rdtsc());\n+\n+\tgenerate_large_route_rule_table();\n+\n+\tprintf(\"No. routes = %u\\n\", (unsigned int) NUM_ROUTE_ENTRIES);\n+\n+\tprint_route_distribution(large_route_table,\n+\t\t(uint32_t) NUM_ROUTE_ENTRIES);\n+\n+\tfib = rte_fib_create(__func__, SOCKET_ID_ANY, &config);\n+\tTEST_FIB_ASSERT(fib != NULL);\n+\n+\t/* Measue add. */\n+\tbegin = rte_rdtsc();\n+\n+\tfor (i = 0; i < NUM_ROUTE_ENTRIES; i++) {\n+\t\tif (rte_fib_add(fib, large_route_table[i].ip,\n+\t\t\t\tlarge_route_table[i].depth, next_hop_add) == 0)\n+\t\t\tstatus++;\n+\t}\n+\t/* End Timer. */\n+\ttotal_time = rte_rdtsc() - begin;\n+\n+\tprintf(\"Unique added entries = %d\\n\", status);\n+\n+\tprintf(\"Average FIB Add: %g cycles\\n\",\n+\t\t\t(double)total_time / NUM_ROUTE_ENTRIES);\n+\n+\t/* Measure bulk Lookup */\n+\ttotal_time = 0;\n+\tcount = 0;\n+\tfor (i = 0; i < ITERATIONS; i++) {\n+\t\tstatic uint32_t ip_batch[BATCH_SIZE];\n+\t\tuint64_t next_hops[BULK_SIZE];\n+\n+\t\t/* Create array of random IP addresses */\n+\t\tfor (j = 0; j < BATCH_SIZE; j++)\n+\t\t\tip_batch[j] = rte_rand();\n+\n+\t\t/* Lookup per batch */\n+\t\tbegin = rte_rdtsc();\n+\t\tfor (j = 0; j < BATCH_SIZE; j += BULK_SIZE) {\n+\t\t\tuint32_t k;\n+\t\t\trte_fib_lookup_bulk(fib, &ip_batch[j], next_hops,\n+\t\t\t\tBULK_SIZE);\n+\t\t\tfor (k = 0; k < BULK_SIZE; k++)\n+\t\t\t\tif (unlikely(!(next_hops[k] != 0)))\n+\t\t\t\t\tcount++;\n+\t\t}\n+\n+\t\ttotal_time += rte_rdtsc() - begin;\n+\t}\n+\tprintf(\"BULK FIB Lookup: %.1f cycles (fails = %.1f%%)\\n\",\n+\t\t\t(double)total_time / ((double)ITERATIONS * BATCH_SIZE),\n+\t\t\t(count * 100.0) / (double)(ITERATIONS * BATCH_SIZE));\n+\n+\t/* Delete */\n+\tstatus = 0;\n+\tbegin = rte_rdtsc();\n+\tfor (i = 0; i < NUM_ROUTE_ENTRIES; i++) {\n+\t\t/* rte_lpm_delete(lpm, ip, depth) */\n+\t\tstatus += rte_fib_delete(fib, large_route_table[i].ip,\n+\t\t\t\tlarge_route_table[i].depth);\n+\t}\n+\n+\ttotal_time += rte_rdtsc() - begin;\n+\n+\tprintf(\"Average FIB Delete: %g cycles\\n\",\n+\t\t\t(double)total_time / NUM_ROUTE_ENTRIES);\n+\n+\trte_fib_free(fib);\n+\n+\treturn 0;\n+}\n+\n+REGISTER_TEST_COMMAND(fib_perf_autotest, test_fib_perf);\n",
    "prefixes": [
        "v6",
        "11/12"
    ]
}