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{
    "id": 6166,
    "url": "http://patches.dpdk.org/api/patches/6166/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1436290751-14840-4-git-send-email-liang-min.wang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1436290751-14840-4-git-send-email-liang-min.wang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1436290751-14840-4-git-send-email-liang-min.wang@intel.com",
    "date": "2015-07-07T17:39:10",
    "name": "[dpdk-dev,v12,3/4] igb: add ops to support ethtool ops",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "3ec8dc70cb6b722619d3982c7d8416ebfc34d6dd",
    "submitter": {
        "id": 250,
        "url": "http://patches.dpdk.org/api/people/250/?format=api",
        "name": "Liang-Min Larry Wang",
        "email": "liang-min.wang@intel.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1436290751-14840-4-git-send-email-liang-min.wang@intel.com/mbox/",
    "series": [],
    "comments": "http://patches.dpdk.org/api/patches/6166/comments/",
    "check": "pending",
    "checks": "http://patches.dpdk.org/api/patches/6166/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id B74AA5A64;\n\tTue,  7 Jul 2015 19:39:31 +0200 (CEST)",
            "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby dpdk.org (Postfix) with ESMTP id 5DD265A51\n\tfor <dev@dpdk.org>; Tue,  7 Jul 2015 19:39:29 +0200 (CEST)",
            "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby orsmga103.jf.intel.com with ESMTP; 07 Jul 2015 10:39:26 -0700",
            "from lwang14-mobl6.amr.corp.intel.com ([10.127.184.101])\n\tby fmsmga001.fm.intel.com with ESMTP; 07 Jul 2015 10:39:26 -0700"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.15,425,1432623600\"; d=\"scan'208\";a=\"742329521\"",
        "From": "Liang-Min Larry Wang <liang-min.wang@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Tue,  7 Jul 2015 13:39:10 -0400",
        "Message-Id": "<1436290751-14840-4-git-send-email-liang-min.wang@intel.com>",
        "X-Mailer": "git-send-email 2.1.4",
        "In-Reply-To": "<1436290751-14840-1-git-send-email-liang-min.wang@intel.com>",
        "References": "<1432946276-9424-1-git-send-email-liang-min.wang@intel.com>\n\t<1436290751-14840-1-git-send-email-liang-min.wang@intel.com>",
        "Cc": "Liang-Min Larry Wang <liang-min.wang@intel.com>, shemming@brocade.com",
        "Subject": "[dpdk-dev] [PATCH v12 3/4] igb: add ops to support ethtool ops",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "add function to support ethtool ops:\n- set_mac_addr\n- get_reg_length\n- get_regs\n- get_eeprom_length\n- get_eeprom\n- set_eeprom\n\nSigned-off-by: Liang-Min Larry Wang <liang-min.wang@intel.com>\n---\n drivers/net/e1000/igb_ethdev.c | 175 ++++++++++++++++++++++++++++++++\n drivers/net/e1000/igb_regs.h   | 223 +++++++++++++++++++++++++++++++++++++++++\n 2 files changed, 398 insertions(+)\n create mode 100644 drivers/net/e1000/igb_regs.h",
    "diff": "diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c\nindex 24c7510..c422b2d 100644\n--- a/drivers/net/e1000/igb_ethdev.c\n+++ b/drivers/net/e1000/igb_ethdev.c\n@@ -55,6 +55,7 @@\n #include \"e1000_logs.h\"\n #include \"base/e1000_api.h\"\n #include \"e1000_ethdev.h\"\n+#include \"igb_regs.h\"\n \n /*\n  * Default values for port configuration\n@@ -129,6 +130,8 @@ static void eth_igb_rar_set(struct rte_eth_dev *dev,\n \t\tstruct ether_addr *mac_addr,\n \t\tuint32_t index, uint32_t pool);\n static void eth_igb_rar_clear(struct rte_eth_dev *dev, uint32_t index);\n+static void eth_igb_default_mac_addr_set(struct rte_eth_dev *dev,\n+\t\tstruct ether_addr *addr);\n \n static void igbvf_intr_disable(struct e1000_hw *hw);\n static int igbvf_dev_configure(struct rte_eth_dev *dev);\n@@ -142,6 +145,12 @@ static int igbvf_vlan_filter_set(struct rte_eth_dev *dev,\n \t\tuint16_t vlan_id, int on);\n static int igbvf_set_vfta(struct e1000_hw *hw, uint16_t vid, bool on);\n static void igbvf_set_vfta_all(struct rte_eth_dev *dev, bool on);\n+static void igbvf_default_mac_addr_set(struct rte_eth_dev *dev,\n+\t\tstruct ether_addr *addr);\n+static int igbvf_get_reg_length(struct rte_eth_dev *dev);\n+static int igbvf_get_regs(struct rte_eth_dev *dev,\n+\t\tstruct rte_dev_reg_info *regs);\n+\n static int eth_igb_rss_reta_update(struct rte_eth_dev *dev,\n \t\t\t\t   struct rte_eth_rss_reta_entry64 *reta_conf,\n \t\t\t\t   uint16_t reta_size);\n@@ -193,6 +202,14 @@ static int eth_igb_filter_ctrl(struct rte_eth_dev *dev,\n \t\t     enum rte_filter_type filter_type,\n \t\t     enum rte_filter_op filter_op,\n \t\t     void *arg);\n+static int eth_igb_get_reg_length(struct rte_eth_dev *dev);\n+static int eth_igb_get_regs(struct rte_eth_dev *dev,\n+\t\tstruct rte_dev_reg_info *regs);\n+static int eth_igb_get_eeprom_length(struct rte_eth_dev *dev);\n+static int eth_igb_get_eeprom(struct rte_eth_dev *dev,\n+\t\tstruct rte_dev_eeprom_info *eeprom);\n+static int eth_igb_set_eeprom(struct rte_eth_dev *dev,\n+\t\tstruct rte_dev_eeprom_info *eeprom);\n \n static int eth_igb_set_mc_addr_list(struct rte_eth_dev *dev,\n \t\t\t\t    struct ether_addr *mc_addr_set,\n@@ -268,12 +285,18 @@ static const struct eth_dev_ops eth_igb_ops = {\n \t.flow_ctrl_set        = eth_igb_flow_ctrl_set,\n \t.mac_addr_add         = eth_igb_rar_set,\n \t.mac_addr_remove      = eth_igb_rar_clear,\n+\t.mac_addr_set         = eth_igb_default_mac_addr_set,\n \t.reta_update          = eth_igb_rss_reta_update,\n \t.reta_query           = eth_igb_rss_reta_query,\n \t.rss_hash_update      = eth_igb_rss_hash_update,\n \t.rss_hash_conf_get    = eth_igb_rss_hash_conf_get,\n \t.filter_ctrl          = eth_igb_filter_ctrl,\n \t.set_mc_addr_list     = eth_igb_set_mc_addr_list,\n+\t.get_reg_length       = eth_igb_get_reg_length,\n+\t.get_reg              = eth_igb_get_regs,\n+\t.get_eeprom_length    = eth_igb_get_eeprom_length,\n+\t.get_eeprom           = eth_igb_get_eeprom,\n+\t.set_eeprom           = eth_igb_set_eeprom,\n };\n \n /*\n@@ -295,6 +318,9 @@ static const struct eth_dev_ops igbvf_eth_dev_ops = {\n \t.tx_queue_setup       = eth_igb_tx_queue_setup,\n \t.tx_queue_release     = eth_igb_tx_queue_release,\n \t.set_mc_addr_list     = eth_igb_set_mc_addr_list,\n+\t.mac_addr_set         = igbvf_default_mac_addr_set,\n+\t.get_reg_length       = igbvf_get_reg_length,\n+\t.get_reg              = igbvf_get_regs,\n };\n \n /**\n@@ -2113,6 +2139,14 @@ eth_igb_rar_clear(struct rte_eth_dev *dev, uint32_t index)\n \te1000_rar_set(hw, addr, index);\n }\n \n+static void\n+eth_igb_default_mac_addr_set(struct rte_eth_dev *dev,\n+\t\t\t\tstruct ether_addr *addr)\n+{\n+\teth_igb_rar_clear(dev, 0);\n+\n+\teth_igb_rar_set(dev, (void *)addr, 0, 0);\n+}\n /*\n  * Virtual Function operations\n  */\n@@ -2347,6 +2381,17 @@ igbvf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)\n \treturn 0;\n }\n \n+static void\n+igbvf_default_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *addr)\n+{\n+\tstruct e1000_hw *hw =\n+\t\tE1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\n+\t/* index is not used by rar_set() */\n+\thw->mac.ops.rar_set(hw, (void *)addr, 0);\n+}\n+\n+\n static int\n eth_igb_rss_reta_update(struct rte_eth_dev *dev,\n \t\t\tstruct rte_eth_rss_reta_entry64 *reta_conf,\n@@ -3660,6 +3705,136 @@ eth_igb_set_mc_addr_list(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n+static int\n+eth_igb_get_reg_length(struct rte_eth_dev *dev __rte_unused)\n+{\n+\tint count = 0;\n+\tint g_ind = 0;\n+\tconst struct reg_info *reg_group;\n+\n+\twhile ((reg_group = igb_regs[g_ind++]))\n+\t\tcount += igb_reg_group_count(reg_group);\n+\n+\treturn count;\n+}\n+\n+static int\n+igbvf_get_reg_length(struct rte_eth_dev *dev __rte_unused)\n+{\n+\tint count = 0;\n+\tint g_ind = 0;\n+\tconst struct reg_info *reg_group;\n+\n+\twhile ((reg_group = igbvf_regs[g_ind++]))\n+\t\tcount += igb_reg_group_count(reg_group);\n+\n+\treturn count;\n+}\n+\n+static int\n+eth_igb_get_regs(struct rte_eth_dev *dev,\n+\tstruct rte_dev_reg_info *regs)\n+{\n+\tstruct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tuint32_t *regs_buff = regs->buf;\n+\tint g_ind = 0;\n+\tint count = 0;\n+\tconst struct reg_info *reg_group;\n+\n+\t/* Support only full register dump */\n+\tif ((regs->leng == 0) ||\n+\t    (regs->leng == (uint32_t)eth_igb_get_reg_length(dev))) {\n+\t\tregs->version = hw->mac.type << 24 | hw->revision_id << 16 |\n+\t\t\thw->device_id;\n+\t\twhile ((reg_group = igb_regs[g_ind++]))\n+\t\t\tcount += igb_read_regs_group(dev, &regs_buff[count],\n+\t\t\t\t\t\t\treg_group);\n+\t\treturn 0;\n+\t}\n+\n+\treturn -ENOTSUP;\n+}\n+\n+static int\n+igbvf_get_regs(struct rte_eth_dev *dev,\n+\tstruct rte_dev_reg_info *regs)\n+{\n+\tstruct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tuint32_t *regs_buff = regs->buf;\n+\tint g_ind = 0;\n+\tint count = 0;\n+\tconst struct reg_info *reg_group;\n+\n+\t/* Support only full register dump */\n+\tif ((regs->leng == 0) ||\n+\t    (regs->leng == (uint32_t)igbvf_get_reg_length(dev))) {\n+\t\tregs->version = hw->mac.type << 24 | hw->revision_id << 16 |\n+\t\t\thw->device_id;\n+\t\twhile ((reg_group = igbvf_regs[g_ind++]))\n+\t\t\tcount += igb_read_regs_group(dev, &regs_buff[count],\n+\t\t\t\t\t\t\treg_group);\n+\t\treturn 0;\n+\t}\n+\n+\treturn -ENOTSUP;\n+}\n+\n+static int\n+eth_igb_get_eeprom_length(struct rte_eth_dev *dev)\n+{\n+\tstruct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\n+\t/* Return unit is byte count */\n+\treturn hw->nvm.word_size * 2;\n+}\n+\n+static int\n+eth_igb_get_eeprom(struct rte_eth_dev *dev,\n+\tstruct rte_dev_eeprom_info *in_eeprom)\n+{\n+\tstruct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct e1000_nvm_info *nvm = &hw->nvm;\n+\tuint16_t *data = in_eeprom->buf;\n+\tint first, leng;\n+\n+\tfirst = in_eeprom->offset >> 1;\n+\tleng = in_eeprom->leng >> 1;\n+\tif ((first >= hw->nvm.word_size) ||\n+\t    ((first + leng) >= hw->nvm.word_size))\n+\t\treturn -EINVAL;\n+\n+\tin_eeprom->magic = hw->vendor_id |\n+\t\t((uint32_t)hw->device_id << 16);\n+\n+\tif ((nvm->ops.read) == NULL)\n+\t\treturn -ENOTSUP;\n+\n+\treturn nvm->ops.read(hw, first, leng, data);\n+}\n+\n+static int\n+eth_igb_set_eeprom(struct rte_eth_dev *dev,\n+\tstruct rte_dev_eeprom_info *in_eeprom)\n+{\n+\tstruct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct e1000_nvm_info *nvm = &hw->nvm;\n+\tuint16_t *data = in_eeprom->buf;\n+\tint first, leng;\n+\n+\tfirst = in_eeprom->offset >> 1;\n+\tleng = in_eeprom->leng >> 1;\n+\tif ((first >= hw->nvm.word_size) ||\n+\t    ((first + leng) >= hw->nvm.word_size))\n+\t\treturn -EINVAL;\n+\n+\tin_eeprom->magic = (uint32_t)hw->vendor_id |\n+\t\t((uint32_t)hw->device_id << 16);\n+\n+\tif ((nvm->ops.write) == NULL)\n+\t\treturn -ENOTSUP;\n+\treturn nvm->ops.write(hw,  first, leng, data);\n+}\n+\n static struct rte_driver pmd_igb_drv = {\n \t.type = PMD_PDEV,\n \t.init = rte_igb_pmd_init,\ndiff --git a/drivers/net/e1000/igb_regs.h b/drivers/net/e1000/igb_regs.h\nnew file mode 100644\nindex 0000000..0b5e5e5\n--- /dev/null\n+++ b/drivers/net/e1000/igb_regs.h\n@@ -0,0 +1,223 @@\n+/*-\n+ *   BSD LICENSE\n+ *\n+ *   Copyright(c) 2015 Intel Corporation. All rights reserved.\n+ *   All rights reserved.\n+ *\n+ *   Redistribution and use in source and binary forms, with or without\n+ *   modification, are permitted provided that the following conditions\n+ *   are met:\n+ *\n+ *     * Redistributions of source code must retain the above copyright\n+ *       notice, this list of conditions and the following disclaimer.\n+ *     * Redistributions in binary form must reproduce the above copyright\n+ *       notice, this list of conditions and the following disclaimer in\n+ *       the documentation and/or other materials provided with the\n+ *       distribution.\n+ *     * Neither the name of Intel Corporation nor the names of its\n+ *       contributors may be used to endorse or promote products derived\n+ *       from this software without specific prior written permission.\n+ *\n+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ *   \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+#ifndef _IGB_REGS_H_\n+#define _IGB_REGS_H_\n+\n+#include \"e1000_ethdev.h\"\n+\n+struct reg_info {\n+\tuint32_t base_addr;\n+\tuint32_t count;\n+\tuint32_t stride;\n+\tconst char *name;\n+};\n+\n+static const struct reg_info igb_regs_general[] = {\n+\t{E1000_CTRL, 1, 1, \"E1000_CTRL\"},\n+\t{E1000_STATUS, 1, 1, \"E1000_STATUS\"},\n+\t{E1000_CTRL_EXT, 1, 1, \"E1000_CTRL_EXT\"},\n+\t{E1000_MDIC, 1, 1, \"E1000_MDIC\"},\n+\t{E1000_SCTL, 1, 1, \"E1000_SCTL\"},\n+\t{E1000_CONNSW, 1, 1, \"E1000_CONNSW\"},\n+\t{E1000_VET, 1, 1, \"E1000_VET\"},\n+\t{E1000_LEDCTL, 1, 1, \"E1000_LEDCTL\"},\n+\t{E1000_PBA, 1, 1, \"E1000_PBA\"},\n+\t{E1000_PBS, 1, 1, \"E1000_PBS\"},\n+\t{E1000_FRTIMER, 1, 1, \"E1000_FRTIMER\"},\n+\t{E1000_TCPTIMER, 1, 1, \"E1000_TCPTIMER\"},\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info igb_regs_nvm[] = {\n+\t{E1000_EECD, 1, 1, \"E1000_EECD\"},\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info igb_regs_interrupt[] = {\n+\t{E1000_EICS, 1, 1, \"E1000_EICS\"},\n+\t{E1000_EIMS, 1, 1, \"E1000_EIMS\"},\n+\t{E1000_EIMC, 1, 1, \"E1000_EIMC\"},\n+\t{E1000_EIAC, 1, 1, \"E1000_EIAC\"},\n+\t{E1000_EIAM, 1, 1, \"E1000_EIAM\"},\n+\t{E1000_ICS, 1, 1, \"E1000_ICS\"},\n+\t{E1000_IMS, 1, 1, \"E1000_IMS\"},\n+\t{E1000_IMC, 1, 1, \"E1000_IMC\"},\n+\t{E1000_IAC, 1, 1, \"E1000_IAC\"},\n+\t{E1000_IAM,  1, 1, \"E1000_IAM\"},\n+\t{E1000_IMIRVP, 1, 1, \"E1000_IMIRVP\"},\n+\t{E1000_EITR(0), 10, 4, \"E1000_EITR\"},\n+\t{E1000_IMIR(0), 8, 4, \"E1000_IMIR\"},\n+\t{E1000_IMIREXT(0), 8, 4, \"E1000_IMIREXT\"},\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info igb_regs_fctl[] = {\n+\t{E1000_FCAL, 1, 1, \"E1000_FCAL\"},\n+\t{E1000_FCAH, 1, 1, \"E1000_FCAH\"},\n+\t{E1000_FCTTV, 1, 1, \"E1000_FCTTV\"},\n+\t{E1000_FCRTL, 1, 1, \"E1000_FCRTL\"},\n+\t{E1000_FCRTH, 1, 1, \"E1000_FCRTH\"},\n+\t{E1000_FCRTV, 1, 1, \"E1000_FCRTV\"},\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info igb_regs_rxdma[] = {\n+\t{E1000_RDBAL(0), 4, 0x100, \"E1000_RDBAL\"},\n+\t{E1000_RDBAH(0), 4, 0x100, \"E1000_RDBAH\"},\n+\t{E1000_RDLEN(0), 4, 0x100, \"E1000_RDLEN\"},\n+\t{E1000_RDH(0), 4, 0x100, \"E1000_RDH\"},\n+\t{E1000_RDT(0), 4, 0x100, \"E1000_RDT\"},\n+\t{E1000_RXCTL(0), 4, 0x100, \"E1000_RXCTL\"},\n+\t{E1000_SRRCTL(0), 4, 0x100, \"E1000_SRRCTL\"},\n+\t{E1000_DCA_RXCTRL(0), 4, 0x100, \"E1000_DCA_RXCTRL\"},\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info igb_regs_rx[] = {\n+\t{E1000_RCTL, 1, 1, \"E1000_RCTL\"},\n+\t{E1000_RXCSUM, 1, 1, \"E1000_RXCSUM\"},\n+\t{E1000_RLPML, 1, 1, \"E1000_RLPML\"},\n+\t{E1000_RFCTL, 1, 1, \"E1000_RFCTL\"},\n+\t{E1000_MRQC, 1, 1, \"E1000_MRQC\"},\n+\t{E1000_VT_CTL, 1, 1, \"E1000_VT_CTL\"},\n+\t{E1000_RAL(0), 16, 8, \"E1000_RAL\"},\n+\t{E1000_RAH(0), 16, 8, \"E1000_RAH\"},\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info igb_regs_tx[] = {\n+\t{E1000_TCTL, 1, 1, \"E1000_TCTL\"},\n+\t{E1000_TCTL_EXT, 1, 1, \"E1000_TCTL_EXT\"},\n+\t{E1000_TIPG, 1, 1, \"E1000_TIPG\"},\n+\t{E1000_DTXCTL, 1, 1, \"E1000_DTXCTL\"},\n+\t{E1000_TDBAL(0), 4, 0x100, \"E1000_TDBAL\"},\n+\t{E1000_TDBAH(0), 4, 0x100, \"E1000_TDBAH\"},\n+\t{E1000_TDLEN(0), 4, 0x100, \"E1000_TDLEN\"},\n+\t{E1000_TDH(0), 4, 0x100, \"E1000_TDLEN\"},\n+\t{E1000_TDT(0), 4, 0x100, \"E1000_TDT\"},\n+\t{E1000_TXDCTL(0), 4, 0x100, \"E1000_TXDCTL\"},\n+\t{E1000_TDWBAL(0), 4, 0x100, \"E1000_TDWBAL\"},\n+\t{E1000_TDWBAH(0), 4, 0x100, \"E1000_TDWBAH\"},\n+\t{E1000_DCA_TXCTRL(0), 4, 0x100, \"E1000_DCA_TXCTRL\"},\n+\t{E1000_TDFH, 1, 1, \"E1000_TDFH\"},\n+\t{E1000_TDFT, 1, 1, \"E1000_TDFT\"},\n+\t{E1000_TDFHS, 1, 1, \"E1000_TDFHS\"},\n+\t{E1000_TDFPC, 1, 1, \"E1000_TDFPC\"},\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info igb_regs_wakeup[] = {\n+\t{E1000_WUC, 1, 1, \"E1000_WUC\"},\n+\t{E1000_WUFC, 1, 1, \"E1000_WUFC\"},\n+\t{E1000_WUS, 1, 1, \"E1000_WUS\"},\n+\t{E1000_IPAV, 1, 1, \"E1000_IPAV\"},\n+\t{E1000_WUPL, 1, 1, \"E1000_WUPL\"},\n+\t{E1000_IP4AT_REG(0), 4, 8, \"E1000_IP4AT_REG\"},\n+\t{E1000_IP6AT_REG(0), 4, 4, \"E1000_IP6AT_REG\"},\n+\t{E1000_WUPM_REG(0), 4, 4, \"E1000_WUPM_REG\"},\n+\t{E1000_FFMT_REG(0), 4, 8, \"E1000_FFMT_REG\"},\n+\t{E1000_FFVT_REG(0), 4, 8, \"E1000_FFVT_REG\"},\n+\t{E1000_FFLT_REG(0), 4, 8, \"E1000_FFLT_REG\"},\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info igb_regs_mac[] = {\n+\t{E1000_PCS_CFG0, 1, 1, \"E1000_PCS_CFG0\"},\n+\t{E1000_PCS_LCTL, 1, 1, \"E1000_PCS_LCTL\"},\n+\t{E1000_PCS_LSTAT, 1, 1, \"E1000_PCS_LSTAT\"},\n+\t{E1000_PCS_ANADV, 1, 1, \"E1000_PCS_ANADV\"},\n+\t{E1000_PCS_LPAB, 1, 1, \"E1000_PCS_LPAB\"},\n+\t{E1000_PCS_NPTX, 1, 1, \"E1000_PCS_NPTX\"},\n+\t{E1000_PCS_LPABNP, 1, 1, \"E1000_PCS_LPABNP\"},\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info *igb_regs[] = {\n+\t\t\t\tigb_regs_general,\n+\t\t\t\tigb_regs_nvm,\n+\t\t\t\tigb_regs_interrupt,\n+\t\t\t\tigb_regs_fctl,\n+\t\t\t\tigb_regs_rxdma,\n+\t\t\t\tigb_regs_rx,\n+\t\t\t\tigb_regs_tx,\n+\t\t\t\tigb_regs_wakeup,\n+\t\t\t\tigb_regs_mac,\n+\t\t\t\tNULL};\n+\n+/* FIXME: reading igb_regs_interrupt results side-effect which doesn't\n+ * work with VFIO; re-install igb_regs_interrupt once issue is resolved.\n+ */\n+static const struct reg_info *igbvf_regs[] = {\n+\t\t\t\tigb_regs_general,\n+\t\t\t\tigb_regs_rxdma,\n+\t\t\t\tigb_regs_tx,\n+\t\t\t\tNULL};\n+\n+static inline int\n+igb_read_regs(struct e1000_hw *hw, const struct reg_info *reg,\n+\tuint32_t *reg_buf)\n+{\n+\tunsigned int i;\n+\n+\tfor (i = 0; i < reg->count; i++) {\n+\t\treg_buf[i] = E1000_READ_REG(hw,\n+\t\t\t\treg->base_addr + i * reg->stride);\n+\t}\n+\treturn reg->count;\n+};\n+\n+static inline int\n+igb_reg_group_count(const struct reg_info *regs)\n+{\n+\tint count = 0;\n+\tint i = 0;\n+\n+\twhile (regs[i].count)\n+\t\tcount += regs[i++].count;\n+\treturn count;\n+};\n+\n+static inline int\n+igb_read_regs_group(struct rte_eth_dev *dev, uint32_t *reg_buf,\n+\t\tconst struct reg_info *regs)\n+{\n+\tint count = 0;\n+\tint i = 0;\n+\tstruct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\n+\twhile (regs[i].count)\n+\t\tcount += igb_read_regs(hw, &regs[i++], &reg_buf[count]);\n+\treturn count;\n+};\n+\n+#endif /* _IGB_REGS_H_ */\n",
    "prefixes": [
        "dpdk-dev",
        "v12",
        "3/4"
    ]
}