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GET /api/patches/61245/?format=api
{ "id": 61245, "url": "http://patches.dpdk.org/api/patches/61245/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1571130263-120863-13-git-send-email-orika@mellanox.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1571130263-120863-13-git-send-email-orika@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1571130263-120863-13-git-send-email-orika@mellanox.com", "date": "2019-10-15T09:04:20", "name": "[v3,12/14] net/mlx5: add default flows for hairpin", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "b033e4ef1337e45887d1a0dd44e3c4eaf1ffd933", "submitter": { "id": 795, "url": "http://patches.dpdk.org/api/people/795/?format=api", "name": "Ori Kam", "email": "orika@mellanox.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1571130263-120863-13-git-send-email-orika@mellanox.com/mbox/", "series": [ { "id": 6855, "url": "http://patches.dpdk.org/api/series/6855/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=6855", "date": "2019-10-15T09:04:08", "name": "add hairpin feature", "version": 3, "mbox": "http://patches.dpdk.org/series/6855/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/61245/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/61245/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9C9C81EA8E;\n\tTue, 15 Oct 2019 11:07:07 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n\tby dpdk.org (Postfix) with ESMTP id 25E521E89A\n\tfor <dev@dpdk.org>; Tue, 15 Oct 2019 11:07:06 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n\torika@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 15 Oct 2019 11:07:04 +0200", "from pegasus04.mtr.labs.mlnx. (pegasus04.mtr.labs.mlnx\n\t[10.210.16.126])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x9F94hcn029891;\n\tTue, 15 Oct 2019 12:07:04 +0300" ], "From": "Ori Kam <orika@mellanox.com>", "To": "Matan Azrad <matan@mellanox.com>, Shahaf Shuler <shahafs@mellanox.com>, \n\tViacheslav Ovsiienko <viacheslavo@mellanox.com>", "Cc": "dev@dpdk.org, orika@mellanox.com, jingjing.wu@intel.com,\n\tstephen@networkplumber.org", "Date": "Tue, 15 Oct 2019 09:04:20 +0000", "Message-Id": "<1571130263-120863-13-git-send-email-orika@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1571130263-120863-1-git-send-email-orika@mellanox.com>", "References": "<1569479349-36962-1-git-send-email-orika@mellanox.com>\n\t<1571130263-120863-1-git-send-email-orika@mellanox.com>", "Subject": "[dpdk-dev] [PATCH v3 12/14] net/mlx5: add default flows for hairpin", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "When using hairpin all traffic from TX hairpin queues should jump\nto dedecated table where matching can be done using regesters.\n\nSigned-off-by: Ori Kam <orika@mellanox.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\n\n---\n drivers/net/mlx5/mlx5.h | 2 ++\n drivers/net/mlx5/mlx5_flow.c | 60 +++++++++++++++++++++++++++++++++++++++\n drivers/net/mlx5/mlx5_flow.h | 9 ++++++\n drivers/net/mlx5/mlx5_flow_dv.c | 63 +++++++++++++++++++++++++++++++++++++++--\n drivers/net/mlx5/mlx5_trigger.c | 18 ++++++++++++\n 5 files changed, 150 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 391ae2c..8e86bcf 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -556,6 +556,7 @@ struct mlx5_flow_tbl_resource {\n };\n \n #define MLX5_MAX_TABLES UINT16_MAX\n+#define MLX5_HAIRPIN_TX_TABLE (UINT16_MAX - 1)\n #define MLX5_MAX_TABLES_FDB UINT16_MAX\n \n #define MLX5_DBR_PAGE_SIZE 4096 /* Must be >= 512. */\n@@ -876,6 +877,7 @@ int mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,\n int mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list);\n void mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list);\n int mlx5_flow_verify(struct rte_eth_dev *dev);\n+int mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev, uint32_t queue);\n int mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,\n \t\t\tstruct rte_flow_item_eth *eth_spec,\n \t\t\tstruct rte_flow_item_eth *eth_mask,\ndiff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c\nindex b4bcd1a..b6dc105 100644\n--- a/drivers/net/mlx5/mlx5_flow.c\n+++ b/drivers/net/mlx5/mlx5_flow.c\n@@ -2731,6 +2731,66 @@ struct rte_flow *\n }\n \n /**\n+ * Enable default hairpin egress flow.\n+ *\n+ * @param dev\n+ * Pointer to Ethernet device.\n+ * @param queue\n+ * The queue index.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+int\n+mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,\n+\t\t\t uint32_t queue)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tconst struct rte_flow_attr attr = {\n+\t\t.egress = 1,\n+\t\t.priority = 0,\n+\t};\n+\tstruct mlx5_rte_flow_item_tx_queue queue_spec = {\n+\t\t.queue = queue,\n+\t};\n+\tstruct mlx5_rte_flow_item_tx_queue queue_mask = {\n+\t\t.queue = UINT32_MAX,\n+\t};\n+\tstruct rte_flow_item items[] = {\n+\t\t{\n+\t\t\t.type = MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,\n+\t\t\t.spec = &queue_spec,\n+\t\t\t.last = NULL,\n+\t\t\t.mask = &queue_mask,\n+\t\t},\n+\t\t{\n+\t\t\t.type = RTE_FLOW_ITEM_TYPE_END,\n+\t\t},\n+\t};\n+\tstruct rte_flow_action_jump jump = {\n+\t\t.group = MLX5_HAIRPIN_TX_TABLE,\n+\t};\n+\tstruct rte_flow_action actions[2];\n+\tstruct rte_flow *flow;\n+\tstruct rte_flow_error error;\n+\n+\tactions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;\n+\tactions[0].conf = &jump;\n+\tactions[1].type = RTE_FLOW_ACTION_TYPE_END;\n+\tflow = flow_list_create(dev, &priv->ctrl_flows,\n+\t\t\t\t&attr, items, actions, false, &error);\n+\tif (!flow) {\n+\t\tDRV_LOG(DEBUG,\n+\t\t\t\"Failed to create ctrl flow: rte_errno(%d),\"\n+\t\t\t\" type(%d), message(%s)\\n\",\n+\t\t\trte_errno, error.type,\n+\t\t\terror.message ? error.message : \" (no stated reason)\");\n+\t\treturn -rte_errno;\n+\t}\n+\treturn 0;\n+}\n+\n+/**\n * Enable a control flow configured from the control plane.\n *\n * @param dev\ndiff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex 1b14fb7..bb67380 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -44,6 +44,7 @@ enum modify_reg {\n enum mlx5_rte_flow_item_type {\n \tMLX5_RTE_FLOW_ITEM_TYPE_END = INT_MIN,\n \tMLX5_RTE_FLOW_ITEM_TYPE_TAG,\n+\tMLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,\n };\n \n /* Private rte flow actions. */\n@@ -64,6 +65,11 @@ struct mlx5_rte_flow_action_set_tag {\n \trte_be32_t data;\n };\n \n+/* Matches on source queue. */\n+struct mlx5_rte_flow_item_tx_queue {\n+\tuint32_t queue;\n+};\n+\n /* Pattern outer Layer bits. */\n #define MLX5_FLOW_LAYER_OUTER_L2 (1u << 0)\n #define MLX5_FLOW_LAYER_OUTER_L3_IPV4 (1u << 1)\n@@ -102,6 +108,9 @@ struct mlx5_rte_flow_action_set_tag {\n #define MLX5_FLOW_LAYER_IPV6_ENCAP (1u << 23)\n #define MLX5_FLOW_LAYER_NVGRE (1u << 24)\n \n+/* Queue items. */\n+#define MLX5_FLOW_ITEM_TX_QUEUE (1u << 25)\n+\n /* Outer Masks. */\n #define MLX5_FLOW_LAYER_OUTER_L3 \\\n \t(MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_OUTER_L3_IPV6)\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex dde6673..c7a3f6b 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -3357,7 +3357,9 @@ struct field_modify_info modify_tcp[] = {\n \t\treturn ret;\n \tfor (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {\n \t\tint tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);\n-\t\tswitch (items->type) {\n+\t\tint type = items->type;\n+\n+\t\tswitch (type) {\n \t\tcase RTE_FLOW_ITEM_TYPE_VOID:\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ITEM_TYPE_PORT_ID:\n@@ -3518,6 +3520,9 @@ struct field_modify_info modify_tcp[] = {\n \t\t\t\treturn ret;\n \t\t\tlast_item = MLX5_FLOW_LAYER_ICMP6;\n \t\t\tbreak;\n+\t\tcase MLX5_RTE_FLOW_ITEM_TYPE_TAG:\n+\t\tcase MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:\n+\t\t\tbreak;\n \t\tdefault:\n \t\t\treturn rte_flow_error_set(error, ENOTSUP,\n \t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n@@ -3526,11 +3531,12 @@ struct field_modify_info modify_tcp[] = {\n \t\titem_flags |= last_item;\n \t}\n \tfor (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {\n+\t\tint type = actions->type;\n \t\tif (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)\n \t\t\treturn rte_flow_error_set(error, ENOTSUP,\n \t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ACTION,\n \t\t\t\t\t\t actions, \"too many actions\");\n-\t\tswitch (actions->type) {\n+\t\tswitch (type) {\n \t\tcase RTE_FLOW_ACTION_TYPE_VOID:\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_PORT_ID:\n@@ -3796,6 +3802,8 @@ struct field_modify_info modify_tcp[] = {\n \t\t\t\t\t\tMLX5_FLOW_ACTION_INC_TCP_ACK :\n \t\t\t\t\t\tMLX5_FLOW_ACTION_DEC_TCP_ACK;\n \t\t\tbreak;\n+\t\tcase MLX5_RTE_FLOW_ACTION_TYPE_TAG:\n+\t\t\tbreak;\n \t\tdefault:\n \t\t\treturn rte_flow_error_set(error, ENOTSUP,\n \t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ACTION,\n@@ -5291,6 +5299,51 @@ struct field_modify_info modify_tcp[] = {\n }\n \n /**\n+ * Add Tx queue matcher\n+ *\n+ * @param[in] dev\n+ * Pointer to the dev struct.\n+ * @param[in, out] matcher\n+ * Flow matcher.\n+ * @param[in, out] key\n+ * Flow matcher value.\n+ * @param[in] item\n+ * Flow pattern to translate.\n+ * @param[in] inner\n+ * Item is inner pattern.\n+ */\n+static void\n+flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,\n+\t\t\t\tvoid *matcher, void *key,\n+\t\t\t\tconst struct rte_flow_item *item)\n+{\n+\tconst struct mlx5_rte_flow_item_tx_queue *queue_m;\n+\tconst struct mlx5_rte_flow_item_tx_queue *queue_v;\n+\tvoid *misc_m =\n+\t\tMLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);\n+\tvoid *misc_v =\n+\t\tMLX5_ADDR_OF(fte_match_param, key, misc_parameters);\n+\tstruct mlx5_txq_ctrl *txq;\n+\tuint32_t queue;\n+\n+\n+\tqueue_m = (const void *)item->mask;\n+\tif (!queue_m)\n+\t\treturn;\n+\tqueue_v = (const void *)item->spec;\n+\tif (!queue_v)\n+\t\treturn;\n+\ttxq = mlx5_txq_get(dev, queue_v->queue);\n+\tif (!txq)\n+\t\treturn;\n+\tqueue = txq->obj->sq->id;\n+\tMLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);\n+\tMLX5_SET(fte_match_set_misc, misc_v, source_sqn,\n+\t\t queue & queue_m->queue);\n+\tmlx5_txq_release(dev, queue_v->queue);\n+}\n+\n+/**\n * Fill the flow with DV spec.\n *\n * @param[in] dev\n@@ -5866,6 +5919,12 @@ struct field_modify_info modify_tcp[] = {\n \t\t\t\t\t\t items);\n \t\t\tlast_item = MLX5_FLOW_ITEM_TAG;\n \t\t\tbreak;\n+\t\tcase MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:\n+\t\t\tflow_dv_translate_item_tx_queue(dev, match_mask,\n+\t\t\t\t\t\t\tmatch_value,\n+\t\t\t\t\t\t\titems);\n+\t\t\tlast_item = MLX5_FLOW_ITEM_TX_QUEUE;\n+\t\t\tbreak;\n \t\tdefault:\n \t\t\tbreak;\n \t\t}\ndiff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c\nindex f66b6ee..cafab25 100644\n--- a/drivers/net/mlx5/mlx5_trigger.c\n+++ b/drivers/net/mlx5/mlx5_trigger.c\n@@ -402,6 +402,24 @@\n \tunsigned int j;\n \tint ret;\n \n+\t/*\n+\t * Hairpin txq default flow should be created no matter if it is\n+\t * isolation mode. Or else all the packets to be sent will be sent\n+\t * out directly without the TX flow actions, e.g. encapsulation.\n+\t */\n+\tfor (i = 0; i != priv->txqs_n; ++i) {\n+\t\tstruct mlx5_txq_ctrl *txq_ctrl = mlx5_txq_get(dev, i);\n+\t\tif (!txq_ctrl)\n+\t\t\tcontinue;\n+\t\tif (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {\n+\t\t\tret = mlx5_ctrl_flow_source_queue(dev, i);\n+\t\t\tif (ret) {\n+\t\t\t\tmlx5_txq_release(dev, i);\n+\t\t\t\tgoto error;\n+\t\t\t}\n+\t\t}\n+\t\tmlx5_txq_release(dev, i);\n+\t}\n \tif (priv->config.dv_esw_en && !priv->config.vf)\n \t\tif (!mlx5_flow_create_esw_table_zero_flow(dev))\n \t\t\tgoto error;\n", "prefixes": [ "v3", "12/14" ] }