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GET /api/patches/61242/?format=api
{ "id": 61242, "url": "http://patches.dpdk.org/api/patches/61242/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1571130263-120863-10-git-send-email-orika@mellanox.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1571130263-120863-10-git-send-email-orika@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1571130263-120863-10-git-send-email-orika@mellanox.com", "date": "2019-10-15T09:04:17", "name": "[v3,09/14] net/mlx5: add support for hairpin hrxq", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "fe0ee41e56c6d56c76d4a13d9d1fac24a1ab0ebc", "submitter": { "id": 795, "url": "http://patches.dpdk.org/api/people/795/?format=api", "name": "Ori Kam", "email": "orika@mellanox.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1571130263-120863-10-git-send-email-orika@mellanox.com/mbox/", "series": [ { "id": 6855, "url": "http://patches.dpdk.org/api/series/6855/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=6855", "date": "2019-10-15T09:04:08", "name": "add hairpin feature", "version": 3, "mbox": "http://patches.dpdk.org/series/6855/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/61242/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/61242/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 81BFD1BFB6;\n\tTue, 15 Oct 2019 11:06:42 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n\tby dpdk.org (Postfix) with ESMTP id CBFB61BF96\n\tfor <dev@dpdk.org>; Tue, 15 Oct 2019 11:06:40 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n\torika@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 15 Oct 2019 11:06:38 +0200", "from pegasus04.mtr.labs.mlnx. (pegasus04.mtr.labs.mlnx\n\t[10.210.16.126])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x9F94hck029891;\n\tTue, 15 Oct 2019 12:06:37 +0300" ], "From": "Ori Kam <orika@mellanox.com>", "To": "Matan Azrad <matan@mellanox.com>, Shahaf Shuler <shahafs@mellanox.com>, \n\tViacheslav Ovsiienko <viacheslavo@mellanox.com>", "Cc": "dev@dpdk.org, orika@mellanox.com, jingjing.wu@intel.com,\n\tstephen@networkplumber.org", "Date": "Tue, 15 Oct 2019 09:04:17 +0000", "Message-Id": "<1571130263-120863-10-git-send-email-orika@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1571130263-120863-1-git-send-email-orika@mellanox.com>", "References": "<1569479349-36962-1-git-send-email-orika@mellanox.com>\n\t<1571130263-120863-1-git-send-email-orika@mellanox.com>", "Subject": "[dpdk-dev] [PATCH v3 09/14] net/mlx5: add support for hairpin hrxq", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add support for rss on hairpin queues.\n\nSigned-off-by: Ori Kam <orika@mellanox.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\n\n---\n drivers/net/mlx5/mlx5.h | 3 ++\n drivers/net/mlx5/mlx5_ethdev.c | 102 ++++++++++++++++++++++++++++++----------\n drivers/net/mlx5/mlx5_rss.c | 1 +\n drivers/net/mlx5/mlx5_rxq.c | 22 ++++++---\n drivers/net/mlx5/mlx5_trigger.c | 6 +++\n 5 files changed, 104 insertions(+), 30 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex a43accf..391ae2c 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -711,6 +711,7 @@ struct mlx5_priv {\n \trte_spinlock_t uar_lock[MLX5_UAR_PAGE_NUM_MAX];\n \t/* UAR same-page access control required in 32bit implementations. */\n #endif\n+\tuint8_t skip_default_rss_reta; /* Skip configuration of default reta. */\n };\n \n #define PORT_ID(priv) ((priv)->dev_data->port_id)\n@@ -785,6 +786,8 @@ int mlx5_get_module_eeprom(struct rte_eth_dev *dev,\n \t\t\t struct rte_dev_eeprom_info *info);\n int mlx5_hairpin_cap_get(struct rte_eth_dev *dev,\n \t\t\t struct rte_eth_hairpin_cap *cap);\n+int mlx5_dev_configure_rss_reta(struct rte_eth_dev *dev);\n+\n /* mlx5_mac.c */\n \n int mlx5_get_mac(struct rte_eth_dev *dev, uint8_t (*mac)[RTE_ETHER_ADDR_LEN]);\ndiff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c\nindex 95c70f7..5b811e8 100644\n--- a/drivers/net/mlx5/mlx5_ethdev.c\n+++ b/drivers/net/mlx5/mlx5_ethdev.c\n@@ -383,9 +383,6 @@ struct ethtool_link_settings {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \tunsigned int rxqs_n = dev->data->nb_rx_queues;\n \tunsigned int txqs_n = dev->data->nb_tx_queues;\n-\tunsigned int i;\n-\tunsigned int j;\n-\tunsigned int reta_idx_n;\n \tconst uint8_t use_app_rss_key =\n \t\t!!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key;\n \tint ret = 0;\n@@ -431,28 +428,8 @@ struct ethtool_link_settings {\n \t\tDRV_LOG(INFO, \"port %u Rx queues number update: %u -> %u\",\n \t\t\tdev->data->port_id, priv->rxqs_n, rxqs_n);\n \t\tpriv->rxqs_n = rxqs_n;\n-\t\t/*\n-\t\t * If the requested number of RX queues is not a power of two,\n-\t\t * use the maximum indirection table size for better balancing.\n-\t\t * The result is always rounded to the next power of two.\n-\t\t */\n-\t\treta_idx_n = (1 << log2above((rxqs_n & (rxqs_n - 1)) ?\n-\t\t\t\t\t priv->config.ind_table_max_size :\n-\t\t\t\t\t rxqs_n));\n-\t\tret = mlx5_rss_reta_index_resize(dev, reta_idx_n);\n-\t\tif (ret)\n-\t\t\treturn ret;\n-\t\t/*\n-\t\t * When the number of RX queues is not a power of two,\n-\t\t * the remaining table entries are padded with reused WQs\n-\t\t * and hashes are not spread uniformly.\n-\t\t */\n-\t\tfor (i = 0, j = 0; (i != reta_idx_n); ++i) {\n-\t\t\t(*priv->reta_idx)[i] = j;\n-\t\t\tif (++j == rxqs_n)\n-\t\t\t\tj = 0;\n-\t\t}\n \t}\n+\tpriv->skip_default_rss_reta = 0;\n \tret = mlx5_proc_priv_init(dev);\n \tif (ret)\n \t\treturn ret;\n@@ -460,6 +437,83 @@ struct ethtool_link_settings {\n }\n \n /**\n+ * Configure default RSS reta.\n+ *\n+ * @param dev\n+ * Pointer to Ethernet device structure.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+int\n+mlx5_dev_configure_rss_reta(struct rte_eth_dev *dev)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tunsigned int rxqs_n = dev->data->nb_rx_queues;\n+\tunsigned int i;\n+\tunsigned int j;\n+\tunsigned int reta_idx_n;\n+\tint ret = 0;\n+\tunsigned int *rss_queue_arr = NULL;\n+\tunsigned int rss_queue_n = 0;\n+\n+\tif (priv->skip_default_rss_reta)\n+\t\treturn ret;\n+\trss_queue_arr = rte_malloc(\"\", rxqs_n * sizeof(unsigned int), 0);\n+\tif (!rss_queue_arr) {\n+\t\tDRV_LOG(ERR, \"port %u cannot allocate RSS queue list (%u)\",\n+\t\t\tdev->data->port_id, rxqs_n);\n+\t\trte_errno = ENOMEM;\n+\t\treturn -rte_errno;\n+\t}\n+\tfor (i = 0, j = 0; i < rxqs_n; i++) {\n+\t\tstruct mlx5_rxq_data *rxq_data;\n+\t\tstruct mlx5_rxq_ctrl *rxq_ctrl;\n+\n+\t\trxq_data = (*priv->rxqs)[i];\n+\t\trxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);\n+\t\tif (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)\n+\t\t\trss_queue_arr[j++] = i;\n+\t}\n+\trss_queue_n = j;\n+\tif (rss_queue_n > priv->config.ind_table_max_size) {\n+\t\tDRV_LOG(ERR, \"port %u cannot handle this many Rx queues (%u)\",\n+\t\t\tdev->data->port_id, rss_queue_n);\n+\t\trte_errno = EINVAL;\n+\t\trte_free(rss_queue_arr);\n+\t\treturn -rte_errno;\n+\t}\n+\tDRV_LOG(INFO, \"port %u Rx queues number update: %u -> %u\",\n+\t\tdev->data->port_id, priv->rxqs_n, rxqs_n);\n+\tpriv->rxqs_n = rxqs_n;\n+\t/*\n+\t * If the requested number of RX queues is not a power of two,\n+\t * use the maximum indirection table size for better balancing.\n+\t * The result is always rounded to the next power of two.\n+\t */\n+\treta_idx_n = (1 << log2above((rss_queue_n & (rss_queue_n - 1)) ?\n+\t\t\t\tpriv->config.ind_table_max_size :\n+\t\t\t\trss_queue_n));\n+\tret = mlx5_rss_reta_index_resize(dev, reta_idx_n);\n+\tif (ret) {\n+\t\trte_free(rss_queue_arr);\n+\t\treturn ret;\n+\t}\n+\t/*\n+\t * When the number of RX queues is not a power of two,\n+\t * the remaining table entries are padded with reused WQs\n+\t * and hashes are not spread uniformly.\n+\t */\n+\tfor (i = 0, j = 0; (i != reta_idx_n); ++i) {\n+\t\t(*priv->reta_idx)[i] = rss_queue_arr[j];\n+\t\tif (++j == rss_queue_n)\n+\t\t\tj = 0;\n+\t}\n+\trte_free(rss_queue_arr);\n+\treturn ret;\n+}\n+\n+/**\n * Sets default tuning parameters.\n *\n * @param dev\ndiff --git a/drivers/net/mlx5/mlx5_rss.c b/drivers/net/mlx5/mlx5_rss.c\nindex 891d764..1028264 100644\n--- a/drivers/net/mlx5/mlx5_rss.c\n+++ b/drivers/net/mlx5/mlx5_rss.c\n@@ -223,6 +223,7 @@\n \t}\n \tif (dev->data->dev_started) {\n \t\tmlx5_dev_stop(dev);\n+\t\tpriv->skip_default_rss_reta = 1;\n \t\treturn mlx5_dev_start(dev);\n \t}\n \treturn 0;\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex 66596df..a8ff8b2 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -2156,9 +2156,13 @@ struct mlx5_rxq_ctrl *\n \t\t}\n \t} else { /* ind_tbl->type == MLX5_IND_TBL_TYPE_DEVX */\n \t\tstruct mlx5_devx_rqt_attr *rqt_attr = NULL;\n+\t\tconst unsigned int rqt_n =\n+\t\t\t1 << (rte_is_power_of_2(queues_n) ?\n+\t\t\t log2above(queues_n) :\n+\t\t\t log2above(priv->config.ind_table_max_size));\n \n \t\trqt_attr = rte_calloc(__func__, 1, sizeof(*rqt_attr) +\n-\t\t\t\t queues_n * sizeof(uint32_t), 0);\n+\t\t\t\t rqt_n * sizeof(uint32_t), 0);\n \t\tif (!rqt_attr) {\n \t\t\tDRV_LOG(ERR, \"port %u cannot allocate RQT resources\",\n \t\t\t\tdev->data->port_id);\n@@ -2166,7 +2170,7 @@ struct mlx5_rxq_ctrl *\n \t\t\tgoto error;\n \t\t}\n \t\trqt_attr->rqt_max_size = priv->config.ind_table_max_size;\n-\t\trqt_attr->rqt_actual_size = queues_n;\n+\t\trqt_attr->rqt_actual_size = rqt_n;\n \t\tfor (i = 0; i != queues_n; ++i) {\n \t\t\tstruct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev,\n \t\t\t\t\t\t\t\t queues[i]);\n@@ -2175,6 +2179,9 @@ struct mlx5_rxq_ctrl *\n \t\t\trqt_attr->rq_list[i] = rxq->obj->rq->id;\n \t\t\tind_tbl->queues[i] = queues[i];\n \t\t}\n+\t\tk = i; /* Retain value of i for use in error case. */\n+\t\tfor (j = 0; k != rqt_n; ++k, ++j)\n+\t\t\trqt_attr->rq_list[k] = rqt_attr->rq_list[j];\n \t\tind_tbl->rqt = mlx5_devx_cmd_create_rqt(priv->sh->ctx,\n \t\t\t\t\t\t\trqt_attr);\n \t\trte_free(rqt_attr);\n@@ -2328,13 +2335,13 @@ struct mlx5_hrxq *\n \tstruct mlx5_ind_table_obj *ind_tbl;\n \tint err;\n \tstruct mlx5_devx_obj *tir = NULL;\n+\tstruct mlx5_rxq_data *rxq_data = (*priv->rxqs)[queues[0]];\n+\tstruct mlx5_rxq_ctrl *rxq_ctrl =\n+\t\tcontainer_of(rxq_data, struct mlx5_rxq_ctrl, rxq);\n \n \tqueues_n = hash_fields ? queues_n : 1;\n \tind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);\n \tif (!ind_tbl) {\n-\t\tstruct mlx5_rxq_data *rxq_data = (*priv->rxqs)[queues[0]];\n-\t\tstruct mlx5_rxq_ctrl *rxq_ctrl =\n-\t\t\tcontainer_of(rxq_data, struct mlx5_rxq_ctrl, rxq);\n \t\tenum mlx5_ind_tbl_type type;\n \n \t\ttype = rxq_ctrl->obj->type == MLX5_RXQ_OBJ_TYPE_IBV ?\n@@ -2430,7 +2437,10 @@ struct mlx5_hrxq *\n \t\ttir_attr.rx_hash_fn = MLX5_RX_HASH_FN_TOEPLITZ;\n \t\tmemcpy(&tir_attr.rx_hash_field_selector_outer, &hash_fields,\n \t\t sizeof(uint64_t));\n-\t\ttir_attr.transport_domain = priv->sh->tdn;\n+\t\tif (rxq_ctrl->obj->type == MLX5_RXQ_OBJ_TYPE_DEVX_HAIRPIN)\n+\t\t\ttir_attr.transport_domain = priv->sh->td->id;\n+\t\telse\n+\t\t\ttir_attr.transport_domain = priv->sh->tdn;\n \t\tmemcpy(tir_attr.rx_hash_toeplitz_key, rss_key, rss_key_len);\n \t\ttir_attr.indirect_table = ind_tbl->rqt->id;\n \t\tif (dev->data->dev_conf.lpbk_mode)\ndiff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c\nindex a4fcdb3..f66b6ee 100644\n--- a/drivers/net/mlx5/mlx5_trigger.c\n+++ b/drivers/net/mlx5/mlx5_trigger.c\n@@ -269,6 +269,12 @@\n \tint ret;\n \n \tDRV_LOG(DEBUG, \"port %u starting device\", dev->data->port_id);\n+\tret = mlx5_dev_configure_rss_reta(dev);\n+\tif (ret) {\n+\t\tDRV_LOG(ERR, \"port %u reta config failed: %s\",\n+\t\t\tdev->data->port_id, strerror(rte_errno));\n+\t\treturn -rte_errno;\n+\t}\n \tret = mlx5_txq_start(dev);\n \tif (ret) {\n \t\tDRV_LOG(ERR, \"port %u Tx queue allocation failed: %s\",\n", "prefixes": [ "v3", "09/14" ] }