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GET /api/patches/60389/?format=api
{ "id": 60389, "url": "http://patches.dpdk.org/api/patches/60389/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20191002012335.85324-16-ajit.khaparde@broadcom.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20191002012335.85324-16-ajit.khaparde@broadcom.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20191002012335.85324-16-ajit.khaparde@broadcom.com", "date": "2019-10-02T01:23:35", "name": "[v3,15/15] net/bnxt: add PTP support for Thor", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "c92ae6bfa3ba59610660c444f584c026dbea086f", "submitter": { "id": 501, "url": "http://patches.dpdk.org/api/people/501/?format=api", "name": "Ajit Khaparde", "email": "ajit.khaparde@broadcom.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20191002012335.85324-16-ajit.khaparde@broadcom.com/mbox/", "series": [ { "id": 6660, "url": "http://patches.dpdk.org/api/series/6660/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=6660", "date": "2019-10-02T01:23:24", "name": "bnxt patchset to support device error recovery", "version": 3, "mbox": "http://patches.dpdk.org/series/6660/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/60389/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/60389/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E9C7D1BF16;\n\tWed, 2 Oct 2019 03:24:24 +0200 (CEST)", "from rnd-relay.smtp.broadcom.com (unknown [192.19.229.170])\n\tby dpdk.org (Postfix) with ESMTP id C27EF44C3\n\tfor <dev@dpdk.org>; Wed, 2 Oct 2019 03:23:48 +0200 (CEST)", "from mail-irv-17.broadcom.com (mail-irv-17.lvn.broadcom.net\n\t[10.75.242.48])\n\tby rnd-relay.smtp.broadcom.com (Postfix) with ESMTP id 8F89330CC5C;\n\tTue, 1 Oct 2019 18:22:33 -0700 (PDT)", "from localhost.localdomain (unknown [10.230.30.225])\n\tby mail-irv-17.broadcom.com (Postfix) with ESMTP id 0E3C6140069;\n\tTue, 1 Oct 2019 18:23:43 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.10.3 rnd-relay.smtp.broadcom.com 8F89330CC5C", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com;\n\ts=dkimrelay; t=1569979353;\n\tbh=kpdbbEIucrebUZV6i8OZ067U86BH4XSRUBOlOAgUQ64=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=BggGnPAUbLKUUb1uXsdioyt2hDCQbb7Ja9MZMHWrPscMyzmLgrGVi1r69CIoGnf9f\n\t/cUoYDoMBNtAci+UpXvkfGsyvlkQwuXgoo0QqVzpiKojyKS4WPReTo2q+b4cBqryc0\n\tGcfrwRTBkUnmA4t/H++xHJn8ePbZFGDpxep8W130=", "From": "Ajit Khaparde <ajit.khaparde@broadcom.com>", "To": "dev@dpdk.org", "Cc": "ferruh.yigit@intel.com, Kalesh AP <kalesh-anakkur.purayil@broadcom.com>, \n\tSomnath Kotur <somnath.kotur@broadcom.com>,\n\tAjit Kumar Khaparde <ajit.khaparde@broadcom.com>", "Date": "Tue, 1 Oct 2019 18:23:35 -0700", "Message-Id": "<20191002012335.85324-16-ajit.khaparde@broadcom.com>", "X-Mailer": "git-send-email 2.20.1 (Apple Git-117)", "In-Reply-To": "<20191002012335.85324-1-ajit.khaparde@broadcom.com>", "References": "<7c08999f-13f3-5fb6-39a2-557a0884bfde@intel.com>\n\t<20191002012335.85324-1-ajit.khaparde@broadcom.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v3 15/15] net/bnxt: add PTP support for Thor", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>\n\nOn Thor, direct access to PTP registers (via GRC) is not supported.\nDriver must use HWRM to access the timestamp information.\n\nVectorized Rx/Tx cannot be enabled if RTE_LIBRTE_IEEE1588=y.\nRemove the PTP flags handling code from the vector Rx path.\n\nAdd support to read tx timestamp value and the time from the\ntimesync clock.\n\nOn Thor, Rx timestamps are provided directly in the Rx completion\nrecords to the driver. Only 32 bits of the timestamp is present in\nthe completion. Driver needs to read the current 48 bit free running\ntimer using the HWRM_PORT_TS_QUERY command and combine the upper\n16 bits from the HWRM response with the lower 32 bits in the\nRx completion to produce the 48 bit timestamp for the Rx packet.\n\nSigned-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>\nReviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>\nReviewed-by: Ajit Kumar Khaparde <ajit.khaparde@broadcom.com>\n---\n drivers/net/bnxt/bnxt.h | 8 +++\n drivers/net/bnxt/bnxt_ethdev.c | 46 +++++++++++---\n drivers/net/bnxt/bnxt_hwrm.c | 86 ++++++++++++++++++++------\n drivers/net/bnxt/bnxt_hwrm.h | 2 +\n drivers/net/bnxt/bnxt_rxr.c | 42 +++++++++++--\n drivers/net/bnxt/bnxt_txr.c | 7 ++-\n drivers/net/bnxt/hsi_struct_def_dpdk.h | 86 ++++++++++++++++++++++++++\n 7 files changed, 243 insertions(+), 34 deletions(-)", "diff": "diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h\nindex 310b730e68..818a49f461 100644\n--- a/drivers/net/bnxt/bnxt.h\n+++ b/drivers/net/bnxt/bnxt.h\n@@ -189,6 +189,10 @@ struct rte_flow {\n \tstruct bnxt_vnic_info\t*vnic;\n };\n \n+#define BNXT_PTP_FLAGS_PATH_TX\t\t0x0\n+#define BNXT_PTP_FLAGS_PATH_RX\t\t0x1\n+#define BNXT_PTP_FLAGS_CURRENT_TIME\t0x2\n+\n struct bnxt_ptp_cfg {\n #define BNXT_GRCPF_REG_WINDOW_BASE_OUT 0x400\n #define BNXT_GRCPF_REG_SYNC_TIME 0x480\n@@ -234,6 +238,9 @@ struct bnxt_ptp_cfg {\n \tuint32_t\t\t\trx_mapped_regs[BNXT_PTP_RX_REGS];\n \tuint32_t\t\t\ttx_regs[BNXT_PTP_TX_REGS];\n \tuint32_t\t\t\ttx_mapped_regs[BNXT_PTP_TX_REGS];\n+\n+\t/* On Thor, the Rx timestamp is present in the Rx completion record */\n+\tuint64_t\t\t\trx_timestamp;\n };\n \n struct bnxt_coal {\n@@ -428,6 +435,7 @@ struct bnxt {\n #define BNXT_FLAG_EXT_STATS_SUPPORTED\t\tBIT(22)\n #define BNXT_FLAG_NEW_RM\t\t\tBIT(23)\n #define BNXT_FLAG_INIT_DONE\t\t\tBIT(24)\n+#define BNXT_FLAG_FW_CAP_ONE_STEP_TX_TS\t\tBIT(25)\n #define BNXT_PF(bp)\t\t(!((bp)->flags & BNXT_FLAG_VF))\n #define BNXT_VF(bp)\t\t((bp)->flags & BNXT_FLAG_VF)\n #define BNXT_NPAR(bp)\t\t((bp)->port_partition_type)\ndiff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c\nindex 7c3ef93253..0083ba6e83 100644\n--- a/drivers/net/bnxt/bnxt_ethdev.c\n+++ b/drivers/net/bnxt/bnxt_ethdev.c\n@@ -740,6 +740,7 @@ static eth_rx_burst_t\n bnxt_receive_function(__rte_unused struct rte_eth_dev *eth_dev)\n {\n #ifdef RTE_ARCH_X86\n+#ifndef RTE_LIBRTE_IEEE1588\n \t/*\n \t * Vector mode receive can be enabled only if scatter rx is not\n \t * in use and rx offloads are limited to VLAN stripping and\n@@ -766,6 +767,7 @@ bnxt_receive_function(__rte_unused struct rte_eth_dev *eth_dev)\n \t\t eth_dev->data->port_id,\n \t\t eth_dev->data->scattered_rx,\n \t\t eth_dev->data->dev_conf.rxmode.offloads);\n+#endif\n #endif\n \treturn bnxt_recv_pkts;\n }\n@@ -774,6 +776,7 @@ static eth_tx_burst_t\n bnxt_transmit_function(__rte_unused struct rte_eth_dev *eth_dev)\n {\n #ifdef RTE_ARCH_X86\n+#ifndef RTE_LIBRTE_IEEE1588\n \t/*\n \t * Vector mode transmit can be enabled only if not using scatter rx\n \t * or tx offloads.\n@@ -791,6 +794,7 @@ bnxt_transmit_function(__rte_unused struct rte_eth_dev *eth_dev)\n \t\t eth_dev->data->port_id,\n \t\t eth_dev->data->scattered_rx,\n \t\t eth_dev->data->dev_conf.txmode.offloads);\n+#endif\n #endif\n \treturn bnxt_xmit_pkts;\n }\n@@ -3223,18 +3227,24 @@ bnxt_timesync_write_time(struct rte_eth_dev *dev, const struct timespec *ts)\n static int\n bnxt_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts)\n {\n-\tuint64_t ns, systime_cycles;\n \tstruct bnxt *bp = dev->data->dev_private;\n \tstruct bnxt_ptp_cfg *ptp = bp->ptp_cfg;\n+\tuint64_t ns, systime_cycles = 0;\n+\tint rc = 0;\n \n \tif (!ptp)\n \t\treturn 0;\n \n-\tsystime_cycles = bnxt_cc_read(bp);\n+\tif (BNXT_CHIP_THOR(bp))\n+\t\trc = bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,\n+\t\t\t\t\t &systime_cycles);\n+\telse\n+\t\tsystime_cycles = bnxt_cc_read(bp);\n+\n \tns = rte_timecounter_update(&ptp->tc, systime_cycles);\n \t*ts = rte_ns_to_timespec(ns);\n \n-\treturn 0;\n+\treturn rc;\n }\n static int\n bnxt_timesync_enable(struct rte_eth_dev *dev)\n@@ -3242,6 +3252,7 @@ bnxt_timesync_enable(struct rte_eth_dev *dev)\n \tstruct bnxt *bp = dev->data->dev_private;\n \tstruct bnxt_ptp_cfg *ptp = bp->ptp_cfg;\n \tuint32_t shift = 0;\n+\tint rc;\n \n \tif (!ptp)\n \t\treturn 0;\n@@ -3250,8 +3261,9 @@ bnxt_timesync_enable(struct rte_eth_dev *dev)\n \tptp->tx_tstamp_en = 1;\n \tptp->rxctl = BNXT_PTP_MSG_EVENTS;\n \n-\tif (!bnxt_hwrm_ptp_cfg(bp))\n-\t\tbnxt_map_ptp_regs(bp);\n+\trc = bnxt_hwrm_ptp_cfg(bp);\n+\tif (rc)\n+\t\treturn rc;\n \n \tmemset(&ptp->tc, 0, sizeof(struct rte_timecounter));\n \tmemset(&ptp->rx_tstamp_tc, 0, sizeof(struct rte_timecounter));\n@@ -3269,6 +3281,9 @@ bnxt_timesync_enable(struct rte_eth_dev *dev)\n \tptp->tx_tstamp_tc.cc_shift = shift;\n \tptp->tx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;\n \n+\tif (!BNXT_CHIP_THOR(bp))\n+\t\tbnxt_map_ptp_regs(bp);\n+\n \treturn 0;\n }\n \n@@ -3287,7 +3302,8 @@ bnxt_timesync_disable(struct rte_eth_dev *dev)\n \n \tbnxt_hwrm_ptp_cfg(bp);\n \n-\tbnxt_unmap_ptp_regs(bp);\n+\tif (!BNXT_CHIP_THOR(bp))\n+\t\tbnxt_unmap_ptp_regs(bp);\n \n \treturn 0;\n }\n@@ -3305,7 +3321,11 @@ bnxt_timesync_read_rx_timestamp(struct rte_eth_dev *dev,\n \tif (!ptp)\n \t\treturn 0;\n \n-\tbnxt_get_rx_ts(bp, &rx_tstamp_cycles);\n+\tif (BNXT_CHIP_THOR(bp))\n+\t\trx_tstamp_cycles = ptp->rx_timestamp;\n+\telse\n+\t\tbnxt_get_rx_ts(bp, &rx_tstamp_cycles);\n+\n \tns = rte_timecounter_update(&ptp->rx_tstamp_tc, rx_tstamp_cycles);\n \t*timestamp = rte_ns_to_timespec(ns);\n \treturn 0;\n@@ -3319,15 +3339,21 @@ bnxt_timesync_read_tx_timestamp(struct rte_eth_dev *dev,\n \tstruct bnxt_ptp_cfg *ptp = bp->ptp_cfg;\n \tuint64_t tx_tstamp_cycles = 0;\n \tuint64_t ns;\n+\tint rc = 0;\n \n \tif (!ptp)\n \t\treturn 0;\n \n-\tbnxt_get_tx_ts(bp, &tx_tstamp_cycles);\n+\tif (BNXT_CHIP_THOR(bp))\n+\t\trc = bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_PATH_TX,\n+\t\t\t\t\t &tx_tstamp_cycles);\n+\telse\n+\t\trc = bnxt_get_tx_ts(bp, &tx_tstamp_cycles);\n+\n \tns = rte_timecounter_update(&ptp->tx_tstamp_tc, tx_tstamp_cycles);\n \t*timestamp = rte_ns_to_timespec(ns);\n \n-\treturn 0;\n+\treturn rc;\n }\n \n static int\n@@ -4574,6 +4600,8 @@ bnxt_uninit_resources(struct bnxt *bp, bool reconfig_dev)\n \t\t}\n \t}\n \n+\trte_free(bp->ptp_cfg);\n+\tbp->ptp_cfg = NULL;\n \treturn rc;\n }\n \ndiff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c\nindex 7304cbf72c..174dc75d54 100644\n--- a/drivers/net/bnxt/bnxt_hwrm.c\n+++ b/drivers/net/bnxt/bnxt_hwrm.c\n@@ -506,31 +506,37 @@ static int bnxt_hwrm_ptp_qcfg(struct bnxt *bp)\n \n \tHWRM_CHECK_RESULT();\n \n-\tif (!(resp->flags & HWRM_PORT_MAC_PTP_QCFG_OUTPUT_FLAGS_DIRECT_ACCESS))\n+\tif (!BNXT_CHIP_THOR(bp) &&\n+\t !(resp->flags & HWRM_PORT_MAC_PTP_QCFG_OUTPUT_FLAGS_DIRECT_ACCESS))\n \t\treturn 0;\n \n+\tif (resp->flags & HWRM_PORT_MAC_PTP_QCFG_OUTPUT_FLAGS_ONE_STEP_TX_TS)\n+\t\tbp->flags |= BNXT_FLAG_FW_CAP_ONE_STEP_TX_TS;\n+\n \tptp = rte_zmalloc(\"ptp_cfg\", sizeof(*ptp), 0);\n \tif (!ptp)\n \t\treturn -ENOMEM;\n \n-\tptp->rx_regs[BNXT_PTP_RX_TS_L] =\n-\t\trte_le_to_cpu_32(resp->rx_ts_reg_off_lower);\n-\tptp->rx_regs[BNXT_PTP_RX_TS_H] =\n-\t\trte_le_to_cpu_32(resp->rx_ts_reg_off_upper);\n-\tptp->rx_regs[BNXT_PTP_RX_SEQ] =\n-\t\trte_le_to_cpu_32(resp->rx_ts_reg_off_seq_id);\n-\tptp->rx_regs[BNXT_PTP_RX_FIFO] =\n-\t\trte_le_to_cpu_32(resp->rx_ts_reg_off_fifo);\n-\tptp->rx_regs[BNXT_PTP_RX_FIFO_ADV] =\n-\t\trte_le_to_cpu_32(resp->rx_ts_reg_off_fifo_adv);\n-\tptp->tx_regs[BNXT_PTP_TX_TS_L] =\n-\t\trte_le_to_cpu_32(resp->tx_ts_reg_off_lower);\n-\tptp->tx_regs[BNXT_PTP_TX_TS_H] =\n-\t\trte_le_to_cpu_32(resp->tx_ts_reg_off_upper);\n-\tptp->tx_regs[BNXT_PTP_TX_SEQ] =\n-\t\trte_le_to_cpu_32(resp->tx_ts_reg_off_seq_id);\n-\tptp->tx_regs[BNXT_PTP_TX_FIFO] =\n-\t\trte_le_to_cpu_32(resp->tx_ts_reg_off_fifo);\n+\tif (!BNXT_CHIP_THOR(bp)) {\n+\t\tptp->rx_regs[BNXT_PTP_RX_TS_L] =\n+\t\t\trte_le_to_cpu_32(resp->rx_ts_reg_off_lower);\n+\t\tptp->rx_regs[BNXT_PTP_RX_TS_H] =\n+\t\t\trte_le_to_cpu_32(resp->rx_ts_reg_off_upper);\n+\t\tptp->rx_regs[BNXT_PTP_RX_SEQ] =\n+\t\t\trte_le_to_cpu_32(resp->rx_ts_reg_off_seq_id);\n+\t\tptp->rx_regs[BNXT_PTP_RX_FIFO] =\n+\t\t\trte_le_to_cpu_32(resp->rx_ts_reg_off_fifo);\n+\t\tptp->rx_regs[BNXT_PTP_RX_FIFO_ADV] =\n+\t\t\trte_le_to_cpu_32(resp->rx_ts_reg_off_fifo_adv);\n+\t\tptp->tx_regs[BNXT_PTP_TX_TS_L] =\n+\t\t\trte_le_to_cpu_32(resp->tx_ts_reg_off_lower);\n+\t\tptp->tx_regs[BNXT_PTP_TX_TS_H] =\n+\t\t\trte_le_to_cpu_32(resp->tx_ts_reg_off_upper);\n+\t\tptp->tx_regs[BNXT_PTP_TX_SEQ] =\n+\t\t\trte_le_to_cpu_32(resp->tx_ts_reg_off_seq_id);\n+\t\tptp->tx_regs[BNXT_PTP_TX_FIFO] =\n+\t\t\trte_le_to_cpu_32(resp->tx_ts_reg_off_fifo);\n+\t}\n \n \tptp->bp = bp;\n \tbp->ptp_cfg = ptp;\n@@ -4834,3 +4840,45 @@ int bnxt_hwrm_fw_reset(struct bnxt *bp)\n \n \treturn rc;\n }\n+\n+int bnxt_hwrm_port_ts_query(struct bnxt *bp, uint8_t path, uint64_t *timestamp)\n+{\n+\tstruct hwrm_port_ts_query_output *resp = bp->hwrm_cmd_resp_addr;\n+\tstruct hwrm_port_ts_query_input req = {0};\n+\tstruct bnxt_ptp_cfg *ptp = bp->ptp_cfg;\n+\tuint32_t flags = 0;\n+\tint rc;\n+\n+\tif (!ptp)\n+\t\treturn 0;\n+\n+\tHWRM_PREP(req, PORT_TS_QUERY, BNXT_USE_CHIMP_MB);\n+\n+\tswitch (path) {\n+\tcase BNXT_PTP_FLAGS_PATH_TX:\n+\t\tflags |= HWRM_PORT_TS_QUERY_INPUT_FLAGS_PATH_TX;\n+\t\tbreak;\n+\tcase BNXT_PTP_FLAGS_PATH_RX:\n+\t\tflags |= HWRM_PORT_TS_QUERY_INPUT_FLAGS_PATH_RX;\n+\t\tbreak;\n+\tcase BNXT_PTP_FLAGS_CURRENT_TIME:\n+\t\tflags |= HWRM_PORT_TS_QUERY_INPUT_FLAGS_CURRENT_TIME;\n+\t\tbreak;\n+\t}\n+\n+\treq.flags = rte_cpu_to_le_32(flags);\n+\treq.port_id = rte_cpu_to_le_16(bp->pf.port_id);\n+\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n+\n+\tHWRM_CHECK_RESULT();\n+\n+\tif (timestamp) {\n+\t\t*timestamp = rte_le_to_cpu_32(resp->ptp_msg_ts[0]);\n+\t\t*timestamp |=\n+\t\t\t(uint64_t)(rte_le_to_cpu_32(resp->ptp_msg_ts[1])) << 32;\n+\t}\n+\tHWRM_UNLOCK();\n+\n+\treturn rc;\n+}\ndiff --git a/drivers/net/bnxt/bnxt_hwrm.h b/drivers/net/bnxt/bnxt_hwrm.h\nindex db25ad5919..0d386952b6 100644\n--- a/drivers/net/bnxt/bnxt_hwrm.h\n+++ b/drivers/net/bnxt/bnxt_hwrm.h\n@@ -206,4 +206,6 @@ int bnxt_hwrm_set_mac(struct bnxt *bp);\n int bnxt_hwrm_if_change(struct bnxt *bp, bool state);\n int bnxt_hwrm_error_recovery_qcfg(struct bnxt *bp);\n int bnxt_hwrm_fw_reset(struct bnxt *bp);\n+int bnxt_hwrm_port_ts_query(struct bnxt *bp, uint8_t path,\n+\t\t\t uint64_t *timestamp);\n #endif\ndiff --git a/drivers/net/bnxt/bnxt_rxr.c b/drivers/net/bnxt/bnxt_rxr.c\nindex 12313dd53c..28487fb38e 100644\n--- a/drivers/net/bnxt/bnxt_rxr.c\n+++ b/drivers/net/bnxt/bnxt_rxr.c\n@@ -17,6 +17,9 @@\n #include \"bnxt_rxr.h\"\n #include \"bnxt_rxq.h\"\n #include \"hsi_struct_def_dpdk.h\"\n+#ifdef RTE_LIBRTE_IEEE1588\n+#include \"bnxt_hwrm.h\"\n+#endif\n \n /*\n * RX Ring handling\n@@ -348,6 +351,30 @@ bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)\n \treturn pkt_type;\n }\n \n+#ifdef RTE_LIBRTE_IEEE1588\n+static void\n+bnxt_get_rx_ts_thor(struct bnxt *bp, uint32_t rx_ts_cmpl)\n+{\n+\tuint64_t systime_cycles = 0;\n+\n+\tif (!BNXT_CHIP_THOR(bp))\n+\t\treturn;\n+\n+\t/* On Thor, Rx timestamps are provided directly in the\n+\t * Rx completion records to the driver. Only 32 bits of\n+\t * the timestamp is present in the completion. Driver needs\n+\t * to read the current 48 bit free running timer using the\n+\t * HWRM_PORT_TS_QUERY command and combine the upper 16 bits\n+\t * from the HWRM response with the lower 32 bits in the\n+\t * Rx completion to produce the 48 bit timestamp for the Rx packet\n+\t */\n+\tbnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,\n+\t\t\t\t&systime_cycles);\n+\tbp->ptp_cfg->rx_timestamp = (systime_cycles & 0xFFFF00000000);\n+\tbp->ptp_cfg->rx_timestamp |= rx_ts_cmpl;\n+}\n+#endif\n+\n static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,\n \t\t\t struct bnxt_rx_queue *rxq, uint32_t *raw_cons)\n {\n@@ -363,6 +390,7 @@ static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,\n \tuint8_t agg_buf = 0;\n \tuint16_t cmp_type;\n \tuint32_t flags2_f = 0;\n+\tuint16_t flags_type;\n \n \trxcmp = (struct rx_pkt_cmpl *)\n \t &cpr->cp_desc_ring[cp_cons];\n@@ -418,18 +446,22 @@ static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,\n \tmbuf->data_len = mbuf->pkt_len;\n \tmbuf->port = rxq->port_id;\n \tmbuf->ol_flags = 0;\n-\tif (rxcmp->flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID) {\n+\n+\tflags_type = rte_le_to_cpu_16(rxcmp->flags_type);\n+\tif (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID) {\n \t\tmbuf->hash.rss = rxcmp->rss_hash;\n \t\tmbuf->ol_flags |= PKT_RX_RSS_HASH;\n \t} else {\n \t\tmbuf->hash.fdir.id = rxcmp1->cfa_code;\n \t\tmbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;\n \t}\n-\n-\tif ((rxcmp->flags_type & rte_cpu_to_le_16(RX_PKT_CMPL_FLAGS_MASK)) ==\n-\t RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP)\n+#ifdef RTE_LIBRTE_IEEE1588\n+\tif (unlikely((flags_type & RX_PKT_CMPL_FLAGS_MASK) ==\n+\t\t RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP)) {\n \t\tmbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST;\n-\n+\t\tbnxt_get_rx_ts_thor(rxq->bp, rxcmp1->reorder);\n+\t}\n+#endif\n \tif (agg_buf)\n \t\tbnxt_rx_pages(rxq, mbuf, &tmp_raw_cons, agg_buf);\n \ndiff --git a/drivers/net/bnxt/bnxt_txr.c b/drivers/net/bnxt/bnxt_txr.c\nindex 35e7166bed..172b480b2e 100644\n--- a/drivers/net/bnxt/bnxt_txr.c\n+++ b/drivers/net/bnxt/bnxt_txr.c\n@@ -155,7 +155,7 @@ static uint16_t bnxt_start_xmit(struct rte_mbuf *tx_pkt,\n \t\t\t\tPKT_TX_UDP_CKSUM | PKT_TX_IP_CKSUM |\n \t\t\t\tPKT_TX_VLAN_PKT | PKT_TX_OUTER_IP_CKSUM |\n \t\t\t\tPKT_TX_TUNNEL_GRE | PKT_TX_TUNNEL_VXLAN |\n-\t\t\t\tPKT_TX_TUNNEL_GENEVE))\n+\t\t\t\tPKT_TX_TUNNEL_GENEVE | PKT_TX_IEEE1588_TMST))\n \t\tlong_bd = true;\n \n \tnr_bds = long_bd + tx_pkt->nb_segs;\n@@ -324,6 +324,11 @@ static uint16_t bnxt_start_xmit(struct rte_mbuf *tx_pkt,\n \t\t\t/* IP CSO */\n \t\t\ttxbd1->lflags |= TX_BD_LONG_LFLAGS_T_IP_CHKSUM;\n \t\t\ttxbd1->mss = 0;\n+\t\t} else if ((tx_pkt->ol_flags & PKT_TX_IEEE1588_TMST) ==\n+\t\t\t PKT_TX_IEEE1588_TMST) {\n+\t\t\t/* PTP */\n+\t\t\ttxbd1->lflags |= TX_BD_LONG_LFLAGS_STAMP;\n+\t\t\ttxbd1->mss = 0;\n \t\t}\n \t} else {\n \t\ttxbd->flags_type |= TX_BD_SHORT_TYPE_TX_BD_SHORT;\ndiff --git a/drivers/net/bnxt/hsi_struct_def_dpdk.h b/drivers/net/bnxt/hsi_struct_def_dpdk.h\nindex bd04fe4838..26d12cf20a 100644\n--- a/drivers/net/bnxt/hsi_struct_def_dpdk.h\n+++ b/drivers/net/bnxt/hsi_struct_def_dpdk.h\n@@ -33777,4 +33777,90 @@ struct hwrm_fw_reset_output {\n \tuint8_t valid;\n } __attribute__((packed));\n \n+/**********************\n+ * hwrm_port_ts_query *\n+ ***********************/\n+\n+\n+/* hwrm_port_ts_query_input (size:192b/24B) */\n+struct hwrm_port_ts_query_input {\n+\t/* The HWRM command request type. */\n+\tuint16_t\treq_type;\n+\t/*\n+\t * The completion ring to send the completion event on. This should\n+\t * be the NQ ID returned from the `nq_alloc` HWRM command.\n+\t */\n+\tuint16_t\tcmpl_ring;\n+\t/*\n+\t * The sequence ID is used by the driver for tracking multiple\n+\t * commands. This ID is treated as opaque data by the firmware and\n+\t * the value is returned in the `hwrm_resp_hdr` upon completion.\n+\t */\n+\tuint16_t\tseq_id;\n+\t/*\n+\t * The target ID of the command:\n+\t * * 0x0-0xFFF8 - The function ID\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n+\t * * 0xFFFF - HWRM\n+\t */\n+\tuint16_t\ttarget_id;\n+\t/*\n+\t * A physical address pointer pointing to a host buffer that the\n+\t * command's response data will be written. This can be either a host\n+\t * physical address (HPA) or a guest physical address (GPA) and must\n+\t * point to a physically contiguous block of memory.\n+\t */\n+\tuint64_t\tresp_addr;\n+\tuint32_t\tflags;\n+\t/*\n+\t * Enumeration denoting the RX, TX type of the resource.\n+\t * This enumeration is used for resources that are similar for both\n+\t * TX and RX paths of the chip.\n+\t */\n+\t#define HWRM_PORT_TS_QUERY_INPUT_FLAGS_PATH\t\t0x1UL\n+\t/* tx path */\n+\t#define HWRM_PORT_TS_QUERY_INPUT_FLAGS_PATH_TX\t\t0x0UL\n+\t/* rx path */\n+\t#define HWRM_PORT_TS_QUERY_INPUT_FLAGS_PATH_RX\t\t0x1UL\n+\t#define HWRM_PORT_TS_QUERY_INPUT_FLAGS_PATH_LAST\t\\\n+\t\tHWRM_PORT_TS_QUERY_INPUT_FLAGS_PATH_RX\n+\t/*\n+\t * If set, the response includes the current value of the free\n+\t * running timer.\n+\t */\n+\t#define HWRM_PORT_TS_QUERY_INPUT_FLAGS_CURRENT_TIME\t0x2UL\n+\t/* Port ID of port that is being queried. */\n+\tuint16_t\tport_id;\n+\tuint8_t\t\tunused_0[2];\n+} __attribute__((packed));\n+\n+/* hwrm_port_ts_query_output (size:192b/24B) */\n+struct hwrm_port_ts_query_output {\n+\t/* The specific error status for the command. */\n+\tuint16_t\terror_code;\n+\t/* The HWRM command request type. */\n+\tuint16_t\treq_type;\n+\t/* The sequence ID from the original command. */\n+\tuint16_t\tseq_id;\n+\t/* The length of the response data in number of bytes. */\n+\tuint16_t\tresp_len;\n+\t/*\n+\t * Timestamp value of PTP message captured, or current value of\n+\t * free running timer.\n+\t */\n+\tuint32_t\tptp_msg_ts[2];\n+\t/* Sequence ID of the PTP message captured. */\n+\tuint16_t\tptp_msg_seqid;\n+\tuint8_t\t\tunused_0[5];\n+\t/*\n+\t * This field is used in Output records to indicate that the output\n+\t * is completely written to RAM. This field should be read as '1'\n+\t * to indicate that the output has been completely written.\n+\t * When writing a command completion or response to an internal processor,\n+\t * the order of writes has to be such that this field is written last.\n+\t */\n+\tuint8_t\t\tvalid;\n+} __attribute__((packed));\n+\n #endif /* _HSI_STRUCT_DEF_DPDK_H_ */\n", "prefixes": [ "v3", "15/15" ] }