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GET /api/patches/60201/?format=api
{ "id": 60201, "url": "http://patches.dpdk.org/api/patches/60201/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/65d97c88b84da4e12f68d521136e9f92189f0073.1569850827.git.cloud.wangxiaoyun@huawei.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<65d97c88b84da4e12f68d521136e9f92189f0073.1569850827.git.cloud.wangxiaoyun@huawei.com>", "list_archive_url": "https://inbox.dpdk.org/dev/65d97c88b84da4e12f68d521136e9f92189f0073.1569850827.git.cloud.wangxiaoyun@huawei.com", "date": "2019-09-30T14:00:52", "name": "[v3,14/19] net/hinic: support inner L3 checksum offload", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "9509a2d84657d5969c1273a10172f05bf876ee6b", "submitter": { "id": 1446, "url": "http://patches.dpdk.org/api/people/1446/?format=api", "name": "Wangxiaoyun (Cloud)", "email": "cloud.wangxiaoyun@huawei.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/65d97c88b84da4e12f68d521136e9f92189f0073.1569850827.git.cloud.wangxiaoyun@huawei.com/mbox/", "series": [ { "id": 6622, "url": "http://patches.dpdk.org/api/series/6622/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=6622", "date": "2019-09-30T14:00:38", "name": "Add advanced features for Huawei hinic pmd", "version": 3, "mbox": "http://patches.dpdk.org/series/6622/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/60201/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/60201/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9B2A71BEB5;\n\tMon, 30 Sep 2019 15:49:37 +0200 (CEST)", "from huawei.com (szxga06-in.huawei.com [45.249.212.32])\n\tby dpdk.org (Postfix) with ESMTP id 5A7B91BEB5\n\tfor <dev@dpdk.org>; Mon, 30 Sep 2019 15:49:35 +0200 (CEST)", "from DGGEMS413-HUB.china.huawei.com (unknown [172.30.72.59])\n\tby Forcepoint Email with ESMTP id D99CCC3294274DBD50EE\n\tfor <dev@dpdk.org>; Mon, 30 Sep 2019 21:49:33 +0800 (CST)", "from tester.localdomain (10.175.119.39) by\n\tDGGEMS413-HUB.china.huawei.com (10.3.19.213) with Microsoft SMTP\n\tServer id 14.3.439.0; Mon, 30 Sep 2019 21:49:25 +0800" ], "From": "Xiaoyun wang <cloud.wangxiaoyun@huawei.com>", "To": "<ferruh.yigit@intel.com>", "CC": "<dev@dpdk.org>, <xuanziyang2@huawei.com>, <shahar.belkar@huawei.com>,\n\t<luoxianjun@huawei.com>, <tanya.brokhman@huawei.com>,\n\t<zhouguoyang@huawei.com>, <wulike1@huawei.com>, Xiaoyun wang\n\t<cloud.wangxiaoyun@huawei.com>", "Date": "Mon, 30 Sep 2019 22:00:52 +0800", "Message-ID": "<65d97c88b84da4e12f68d521136e9f92189f0073.1569850827.git.cloud.wangxiaoyun@huawei.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<cover.1569850826.git.cloud.wangxiaoyun@huawei.com>", "References": "<cover.1569850826.git.cloud.wangxiaoyun@huawei.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.175.119.39]", "X-CFilter-Loop": "Reflected", "Subject": "[dpdk-dev] [PATCH v3 14/19] net/hinic: support inner L3 checksum\n\toffload", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch supports inner L3 checksum offload for VXLAN packets,\nmodifies rx checksum offload.\n\nSigned-off-by: Xiaoyun wang <cloud.wangxiaoyun@huawei.com>\n---\n drivers/net/hinic/hinic_pmd_ethdev.h | 1 +\n drivers/net/hinic/hinic_pmd_rx.c | 10 +-\n drivers/net/hinic/hinic_pmd_tx.c | 190 ++++++++++++++++++++++-------------\n 3 files changed, 127 insertions(+), 74 deletions(-)", "diff": "diff --git a/drivers/net/hinic/hinic_pmd_ethdev.h b/drivers/net/hinic/hinic_pmd_ethdev.h\nindex dd96667..3e3f3b3 100644\n--- a/drivers/net/hinic/hinic_pmd_ethdev.h\n+++ b/drivers/net/hinic/hinic_pmd_ethdev.h\n@@ -178,6 +178,7 @@ struct hinic_nic_dev {\n \t * vf: the same with associate pf\n \t */\n \tu32 default_cos;\n+\tu32 rx_csum_en;\n \n \tstruct hinic_filter_info filter;\n \tstruct hinic_ntuple_filter_list filter_ntuple_list;\ndiff --git a/drivers/net/hinic/hinic_pmd_rx.c b/drivers/net/hinic/hinic_pmd_rx.c\nindex 08e02ae..37b4f5c 100644\n--- a/drivers/net/hinic/hinic_pmd_rx.c\n+++ b/drivers/net/hinic/hinic_pmd_rx.c\n@@ -658,7 +658,6 @@ int hinic_rx_configure(struct rte_eth_dev *dev)\n \tstruct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);\n \tstruct rte_eth_rss_conf rss_conf =\n \t\tdev->data->dev_conf.rx_adv_conf.rss_conf;\n-\tu32 csum_en = 0;\n \tint err;\n \n \tif (nic_dev->flags & ETH_MQ_RX_RSS_FLAG) {\n@@ -678,9 +677,10 @@ int hinic_rx_configure(struct rte_eth_dev *dev)\n \n \t/* Enable both L3/L4 rx checksum offload */\n \tif (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_CHECKSUM)\n-\t\tcsum_en = HINIC_RX_CSUM_OFFLOAD_EN;\n+\t\tnic_dev->rx_csum_en = HINIC_RX_CSUM_OFFLOAD_EN;\n \n-\terr = hinic_set_rx_csum_offload(nic_dev->hwdev, csum_en);\n+\terr = hinic_set_rx_csum_offload(nic_dev->hwdev,\n+\t\t\t\t\tHINIC_RX_CSUM_OFFLOAD_EN);\n \tif (err)\n \t\tgoto rx_csum_ofl_err;\n \n@@ -781,6 +781,10 @@ static inline uint64_t hinic_rx_csum(uint32_t status, struct hinic_rxq *rxq)\n {\n \tuint32_t checksum_err;\n \tuint64_t flags;\n+\tstruct hinic_nic_dev *nic_dev = rxq->nic_dev;\n+\n+\tif (unlikely(!(nic_dev->rx_csum_en & HINIC_RX_CSUM_OFFLOAD_EN)))\n+\t\treturn PKT_RX_IP_CKSUM_UNKNOWN;\n \n \t/* most case checksum is ok */\n \tchecksum_err = HINIC_GET_RX_CSUM_ERR(status);\ndiff --git a/drivers/net/hinic/hinic_pmd_tx.c b/drivers/net/hinic/hinic_pmd_tx.c\nindex 0ef7add..26f481f 100644\n--- a/drivers/net/hinic/hinic_pmd_tx.c\n+++ b/drivers/net/hinic/hinic_pmd_tx.c\n@@ -20,6 +20,9 @@\n #include \"hinic_pmd_tx.h\"\n \n /* packet header and tx offload info */\n+#define ETHER_LEN_NO_VLAN\t\t14\n+#define ETHER_LEN_WITH_VLAN\t\t18\n+#define HEADER_LEN_OFFSET\t\t2\n #define VXLANLEN\t\t\t8\n #define MAX_PLD_OFFSET\t\t\t221\n #define MAX_SINGLE_SGE_SIZE\t\t65536\n@@ -34,6 +37,9 @@\n #define HINIC_TSO_PKT_MAX_SGE\t\t\t127\t/* tso max sge 127 */\n #define HINIC_TSO_SEG_NUM_INVALID(num)\t\t((num) > HINIC_TSO_PKT_MAX_SGE)\n \n+#define HINIC_TX_OUTER_CHECKSUM_FLAG_SET 1\n+#define HINIC_TX_OUTER_CHECKSUM_FLAG_NO_SET 0\n+\n /* sizeof(struct hinic_sq_bufdesc) == 16, shift 4 */\n #define HINIC_BUF_DESC_SIZE(nr_descs)\t(SIZE_8BYTES(((u32)nr_descs) << 4))\n \n@@ -476,16 +482,16 @@ static inline bool hinic_is_tso_sge_valid(struct rte_mbuf *mbuf,\n hinic_set_l4_csum_info(struct hinic_sq_task *task,\n \t\tu32 *queue_info, struct hinic_tx_offload_info *poff_info)\n {\n-\tu32 tcp_udp_cs, sctp;\n+\tu32 tcp_udp_cs, sctp = 0;\n \tu16 l2hdr_len;\n \n-\tsctp = 0;\n \tif (unlikely(poff_info->inner_l4_type == SCTP_OFFLOAD_ENABLE))\n \t\tsctp = 1;\n \n \ttcp_udp_cs = poff_info->inner_l4_tcp_udp;\n \n-\tif (poff_info->tunnel_type == TUNNEL_UDP_NO_CSUM) {\n+\tif (poff_info->tunnel_type == TUNNEL_UDP_CSUM ||\n+\t poff_info->tunnel_type == TUNNEL_UDP_NO_CSUM) {\n \t\tl2hdr_len = poff_info->outer_l2_len;\n \n \t\ttask->pkt_info2 |=\n@@ -665,50 +671,6 @@ static inline void hinic_xmit_mbuf_cleanup(struct hinic_txq *txq)\n \treturn (struct hinic_sq_wqe *)WQ_WQE_ADDR(wq, cur_pi);\n }\n \n-static inline int\n-hinic_validate_tx_offload(const struct rte_mbuf *m)\n-{\n-\tuint64_t ol_flags = m->ol_flags;\n-\tuint64_t inner_l3_offset = m->l2_len;\n-\n-\t/* just support vxlan offload */\n-\tif ((ol_flags & PKT_TX_TUNNEL_MASK) &&\n-\t !(ol_flags & PKT_TX_TUNNEL_VXLAN))\n-\t\treturn -ENOTSUP;\n-\n-\tif (ol_flags & PKT_TX_OUTER_IP_CKSUM)\n-\t\tinner_l3_offset += m->outer_l2_len + m->outer_l3_len;\n-\n-\t/* Headers are fragmented */\n-\tif (rte_pktmbuf_data_len(m) < inner_l3_offset + m->l3_len + m->l4_len)\n-\t\treturn -ENOTSUP;\n-\n-\t/* IP checksum can be counted only for IPv4 packet */\n-\tif ((ol_flags & PKT_TX_IP_CKSUM) && (ol_flags & PKT_TX_IPV6))\n-\t\treturn -EINVAL;\n-\n-\t/* IP type not set when required */\n-\tif (ol_flags & (PKT_TX_L4_MASK | PKT_TX_TCP_SEG)) {\n-\t\tif (!(ol_flags & (PKT_TX_IPV4 | PKT_TX_IPV6)))\n-\t\t\treturn -EINVAL;\n-\t}\n-\n-\t/* Check requirements for TSO packet */\n-\tif (ol_flags & PKT_TX_TCP_SEG) {\n-\t\tif (m->tso_segsz == 0 ||\n-\t\t\t((ol_flags & PKT_TX_IPV4) &&\n-\t\t\t!(ol_flags & PKT_TX_IP_CKSUM)))\n-\t\t\treturn -EINVAL;\n-\t}\n-\n-\t/* PKT_TX_OUTER_IP_CKSUM set for non outer IPv4 packet. */\n-\tif ((ol_flags & PKT_TX_OUTER_IP_CKSUM) &&\n-\t\t!(ol_flags & PKT_TX_OUTER_IPV4))\n-\t\treturn -EINVAL;\n-\n-\treturn 0;\n-}\n-\n static inline uint16_t\n hinic_ipv4_phdr_cksum(const struct rte_ipv4_hdr *ipv4_hdr, uint64_t ol_flags)\n {\n@@ -760,6 +722,65 @@ static inline void hinic_xmit_mbuf_cleanup(struct hinic_txq *txq)\n \treturn __rte_raw_cksum_reduce(sum);\n }\n \n+static inline void\n+hinic_get_pld_offset(struct rte_mbuf *m, struct hinic_tx_offload_info *off_info,\n+\t\t int outer_cs_flag)\n+{\n+\tuint64_t ol_flags = m->ol_flags;\n+\n+\tif (outer_cs_flag == 1) {\n+\t\tif ((ol_flags & PKT_TX_UDP_CKSUM) == PKT_TX_UDP_CKSUM) {\n+\t\t\toff_info->payload_offset = m->outer_l2_len +\n+\t\t\t\tm->outer_l3_len + m->l2_len + m->l3_len;\n+\t\t} else if ((ol_flags & PKT_TX_TCP_CKSUM) ||\n+\t\t\t\t(ol_flags & PKT_TX_TCP_SEG)) {\n+\t\t\toff_info->payload_offset = m->outer_l2_len +\n+\t\t\t\t\tm->outer_l3_len + m->l2_len +\n+\t\t\t\t\tm->l3_len + m->l4_len;\n+\t\t}\n+\t} else {\n+\t\tif ((ol_flags & PKT_TX_UDP_CKSUM) == PKT_TX_UDP_CKSUM) {\n+\t\t\toff_info->payload_offset = m->l2_len + m->l3_len;\n+\t\t} else if ((ol_flags & PKT_TX_TCP_CKSUM) ||\n+\t\t\t(ol_flags & PKT_TX_TCP_SEG)) {\n+\t\t\toff_info->payload_offset = m->l2_len + m->l3_len +\n+\t\t\t\t\t\t m->l4_len;\n+\t\t}\n+\t}\n+}\n+\n+static inline void\n+hinic_analyze_tx_info(struct rte_mbuf *mbuf,\n+\t\t struct hinic_tx_offload_info *off_info)\n+{\n+\tstruct rte_ether_hdr *eth_hdr;\n+\tstruct rte_vlan_hdr *vlan_hdr;\n+\tstruct rte_ipv4_hdr *ip4h;\n+\tu16 pkt_type;\n+\tu8 *hdr;\n+\n+\thdr = (u8 *)rte_pktmbuf_mtod(mbuf, u8*);\n+\teth_hdr = (struct rte_ether_hdr *)hdr;\n+\tpkt_type = rte_be_to_cpu_16(eth_hdr->ether_type);\n+\n+\tif (pkt_type == RTE_ETHER_TYPE_VLAN) {\n+\t\toff_info->outer_l2_len = ETHER_LEN_WITH_VLAN;\n+\t\tvlan_hdr = (struct rte_vlan_hdr *)(hdr + 1);\n+\t\tpkt_type = rte_be_to_cpu_16(vlan_hdr->eth_proto);\n+\t} else {\n+\t\toff_info->outer_l2_len = ETHER_LEN_NO_VLAN;\n+\t}\n+\n+\tif (pkt_type == RTE_ETHER_TYPE_IPV4) {\n+\t\tip4h = (struct rte_ipv4_hdr *)(hdr + off_info->outer_l2_len);\n+\t\toff_info->outer_l3_len = (ip4h->version_ihl & 0xf) <<\n+\t\t\t\t\tHEADER_LEN_OFFSET;\n+\t} else if (pkt_type == RTE_ETHER_TYPE_IPV6) {\n+\t\t/* not support ipv6 extension header */\n+\t\toff_info->outer_l3_len = sizeof(struct rte_ipv6_hdr);\n+\t}\n+}\n+\n static inline int\n hinic_tx_offload_pkt_prepare(struct rte_mbuf *m,\n \t\t\t\tstruct hinic_tx_offload_info *off_info)\n@@ -771,42 +792,66 @@ static inline void hinic_xmit_mbuf_cleanup(struct hinic_txq *txq)\n \tstruct rte_ether_hdr *eth_hdr;\n \tstruct rte_vlan_hdr *vlan_hdr;\n \tu16 eth_type = 0;\n-\tuint64_t inner_l3_offset = m->l2_len;\n+\tuint64_t inner_l3_offset;\n \tuint64_t ol_flags = m->ol_flags;\n \n-\t/* Does packet set any of available offloads */\n+\t/* Check if the packets set available offload flags */\n \tif (!(ol_flags & HINIC_TX_CKSUM_OFFLOAD_MASK))\n \t\treturn 0;\n \n-\tif (unlikely(hinic_validate_tx_offload(m)))\n+\t/* Support only vxlan offload */\n+\tif ((ol_flags & PKT_TX_TUNNEL_MASK) &&\n+\t !(ol_flags & PKT_TX_TUNNEL_VXLAN))\n+\t\treturn -ENOTSUP;\n+\n+#ifdef RTE_LIBRTE_ETHDEV_DEBUG\n+\tif (rte_validate_tx_offload(m) != 0)\n \t\treturn -EINVAL;\n+#endif\n \n-\tif ((ol_flags & PKT_TX_OUTER_IP_CKSUM) ||\n-\t\t\t(ol_flags & PKT_TX_OUTER_IPV6) ||\n-\t\t\t(ol_flags & PKT_TX_TUNNEL_VXLAN)) {\n-\t\tinner_l3_offset += m->outer_l2_len + m->outer_l3_len;\n-\t\toff_info->outer_l2_len = m->outer_l2_len;\n-\t\toff_info->outer_l3_len = m->outer_l3_len;\n-\t\t/* just support vxlan tunneling pkt */\n-\t\toff_info->inner_l2_len = m->l2_len - VXLANLEN -\n-\t\t\t\t\t\tsizeof(struct rte_udp_hdr);\n-\t\toff_info->inner_l3_len = m->l3_len;\n-\t\toff_info->inner_l4_len = m->l4_len;\n-\t\toff_info->tunnel_length = m->l2_len;\n-\t\toff_info->payload_offset = m->outer_l2_len +\n-\t\t\t\tm->outer_l3_len + m->l2_len + m->l3_len;\n-\t\toff_info->tunnel_type = TUNNEL_UDP_NO_CSUM;\n+\tif (ol_flags & PKT_TX_TUNNEL_VXLAN) {\n+\t\tif ((ol_flags & PKT_TX_OUTER_IP_CKSUM) ||\n+\t\t (ol_flags & PKT_TX_OUTER_IPV6)) {\n+\t\t\tinner_l3_offset = m->l2_len + m->outer_l2_len +\n+\t\t\t\tm->outer_l3_len;\n+\t\t\toff_info->outer_l2_len = m->outer_l2_len;\n+\t\t\toff_info->outer_l3_len = m->outer_l3_len;\n+\t\t\t/* just support vxlan tunneling pkt */\n+\t\t\toff_info->inner_l2_len = m->l2_len - VXLANLEN -\n+\t\t\t\tsizeof(*udp_hdr);\n+\t\t\toff_info->inner_l3_len = m->l3_len;\n+\t\t\toff_info->inner_l4_len = m->l4_len;\n+\t\t\toff_info->tunnel_length = m->l2_len;\n+\t\t\toff_info->tunnel_type = TUNNEL_UDP_NO_CSUM;\n+\n+\t\t\thinic_get_pld_offset(m, off_info,\n+\t\t\t\t\t HINIC_TX_OUTER_CHECKSUM_FLAG_SET);\n+\t\t} else {\n+\t\t\tinner_l3_offset = m->l2_len;\n+\t\t\thinic_analyze_tx_info(m, off_info);\n+\t\t\t/* just support vxlan tunneling pkt */\n+\t\t\toff_info->inner_l2_len = m->l2_len - VXLANLEN -\n+\t\t\t\tsizeof(*udp_hdr) - off_info->outer_l2_len -\n+\t\t\t\toff_info->outer_l3_len;\n+\t\t\toff_info->inner_l3_len = m->l3_len;\n+\t\t\toff_info->inner_l4_len = m->l4_len;\n+\t\t\toff_info->tunnel_length = m->l2_len -\n+\t\t\t\toff_info->outer_l2_len - off_info->outer_l3_len;\n+\t\t\toff_info->tunnel_type = TUNNEL_UDP_NO_CSUM;\n+\n+\t\t\thinic_get_pld_offset(m, off_info,\n+\t\t\t\tHINIC_TX_OUTER_CHECKSUM_FLAG_NO_SET);\n+\t\t}\n \t} else {\n+\t\tinner_l3_offset = m->l2_len;\n \t\toff_info->inner_l2_len = m->l2_len;\n \t\toff_info->inner_l3_len = m->l3_len;\n \t\toff_info->inner_l4_len = m->l4_len;\n \t\toff_info->tunnel_type = NOT_TUNNEL;\n-\t\toff_info->payload_offset = m->l2_len + m->l3_len;\n-\t}\n \n-\tif (((ol_flags & PKT_TX_L4_MASK) != PKT_TX_SCTP_CKSUM) &&\n-\t ((ol_flags & PKT_TX_L4_MASK) != PKT_TX_UDP_CKSUM))\n-\t\toff_info->payload_offset += m->l4_len;\n+\t\thinic_get_pld_offset(m, off_info,\n+\t\t\t\t HINIC_TX_OUTER_CHECKSUM_FLAG_NO_SET);\n+\t}\n \n \t/* invalid udp or tcp header */\n \tif (unlikely(off_info->payload_offset > MAX_PLD_OFFSET))\n@@ -855,6 +900,10 @@ static inline void hinic_xmit_mbuf_cleanup(struct hinic_txq *txq)\n \t\t\tudp_hdr->dgram_cksum =\n \t\t\t\thinic_ipv6_phdr_cksum(ipv6_hdr, ol_flags);\n \t\t}\n+\t} else if (ol_flags & PKT_TX_OUTER_IPV4) {\n+\t\toff_info->tunnel_type = TUNNEL_UDP_NO_CSUM;\n+\t\toff_info->inner_l4_tcp_udp = 1;\n+\t\toff_info->outer_l3_type = IPV4_PKT_NO_CHKSUM_OFFLOAD;\n \t}\n \n \tif (ol_flags & PKT_TX_IPV4)\n@@ -892,7 +941,6 @@ static inline void hinic_xmit_mbuf_cleanup(struct hinic_txq *txq)\n \n \t\toff_info->inner_l4_type = UDP_OFFLOAD_ENABLE;\n \t\toff_info->inner_l4_tcp_udp = 1;\n-\t\toff_info->inner_l4_len = sizeof(struct rte_udp_hdr);\n \t} else if (((ol_flags & PKT_TX_L4_MASK) == PKT_TX_TCP_CKSUM) ||\n \t\t\t(ol_flags & PKT_TX_TCP_SEG)) {\n \t\tif (ol_flags & PKT_TX_IPV4) {\n", "prefixes": [ "v3", "14/19" ] }