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GET /api/patches/60190/?format=api
{ "id": 60190, "url": "http://patches.dpdk.org/api/patches/60190/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/b38e0819433bfb160d281d582849dec80c9654d0.1569850827.git.cloud.wangxiaoyun@huawei.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<b38e0819433bfb160d281d582849dec80c9654d0.1569850827.git.cloud.wangxiaoyun@huawei.com>", "list_archive_url": "https://inbox.dpdk.org/dev/b38e0819433bfb160d281d582849dec80c9654d0.1569850827.git.cloud.wangxiaoyun@huawei.com", "date": "2019-09-30T14:00:41", "name": "[v3,03/19] net/hinic: add VF PMD operation interfaces", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "ce39e73240827ee3136ca8375f2322a0fb9c11cf", "submitter": { "id": 1446, "url": "http://patches.dpdk.org/api/people/1446/?format=api", "name": "Wangxiaoyun (Cloud)", "email": "cloud.wangxiaoyun@huawei.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/b38e0819433bfb160d281d582849dec80c9654d0.1569850827.git.cloud.wangxiaoyun@huawei.com/mbox/", "series": [ { "id": 6622, "url": "http://patches.dpdk.org/api/series/6622/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=6622", "date": "2019-09-30T14:00:38", "name": "Add advanced features for Huawei hinic pmd", "version": 3, "mbox": "http://patches.dpdk.org/series/6622/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/60190/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/60190/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 939481B948;\n\tMon, 30 Sep 2019 15:46:59 +0200 (CEST)", "from huawei.com (szxga07-in.huawei.com [45.249.212.35])\n\tby dpdk.org (Postfix) with ESMTP id 1C22A5B32\n\tfor <dev@dpdk.org>; Mon, 30 Sep 2019 15:46:58 +0200 (CEST)", "from DGGEMS413-HUB.china.huawei.com (unknown [172.30.72.58])\n\tby Forcepoint Email with ESMTP id B9683FCDCF90B4443ECB\n\tfor <dev@dpdk.org>; Mon, 30 Sep 2019 21:46:56 +0800 (CST)", "from tester.localdomain (10.175.119.39) by\n\tDGGEMS413-HUB.china.huawei.com (10.3.19.213) with Microsoft SMTP\n\tServer id 14.3.439.0; Mon, 30 Sep 2019 21:46:47 +0800" ], "From": "Xiaoyun wang <cloud.wangxiaoyun@huawei.com>", "To": "<ferruh.yigit@intel.com>", "CC": "<dev@dpdk.org>, <xuanziyang2@huawei.com>, <shahar.belkar@huawei.com>,\n\t<luoxianjun@huawei.com>, <tanya.brokhman@huawei.com>,\n\t<zhouguoyang@huawei.com>, <wulike1@huawei.com>, Xiaoyun wang\n\t<cloud.wangxiaoyun@huawei.com>", "Date": "Mon, 30 Sep 2019 22:00:41 +0800", "Message-ID": "<b38e0819433bfb160d281d582849dec80c9654d0.1569850827.git.cloud.wangxiaoyun@huawei.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<cover.1569850826.git.cloud.wangxiaoyun@huawei.com>", "References": "<cover.1569850826.git.cloud.wangxiaoyun@huawei.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.175.119.39]", "X-CFilter-Loop": "Reflected", "Subject": "[dpdk-dev] [PATCH v3 03/19] net/hinic: add VF PMD operation\n\tinterfaces", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds VF PMD operation interfaces to support SR-IOV.\n\nSigned-off-by: Xiaoyun wang <cloud.wangxiaoyun@huawei.com>\n---\n drivers/net/hinic/base/hinic_pmd_niccfg.c | 35 ++++\n drivers/net/hinic/base/hinic_pmd_niccfg.h | 14 ++\n drivers/net/hinic/hinic_pmd_ethdev.c | 255 ++++++++++++++++++++----------\n 3 files changed, 223 insertions(+), 81 deletions(-)", "diff": "diff --git a/drivers/net/hinic/base/hinic_pmd_niccfg.c b/drivers/net/hinic/base/hinic_pmd_niccfg.c\nindex d3bbc3d..0a20ade 100644\n--- a/drivers/net/hinic/base/hinic_pmd_niccfg.c\n+++ b/drivers/net/hinic/base/hinic_pmd_niccfg.c\n@@ -1436,3 +1436,38 @@ int hinic_flush_qp_res(void *hwdev)\n \n \treturn 0;\n }\n+\n+/**\n+ * hinic_vf_get_default_cos - Get default cos of VF.\n+ *\n+ * @param hwdev\n+ * The hardware interface of a nic device.\n+ * @param cos_id\n+ * Cos value.\n+ *\n+ * @return\n+ * 0 on success.\n+ * negative error value otherwise.\n+ */\n+int hinic_vf_get_default_cos(struct hinic_hwdev *hwdev, u8 *cos_id)\n+{\n+\tstruct hinic_vf_default_cos vf_cos;\n+\tu16 out_size = sizeof(vf_cos);\n+\tint err;\n+\n+\tmemset(&vf_cos, 0, sizeof(vf_cos));\n+\tvf_cos.mgmt_msg_head.resp_aeq_num = HINIC_AEQ1;\n+\n+\terr = hinic_msg_to_mgmt_sync(hwdev, HINIC_MOD_L2NIC,\n+\t\t\t\t HINIC_PORT_CMD_GET_VF_COS, &vf_cos,\n+\t\t\t\t sizeof(vf_cos), &vf_cos,\n+\t\t\t\t &out_size, 0);\n+\tif (err || !out_size || vf_cos.mgmt_msg_head.status) {\n+\t\tPMD_DRV_LOG(ERR, \"Get VF default cos failed, err: %d, status: 0x%x, out size: 0x%x\",\n+\t\t\terr, vf_cos.mgmt_msg_head.status, out_size);\n+\t\treturn -EFAULT;\n+\t}\n+\t*cos_id = vf_cos.state.default_cos;\n+\n+\treturn 0;\n+}\ndiff --git a/drivers/net/hinic/base/hinic_pmd_niccfg.h b/drivers/net/hinic/base/hinic_pmd_niccfg.h\nindex dcb9602..94371bb 100644\n--- a/drivers/net/hinic/base/hinic_pmd_niccfg.h\n+++ b/drivers/net/hinic/base/hinic_pmd_niccfg.h\n@@ -562,6 +562,18 @@ struct hinic_clear_qp_resource {\n \tu16\trsvd1;\n };\n \n+struct hinic_dcb_state {\n+\tu8 dcb_on;\n+\tu8 default_cos;\n+\tu8 up_cos[8];\n+};\n+\n+struct hinic_vf_default_cos {\n+\tstruct hinic_mgmt_msg_head mgmt_msg_head;\n+\n+\tstruct hinic_dcb_state state;\n+};\n+\n /* set physical port Anti-Attack rate */\n struct hinic_port_anti_attack_rate {\n \tstruct hinic_mgmt_msg_head mgmt_msg_head;\n@@ -659,4 +671,6 @@ int hinic_set_link_status_follow(void *hwdev,\n \n void hinic_vf_func_free(struct hinic_hwdev *hwdev);\n \n+int hinic_vf_get_default_cos(struct hinic_hwdev *hwdev, u8 *cos_id);\n+\n #endif /* _HINIC_PMD_NICCFG_H_ */\ndiff --git a/drivers/net/hinic/hinic_pmd_ethdev.c b/drivers/net/hinic/hinic_pmd_ethdev.c\nindex c9a400e..2f413e3 100644\n--- a/drivers/net/hinic/hinic_pmd_ethdev.c\n+++ b/drivers/net/hinic/hinic_pmd_ethdev.c\n@@ -20,6 +20,7 @@\n #include \"base/hinic_pmd_cmdq.h\"\n #include \"base/hinic_pmd_niccfg.h\"\n #include \"base/hinic_pmd_nicio.h\"\n+#include \"base/hinic_pmd_mbox.h\"\n #include \"hinic_pmd_ethdev.h\"\n #include \"hinic_pmd_tx.h\"\n #include \"hinic_pmd_rx.h\"\n@@ -29,13 +30,21 @@\n \n /* Hinic devices */\n #define HINIC_DEV_ID_PRD\t\t0x1822\n+#define HINIC_DEV_ID_VF\t\t\t0x375E\n+#define HINIC_DEV_ID_VF_HV\t\t0x379E\n+\n+/* Mezz card for Blade Server */\n #define HINIC_DEV_ID_MEZZ_25GE\t\t0x0210\n #define HINIC_DEV_ID_MEZZ_40GE\t\t0x020D\n #define HINIC_DEV_ID_MEZZ_100GE\t\t0x0205\n \n+/* 2*25G and 2*100G card */\n+#define HINIC_DEV_ID_1822_DUAL_25GE\t0x0206\n+#define HINIC_DEV_ID_1822_100GE\t\t0x0200\n+\n #define HINIC_SERVICE_MODE_NIC\t\t2\n \n-#define HINIC_INTR_CB_UNREG_MAX_RETRIES\t\t10\n+#define HINIC_INTR_CB_UNREG_MAX_RETRIES\t10\n \n #define DEFAULT_BASE_COS\t\t4\n #define NR_MAX_COS\t\t\t8\n@@ -43,7 +52,7 @@\n #define HINIC_MIN_RX_BUF_SIZE\t\t1024\n #define HINIC_MAX_MAC_ADDRS\t\t1\n \n-/** Driver-specific log messages type. */\n+/* Driver-specific log messages type */\n int hinic_logtype;\n \n struct hinic_xstats_name_off {\n@@ -197,10 +206,16 @@ struct hinic_xstats_name_off {\n \n static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)\n {\n-\treturn (HINIC_VPORT_XSTATS_NUM +\n-\t\tHINIC_PHYPORT_XSTATS_NUM +\n-\t\tHINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +\n-\t\tHINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);\n+\tif (HINIC_IS_VF(nic_dev->hwdev)) {\n+\t\treturn (HINIC_VPORT_XSTATS_NUM +\n+\t\t\tHINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +\n+\t\t\tHINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);\n+\t} else {\n+\t\treturn (HINIC_VPORT_XSTATS_NUM +\n+\t\t\tHINIC_PHYPORT_XSTATS_NUM +\n+\t\t\tHINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +\n+\t\t\tHINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);\n+\t}\n }\n \n static const struct rte_eth_desc_lim hinic_rx_desc_lim = {\n@@ -599,7 +614,7 @@ static void hinic_reset_tx_queue(struct rte_eth_dev *dev)\n \t\ttxq->wq->delta = txq->q_depth;\n \t\ttxq->wq->mask = txq->q_depth - 1;\n \n-\t\t/*clear hardware ci*/\n+\t\t/* clear hardware ci */\n \t\tci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,\n \t\t\t\t\t\t\tq_id);\n \t\t*ci_addr = 0;\n@@ -888,6 +903,9 @@ static int hinic_dev_start(struct rte_eth_dev *dev)\n \t\tgoto cfg_rxtx_fail;\n \t}\n \n+\t/* reactive pf status, so that uP report asyn event */\n+\thinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);\n+\n \t/* open virtual port and ready to start packet receiving */\n \trc = hinic_set_vport_enable(nic_dev->hwdev, true);\n \tif (rc) {\n@@ -915,6 +933,8 @@ static int hinic_dev_start(struct rte_eth_dev *dev)\n \t(void)hinic_set_vport_enable(nic_dev->hwdev, false);\n \n en_vport_fail:\n+\thinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);\n+\n \t/* Flush tx && rx chip resources in case of set vport fake fail */\n \t(void)hinic_flush_qp_res(nic_dev->hwdev);\n \trte_delay_ms(100);\n@@ -1233,7 +1253,7 @@ static int hinic_dev_stats_reset(struct rte_eth_dev *dev)\n *\n * @param dev\n * Pointer to Ethernet device structure.\n- **/\n+ */\n static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)\n {\n \tstruct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);\n@@ -1697,6 +1717,9 @@ static int hinic_dev_xstats_get(struct rte_eth_dev *dev,\n \t\tcount++;\n \t}\n \n+\tif (HINIC_IS_VF(nic_dev->hwdev))\n+\t\treturn count;\n+\n \t/* Get stats from hinic_phy_port_stats */\n \terr = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);\n \tif (err)\n@@ -1765,6 +1788,9 @@ static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,\n \t\tcount++;\n \t}\n \n+\tif (HINIC_IS_VF(nic_dev->hwdev))\n+\t\treturn count;\n+\n \t/* get phy port stats */\n \tfor (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {\n \t\tsnprintf(xstats_names[count].name,\n@@ -1805,18 +1831,39 @@ static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)\n \t\t\t\t\tup_pgid, up_bw, up_strict);\n }\n \n-static void hinic_init_default_cos(struct hinic_nic_dev *nic_dev)\n+static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)\n {\n-\tnic_dev->default_cos =\n-\t\t\t(hinic_global_func_id(nic_dev->hwdev) +\n-\t\t\t DEFAULT_BASE_COS) % NR_MAX_COS;\n+\tu8 cos_id = 0;\n+\tint err;\n+\n+\tif (!HINIC_IS_VF(nic_dev->hwdev)) {\n+\t\tnic_dev->default_cos =\n+\t\t\t\t(hinic_global_func_id(nic_dev->hwdev) +\n+\t\t\t\t\t\tDEFAULT_BASE_COS) % NR_MAX_COS;\n+\t} else {\n+\t\terr = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);\n+\t\tif (err) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Get VF default cos failed, err: %d\",\n+\t\t\t\t\terr);\n+\t\t\treturn HINIC_ERROR;\n+\t\t}\n+\n+\t\tnic_dev->default_cos = cos_id;\n+\t}\n+\n+\treturn 0;\n }\n \n static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)\n {\n \tint err;\n \n-\thinic_init_default_cos(nic_dev);\n+\terr = hinic_init_default_cos(nic_dev);\n+\tif (err)\n+\t\treturn err;\n+\n+\tif (hinic_func_type(nic_dev->hwdev) == TYPE_VF)\n+\t\treturn 0;\n \n \t/* Restore DCB configure to default status */\n \terr = hinic_set_default_dcb_feature(nic_dev);\n@@ -1852,6 +1899,9 @@ static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)\n \tstruct hinic_board_info info = { 0 };\n \tint rc;\n \n+\tif (hinic_func_type(nic_dev->hwdev) == TYPE_VF)\n+\t\treturn 0;\n+\n \trc = hinic_get_board_info(nic_dev->hwdev, &info);\n \tif (rc)\n \t\treturn rc;\n@@ -1867,7 +1917,7 @@ static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)\n \t\tnic_dev->cpy_mpool =\n \t\trte_pktmbuf_pool_create(nic_dev->proc_dev_name,\n \t\t\t\t\tHINIC_COPY_MEMPOOL_DEPTH,\n-\t\t\t\t\tRTE_CACHE_LINE_SIZE, 0,\n+\t\t\t\t\t0, 0,\n \t\t\t\t\tHINIC_COPY_MBUF_SIZE,\n \t\t\t\t\trte_socket_id());\n \t\tif (!nic_dev->cpy_mpool) {\n@@ -1978,6 +2028,14 @@ static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)\n \t\tgoto init_pf_to_mgmt_fail;\n \t}\n \n+\t/* init mailbox */\n+\trc = hinic_comm_func_to_func_init(nic_dev->hwdev);\n+\tif (rc) {\n+\t\tPMD_DRV_LOG(ERR, \"Initialize func_to_func failed, dev_name: %s\",\n+\t\t\t eth_dev->data->name);\n+\t\tgoto init_func_to_func_fail;\n+\t}\n+\n \trc = hinic_card_workmode_check(nic_dev);\n \tif (rc) {\n \t\tPMD_DRV_LOG(ERR, \"Check card workmode failed, dev_name: %s\",\n@@ -2077,6 +2135,9 @@ static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)\n init_cmdq_fail:\n l2nic_reset_fail:\n workmode_check_fail:\n+\thinic_comm_func_to_func_free(nic_dev->hwdev);\n+\n+init_func_to_func_fail:\n \thinic_comm_pf_to_mgmt_free(nic_dev->hwdev);\n \n init_pf_to_mgmt_fail:\n@@ -2110,6 +2171,7 @@ static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)\n \thinic_deinit_nicio(nic_dev->hwdev);\n \thinic_deactivate_hwdev_state(nic_dev->hwdev);\n \thinic_comm_cmdqs_free(nic_dev->hwdev);\n+\thinic_comm_func_to_func_free(nic_dev->hwdev);\n \thinic_comm_pf_to_mgmt_free(nic_dev->hwdev);\n \thinic_comm_aeqs_free(nic_dev->hwdev);\n \tfree_cfg_mgmt(nic_dev->hwdev);\n@@ -2119,6 +2181,93 @@ static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)\n \tnic_dev->hwdev = NULL;\n }\n \n+/**\n+ * DPDK callback to close the device.\n+ *\n+ * @param dev\n+ * Pointer to Ethernet device structure.\n+ */\n+static void hinic_dev_close(struct rte_eth_dev *dev)\n+{\n+\tstruct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);\n+\n+\tif (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {\n+\t\tPMD_DRV_LOG(WARNING, \"Device %s already closed\",\n+\t\t\t dev->data->name);\n+\t\treturn;\n+\t}\n+\n+\t/* stop device first */\n+\thinic_dev_stop(dev);\n+\n+\t/* rx_cqe, rx_info */\n+\thinic_free_all_rx_resources(dev);\n+\n+\t/* tx_info */\n+\thinic_free_all_tx_resources(dev);\n+\n+\t/* free wq, pi_dma_addr */\n+\thinic_free_all_rq(nic_dev);\n+\n+\t/* free wq, db_addr */\n+\thinic_free_all_sq(nic_dev);\n+\n+\t/* deinit mac vlan tbl */\n+\thinic_deinit_mac_addr(dev);\n+\n+\t/* disable hardware and uio interrupt */\n+\thinic_disable_interrupt(dev);\n+\n+\t/* deinit nic hardware device */\n+\thinic_nic_dev_destroy(dev);\n+}\n+\n+static const struct eth_dev_ops hinic_pmd_ops = {\n+\t.dev_configure = hinic_dev_configure,\n+\t.dev_infos_get = hinic_dev_infos_get,\n+\t.rx_queue_setup = hinic_rx_queue_setup,\n+\t.tx_queue_setup = hinic_tx_queue_setup,\n+\t.dev_start = hinic_dev_start,\n+\t.link_update = hinic_link_update,\n+\t.rx_queue_release = hinic_rx_queue_release,\n+\t.tx_queue_release = hinic_tx_queue_release,\n+\t.dev_stop = hinic_dev_stop,\n+\t.dev_close = hinic_dev_close,\n+\t.promiscuous_enable = hinic_dev_promiscuous_enable,\n+\t.promiscuous_disable = hinic_dev_promiscuous_disable,\n+\t.rss_hash_update = hinic_rss_hash_update,\n+\t.rss_hash_conf_get = hinic_rss_conf_get,\n+\t.reta_update = hinic_rss_indirtbl_update,\n+\t.reta_query = hinic_rss_indirtbl_query,\n+\t.stats_get = hinic_dev_stats_get,\n+\t.stats_reset = hinic_dev_stats_reset,\n+\t.xstats_get = hinic_dev_xstats_get,\n+\t.xstats_reset = hinic_dev_xstats_reset,\n+\t.xstats_get_names = hinic_dev_xstats_get_names,\n+};\n+\n+static const struct eth_dev_ops hinic_pmd_vf_ops = {\n+\t.dev_configure = hinic_dev_configure,\n+\t.dev_infos_get = hinic_dev_infos_get,\n+\t.rx_queue_setup = hinic_rx_queue_setup,\n+\t.tx_queue_setup = hinic_tx_queue_setup,\n+\t.dev_start = hinic_dev_start,\n+\t.link_update = hinic_link_update,\n+\t.rx_queue_release = hinic_rx_queue_release,\n+\t.tx_queue_release = hinic_tx_queue_release,\n+\t.dev_stop = hinic_dev_stop,\n+\t.dev_close = hinic_dev_close,\n+\t.rss_hash_update = hinic_rss_hash_update,\n+\t.rss_hash_conf_get = hinic_rss_conf_get,\n+\t.reta_update = hinic_rss_indirtbl_update,\n+\t.reta_query = hinic_rss_indirtbl_query,\n+\t.stats_get = hinic_dev_stats_get,\n+\t.stats_reset = hinic_dev_stats_reset,\n+\t.xstats_get = hinic_dev_xstats_get,\n+\t.xstats_reset = hinic_dev_xstats_reset,\n+\t.xstats_get_names = hinic_dev_xstats_get_names,\n+};\n+\n static int hinic_func_init(struct rte_eth_dev *eth_dev)\n {\n \tstruct rte_pci_device *pci_dev;\n@@ -2173,6 +2322,11 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)\n \t\tgoto create_nic_dev_fail;\n \t}\n \n+\tif (HINIC_IS_VF(nic_dev->hwdev))\n+\t\teth_dev->dev_ops = &hinic_pmd_vf_ops;\n+\telse\n+\t\teth_dev->dev_ops = &hinic_pmd_ops;\n+\n \trc = hinic_init_mac_addr(eth_dev);\n \tif (rc) {\n \t\tPMD_DRV_LOG(ERR, \"Initialize mac table failed, dev_name: %s\",\n@@ -2214,6 +2368,7 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)\n \thinic_deinit_mac_addr(eth_dev);\n \n init_mac_fail:\n+\teth_dev->dev_ops = NULL;\n \thinic_nic_dev_destroy(eth_dev);\n \n create_nic_dev_fail:\n@@ -2226,71 +2381,6 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)\n \treturn rc;\n }\n \n-/**\n- * DPDK callback to close the device.\n- *\n- * @param dev\n- * Pointer to Ethernet device structure.\n- */\n-static void hinic_dev_close(struct rte_eth_dev *dev)\n-{\n-\tstruct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);\n-\n-\tif (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {\n-\t\tPMD_DRV_LOG(WARNING, \"Device %s already closed\",\n-\t\t\t dev->data->name);\n-\t\treturn;\n-\t}\n-\n-\t/* stop device first */\n-\thinic_dev_stop(dev);\n-\n-\t/* rx_cqe, rx_info */\n-\thinic_free_all_rx_resources(dev);\n-\n-\t/* tx_info */\n-\thinic_free_all_tx_resources(dev);\n-\n-\t/* free wq, pi_dma_addr */\n-\thinic_free_all_rq(nic_dev);\n-\n-\t/* free wq, db_addr */\n-\thinic_free_all_sq(nic_dev);\n-\n-\t/* deinit mac vlan tbl */\n-\thinic_deinit_mac_addr(dev);\n-\n-\t/* disable hardware and uio interrupt */\n-\thinic_disable_interrupt(dev);\n-\n-\t/* deinit nic hardware device */\n-\thinic_nic_dev_destroy(dev);\n-}\n-\n-static const struct eth_dev_ops hinic_pmd_ops = {\n-\t.dev_configure = hinic_dev_configure,\n-\t.dev_infos_get = hinic_dev_infos_get,\n-\t.rx_queue_setup = hinic_rx_queue_setup,\n-\t.tx_queue_setup = hinic_tx_queue_setup,\n-\t.dev_start = hinic_dev_start,\n-\t.link_update = hinic_link_update,\n-\t.rx_queue_release = hinic_rx_queue_release,\n-\t.tx_queue_release = hinic_tx_queue_release,\n-\t.dev_stop = hinic_dev_stop,\n-\t.dev_close = hinic_dev_close,\n-\t.promiscuous_enable = hinic_dev_promiscuous_enable,\n-\t.promiscuous_disable = hinic_dev_promiscuous_disable,\n-\t.rss_hash_update = hinic_rss_hash_update,\n-\t.rss_hash_conf_get = hinic_rss_conf_get,\n-\t.reta_update = hinic_rss_indirtbl_update,\n-\t.reta_query = hinic_rss_indirtbl_query,\n-\t.stats_get = hinic_dev_stats_get,\n-\t.stats_reset = hinic_dev_stats_reset,\n-\t.xstats_get = hinic_dev_xstats_get,\n-\t.xstats_reset = hinic_dev_xstats_reset,\n-\t.xstats_get_names = hinic_dev_xstats_get_names,\n-};\n-\n static int hinic_dev_init(struct rte_eth_dev *eth_dev)\n {\n \tstruct rte_pci_device *pci_dev;\n@@ -2303,8 +2393,7 @@ static int hinic_dev_init(struct rte_eth_dev *eth_dev)\n \t\t (rte_eal_process_type() == RTE_PROC_PRIMARY) ?\n \t\t \"primary\" : \"secondary\");\n \n-\t/* rte_eth_dev ops, rx_burst and tx_burst */\n-\teth_dev->dev_ops = &hinic_pmd_ops;\n+\t/* rte_eth_dev rx_burst and tx_burst */\n \teth_dev->rx_pkt_burst = hinic_recv_pkts;\n \teth_dev->tx_pkt_burst = hinic_xmit_pkts;\n \n@@ -2338,6 +2427,10 @@ static int hinic_dev_uninit(struct rte_eth_dev *dev)\n \t{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },\n \t{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_40GE) },\n \t{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },\n+\t{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },\n+\t{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },\n+\t{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },\n+\t{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },\n \t{.vendor_id = 0},\n };\n \n", "prefixes": [ "v3", "03/19" ] }