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{
    "id": 57960,
    "url": "http://patches.dpdk.org/api/patches/57960/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1566817214-26599-1-git-send-email-phil.yang@arm.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1566817214-26599-1-git-send-email-phil.yang@arm.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1566817214-26599-1-git-send-email-phil.yang@arm.com",
    "date": "2019-08-26T11:00:14",
    "name": "[v1] net/memif: optimized with one-way barrier",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "6afc4660d2051ad809d7715f84a31d6ae6bd0ec9",
    "submitter": {
        "id": 833,
        "url": "http://patches.dpdk.org/api/people/833/?format=api",
        "name": "Phil Yang",
        "email": "phil.yang@arm.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1566817214-26599-1-git-send-email-phil.yang@arm.com/mbox/",
    "series": [
        {
            "id": 6120,
            "url": "http://patches.dpdk.org/api/series/6120/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=6120",
            "date": "2019-08-26T11:00:14",
            "name": "[v1] net/memif: optimized with one-way barrier",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/6120/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/57960/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/57960/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 5EFD11C2AC;\n\tMon, 26 Aug 2019 13:00:44 +0200 (CEST)",
            "from foss.arm.com (foss.arm.com [217.140.110.172])\n\tby dpdk.org (Postfix) with ESMTP id 6451C1C2A9\n\tfor <dev@dpdk.org>; Mon, 26 Aug 2019 13:00:42 +0200 (CEST)",
            "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 88C4028;\n\tMon, 26 Aug 2019 04:00:41 -0700 (PDT)",
            "from phil-VirtualBox.shanghai.arm.com (unknown [10.169.108.154])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id\n\tBF7533F718; Mon, 26 Aug 2019 04:00:39 -0700 (PDT)"
        ],
        "From": "Phil Yang <phil.yang@arm.com>",
        "To": "jgrajcia@cisco.com,\n\tdev@dpdk.org",
        "Cc": "thomas@monjalon.net, jerinj@marvell.com, Honnappa.Nagarahalli@arm.com,\n\tdamarion@cisco.com, nd@arm.com",
        "Date": "Mon, 26 Aug 2019 19:00:14 +0800",
        "Message-Id": "<1566817214-26599-1-git-send-email-phil.yang@arm.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "Subject": "[dpdk-dev] [PATCH v1] net/memif:  optimized with one-way barrier",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Using 'rte_mb' to synchronize the shared ring head/tail between producer\nand consumer will stall the pipeline and damage performance on the weak\nmemory model platforms, such like aarch64. Meanwhile update the shared\nring head and tail are observable and ordered between CPUs on IA.\n\nOptimized this full barrier with the one-way barrier can improve the\nthroughput. On aarch64 n1sdp server this patch make testpmd throughput\nboost 2.1%. On Intel E5-2640, testpmd got 3.98% performance gain.\n\nSigned-off-by: Phil Yang <phil.yang@arm.com>\nReviewed-by: Gavin Hu <gavin.hu@arm.com>\n---\n drivers/net/memif/memif.h         |  4 +--\n drivers/net/memif/rte_eth_memif.c | 53 +++++++++++++++++++++------------------\n 2 files changed, 31 insertions(+), 26 deletions(-)",
    "diff": "diff --git a/drivers/net/memif/memif.h b/drivers/net/memif/memif.h\nindex 3948b1f..a4d88c0 100644\n--- a/drivers/net/memif/memif.h\n+++ b/drivers/net/memif/memif.h\n@@ -169,9 +169,9 @@ typedef struct {\n \tuint32_t cookie;\t\t\t/**< MEMIF_COOKIE */\n \tuint16_t flags;\t\t\t\t/**< flags */\n #define MEMIF_RING_FLAG_MASK_INT 1\t\t/**< disable interrupt mode */\n-\tvolatile uint16_t head;\t\t\t/**< pointer to ring buffer head */\n+\tuint16_t head;\t\t\t/**< pointer to ring buffer head */\n \tMEMIF_CACHELINE_ALIGN_MARK(cacheline1);\n-\tvolatile uint16_t tail;\t\t\t/**< pointer to ring buffer tail */\n+\tuint16_t tail;\t\t\t/**< pointer to ring buffer tail */\n \tMEMIF_CACHELINE_ALIGN_MARK(cacheline2);\n \tmemif_desc_t desc[0];\t\t\t/**< buffer descriptors */\n } memif_ring_t;\ndiff --git a/drivers/net/memif/rte_eth_memif.c b/drivers/net/memif/rte_eth_memif.c\nindex a59f809..b1c871e 100644\n--- a/drivers/net/memif/rte_eth_memif.c\n+++ b/drivers/net/memif/rte_eth_memif.c\n@@ -275,8 +275,14 @@ eth_memif_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)\n \tring_size = 1 << mq->log2_ring_size;\n \tmask = ring_size - 1;\n \n-\tcur_slot = (type == MEMIF_RING_S2M) ? mq->last_head : mq->last_tail;\n-\tlast_slot = (type == MEMIF_RING_S2M) ? ring->head : ring->tail;\n+\tif (type == MEMIF_RING_S2M) {\n+\t\tcur_slot = mq->last_head;\n+\t\tlast_slot = __atomic_load_n(&ring->head, __ATOMIC_ACQUIRE);\n+\t} else {\n+\t\tcur_slot = mq->last_tail;\n+\t\tlast_slot = __atomic_load_n(&ring->tail, __ATOMIC_ACQUIRE);\n+\t}\n+\n \tif (cur_slot == last_slot)\n \t\tgoto refill;\n \tn_slots = last_slot - cur_slot;\n@@ -344,8 +350,7 @@ eth_memif_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)\n \n no_free_bufs:\n \tif (type == MEMIF_RING_S2M) {\n-\t\trte_mb();\n-\t\tring->tail = cur_slot;\n+\t\t__atomic_store_n(&ring->tail, cur_slot, __ATOMIC_RELEASE);\n \t\tmq->last_head = cur_slot;\n \t} else {\n \t\tmq->last_tail = cur_slot;\n@@ -353,7 +358,7 @@ eth_memif_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)\n \n refill:\n \tif (type == MEMIF_RING_M2S) {\n-\t\thead = ring->head;\n+\t\thead = __atomic_load_n(&ring->head, __ATOMIC_ACQUIRE);\n \t\tn_slots = ring_size - head + mq->last_tail;\n \n \t\twhile (n_slots--) {\n@@ -361,8 +366,7 @@ eth_memif_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)\n \t\t\td0 = &ring->desc[s0];\n \t\t\td0->length = pmd->run.pkt_buffer_size;\n \t\t}\n-\t\trte_mb();\n-\t\tring->head = head;\n+\t\t__atomic_store_n(&ring->head, head, __ATOMIC_RELEASE);\n \t}\n \n \tmq->n_pkts += n_rx_pkts;\n@@ -398,14 +402,16 @@ eth_memif_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)\n \tring_size = 1 << mq->log2_ring_size;\n \tmask = ring_size - 1;\n \n-\tn_free = ring->tail - mq->last_tail;\n+\tn_free = __atomic_load_n(&ring->tail, __ATOMIC_ACQUIRE) - mq->last_tail;\n \tmq->last_tail += n_free;\n-\tslot = (type == MEMIF_RING_S2M) ? ring->head : ring->tail;\n \n-\tif (type == MEMIF_RING_S2M)\n-\t\tn_free = ring_size - ring->head + mq->last_tail;\n-\telse\n-\t\tn_free = ring->head - ring->tail;\n+\tif (type == MEMIF_RING_S2M) {\n+\t\tslot = __atomic_load_n(&ring->head, __ATOMIC_ACQUIRE);\n+\t\tn_free = ring_size - slot + mq->last_tail;\n+\t} else {\n+\t\tslot = __atomic_load_n(&ring->tail, __ATOMIC_ACQUIRE);\n+\t\tn_free = __atomic_load_n(&ring->head, __ATOMIC_ACQUIRE) - slot;\n+\t}\n \n \twhile (n_tx_pkts < nb_pkts && n_free) {\n \t\tmbuf_head = *bufs++;\n@@ -464,11 +470,10 @@ eth_memif_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)\n \t}\n \n no_free_slots:\n-\trte_mb();\n \tif (type == MEMIF_RING_S2M)\n-\t\tring->head = slot;\n+\t\t__atomic_store_n(&ring->head, slot, __ATOMIC_RELEASE);\n \telse\n-\t\tring->tail = slot;\n+\t\t__atomic_store_n(&ring->tail, slot, __ATOMIC_RELEASE);\n \n \tif ((ring->flags & MEMIF_RING_FLAG_MASK_INT) == 0) {\n \t\ta = 1;\n@@ -611,8 +616,8 @@ memif_init_rings(struct rte_eth_dev *dev)\n \n \tfor (i = 0; i < pmd->run.num_s2m_rings; i++) {\n \t\tring = memif_get_ring(pmd, proc_private, MEMIF_RING_S2M, i);\n-\t\tring->head = 0;\n-\t\tring->tail = 0;\n+\t\t__atomic_store_n(&ring->head, 0, __ATOMIC_RELAXED);\n+\t\t__atomic_store_n(&ring->tail, 0, __ATOMIC_RELAXED);\n \t\tring->cookie = MEMIF_COOKIE;\n \t\tring->flags = 0;\n \t\tfor (j = 0; j < (1 << pmd->run.log2_ring_size); j++) {\n@@ -627,8 +632,8 @@ memif_init_rings(struct rte_eth_dev *dev)\n \n \tfor (i = 0; i < pmd->run.num_m2s_rings; i++) {\n \t\tring = memif_get_ring(pmd, proc_private, MEMIF_RING_M2S, i);\n-\t\tring->head = 0;\n-\t\tring->tail = 0;\n+\t\t__atomic_store_n(&ring->head, 0, __ATOMIC_RELAXED);\n+\t\t__atomic_store_n(&ring->tail, 0, __ATOMIC_RELAXED);\n \t\tring->cookie = MEMIF_COOKIE;\n \t\tring->flags = 0;\n \t\tfor (j = 0; j < (1 << pmd->run.log2_ring_size); j++) {\n@@ -734,8 +739,8 @@ memif_connect(struct rte_eth_dev *dev)\n \t\t\t\tMIF_LOG(ERR, \"Wrong ring\");\n \t\t\t\treturn -1;\n \t\t\t}\n-\t\t\tring->head = 0;\n-\t\t\tring->tail = 0;\n+\t\t\t__atomic_store_n(&ring->head, 0, __ATOMIC_RELAXED);\n+\t\t\t__atomic_store_n(&ring->tail, 0, __ATOMIC_RELAXED);\n \t\t\tmq->last_head = 0;\n \t\t\tmq->last_tail = 0;\n \t\t\t/* enable polling mode */\n@@ -750,8 +755,8 @@ memif_connect(struct rte_eth_dev *dev)\n \t\t\t\tMIF_LOG(ERR, \"Wrong ring\");\n \t\t\t\treturn -1;\n \t\t\t}\n-\t\t\tring->head = 0;\n-\t\t\tring->tail = 0;\n+\t\t\t__atomic_store_n(&ring->head, 0, __ATOMIC_RELAXED);\n+\t\t\t__atomic_store_n(&ring->tail, 0, __ATOMIC_RELAXED);\n \t\t\tmq->last_head = 0;\n \t\t\tmq->last_tail = 0;\n \t\t\t/* enable polling mode */\n",
    "prefixes": [
        "v1"
    ]
}