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GET /api/patches/57021/?format=api
{ "id": 57021, "url": "http://patches.dpdk.org/api/patches/57021/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1563973146-16577-4-git-send-email-arybchenko@solarflare.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1563973146-16577-4-git-send-email-arybchenko@solarflare.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1563973146-16577-4-git-send-email-arybchenko@solarflare.com", "date": "2019-07-24T12:59:06", "name": "[3/3] net/sfc: unify power of 2 alignment check macro", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "84c13363e502982cd8d9c251c23b23b481807a02", "submitter": { "id": 607, "url": "http://patches.dpdk.org/api/people/607/?format=api", "name": "Andrew Rybchenko", "email": "arybchenko@solarflare.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1563973146-16577-4-git-send-email-arybchenko@solarflare.com/mbox/", "series": [ { "id": 5704, "url": "http://patches.dpdk.org/api/series/5704/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5704", "date": "2019-07-24T12:59:03", "name": "net/sfc: fix power of 2 alignment macros", "version": 1, "mbox": "http://patches.dpdk.org/series/5704/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/57021/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/57021/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 09F651C1F2;\n\tWed, 24 Jul 2019 14:59:32 +0200 (CEST)", "from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com\n\t[148.163.129.52]) by dpdk.org (Postfix) with ESMTP id 0BC581C1D0;\n\tWed, 24 Jul 2019 14:59:22 +0200 (CEST)", "from webmail.solarflare.com (webmail.solarflare.com\n\t[12.187.104.26])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby mx1-us2.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id\n\t0CA75A40064; Wed, 24 Jul 2019 12:59:20 +0000 (UTC)", "from ocex03.SolarFlarecom.com (10.20.40.36) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id 15.0.1395.4; Wed, 24 Jul 2019 05:59:16 -0700", "from opal.uk.solarflarecom.com (10.17.10.1) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id\n\t15.0.1395.4 via Frontend Transport; Wed, 24 Jul 2019 05:59:16 -0700", "from ukv-loginhost.uk.solarflarecom.com\n\t(ukv-loginhost.uk.solarflarecom.com [10.17.10.39])\n\tby opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tx6OCxF1x001013; Wed, 24 Jul 2019 13:59:15 +0100", "from ukv-loginhost.uk.solarflarecom.com (localhost [127.0.0.1])\n\tby ukv-loginhost.uk.solarflarecom.com (Postfix) with ESMTP id\n\tB85E71613CB; Wed, 24 Jul 2019 13:59:15 +0100 (BST)" ], "X-Virus-Scanned": "Proofpoint Essentials engine", "From": "Andrew Rybchenko <arybchenko@solarflare.com>", "To": "<dev@dpdk.org>", "CC": "<stable@dpdk.org>", "Date": "Wed, 24 Jul 2019 13:59:06 +0100", "Message-ID": "<1563973146-16577-4-git-send-email-arybchenko@solarflare.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1563973146-16577-1-git-send-email-arybchenko@solarflare.com>", "References": "<1563973146-16577-1-git-send-email-arybchenko@solarflare.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-TM-AS-Product-Ver": "SMEX-12.5.0.1300-8.5.1010-24792.002", "X-TM-AS-Result": "No-1.178100-4.000000-10", "X-TMASE-MatchedRID": "HGvy3W1xOqYkVMQcdgU2qX41AgV24XnfNV9S7O+u3KapUxQxmTD4Ql1Z\n\tyX1veeaJjI6htSLqAVws/31GzKkTsbf0EuHoGRzunFVnNmvv47tLXPA26IG0hN9RlPzeVuQQanE\n\tx6Q9PkPCho5hw7szEX5D+pKew+B5XkLQe3uHqwd2YHemjphKeGweCHewokHM/SObQxqJYOuNsnN\n\tUnNbVtKvxRYvlIka/iq5xoQ6tCQVMO0e7Jo0bskp4CIKY/Hg3AGdQnQSTrKGPEQdG7H66TyKsQd\n\t9qPXhnJtN4e7Xto9X5iNCWzSLoIr4/yfrG9RxmRoVc8c0NSfUvqGc3taHoKneQm1e6xrePWYULw\n\tcetLBFRqKoasPfGPInIDAbxao7edGLgavUiGnSzaQLtLC8aUqEPBvsmCWGHWUWQ7Bol0IqAY5tv\n\tH9Ry2Nw==", "X-TM-AS-User-Approved-Sender": "No", "X-TM-AS-User-Blocked-Sender": "No", "X-TMASE-Result": "10--1.178100-4.000000", "X-TMASE-Version": "SMEX-12.5.0.1300-8.5.1010-24792.002", "X-MDID": "1563973160-Pq0SREBF4KiY", "Subject": "[dpdk-dev] [PATCH 3/3] net/sfc: unify power of 2 alignment check\n\tmacro", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Substitute driver-defined IS_P2ALIGNED() with EFX_IS_P2ALIGNED()\ndefined in libefx.\n\nAdd type argument and cast value and alignment to one specified type.\n\nFixes: e1b944598579 (\"net/sfc: build libefx\")\nCc: stable@dpdk.org\n\nSigned-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\n---\n drivers/net/sfc/base/ef10_rx.c | 4 ++--\n drivers/net/sfc/base/efx.h | 4 ++++\n drivers/net/sfc/efsys.h | 43 +++++++++++++++++++---------------\n 3 files changed, 30 insertions(+), 21 deletions(-)", "diff": "diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c\nindex bb4489bbf..5f5dd3c62 100644\n--- a/drivers/net/sfc/base/ef10_rx.c\n+++ b/drivers/net/sfc/base/ef10_rx.c\n@@ -1119,12 +1119,12 @@ ef10_rx_qcreate(\n \t\t\trc = ENOTSUP;\n \t\t\tgoto fail9;\n \t\t}\n-\t\tif (!IS_P2ALIGNED(es_max_dma_len,\n+\t\tif (!EFX_IS_P2ALIGNED(uint32_t, es_max_dma_len,\n \t\t\t EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) {\n \t\t\trc = EINVAL;\n \t\t\tgoto fail10;\n \t\t}\n-\t\tif (!IS_P2ALIGNED(es_buf_stride,\n+\t\tif (!EFX_IS_P2ALIGNED(uint32_t, es_buf_stride,\n \t\t\t EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) {\n \t\t\trc = EINVAL;\n \t\t\tgoto fail11;\ndiff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h\nindex 6aff68b54..53ddaa987 100644\n--- a/drivers/net/sfc/base/efx.h\n+++ b/drivers/net/sfc/base/efx.h\n@@ -37,6 +37,10 @@ extern \"C\" {\n #define\tEFX_P2ALIGN(_type, _value, _align)\t\\\n \t((_type)(_value) & -(_type)(_align))\n \n+/* Test if value is power of 2 aligned. */\n+#define\tEFX_IS_P2ALIGNED(_type, _value, _align)\t\\\n+\t((((_type)(_value)) & ((_type)(_align) - 1)) == 0)\n+\n /* Return codes */\n \n typedef __success(return == 0) int efx_rc_t;\ndiff --git a/drivers/net/sfc/efsys.h b/drivers/net/sfc/efsys.h\nindex 79fd3c144..eab5479a4 100644\n--- a/drivers/net/sfc/efsys.h\n+++ b/drivers/net/sfc/efsys.h\n@@ -69,13 +69,6 @@ typedef bool boolean_t;\n #define MIN(v1, v2)\t((v1) < (v2) ? (v1) : (v2))\n #endif\n \n-/* There are macros for alignment in DPDK, but we need to make a proper\n- * correspondence here, if we want to re-use them at all\n- */\n-#ifndef IS_P2ALIGNED\n-#define IS_P2ALIGNED(v, a)\t((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0)\n-#endif\n-\n #ifndef ISP2\n #define ISP2(x)\t\t\trte_is_power_of_2(x)\n #endif\n@@ -231,7 +224,8 @@ typedef struct efsys_mem_s {\n \t\tvolatile uint32_t *_addr;\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n-\t\tSFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t)));\t\\\n+\t\tSFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,\t\t\\\n+\t\t\t\t\t sizeof(efx_dword_t)));\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_addr = (volatile uint32_t *)(_base + (_offset));\t\\\n \t\t(_edp)->ed_u32[0] = _addr[0];\t\t\t\t\\\n@@ -248,7 +242,8 @@ typedef struct efsys_mem_s {\n \t\tvolatile uint64_t *_addr;\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n-\t\tSFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t)));\t\\\n+\t\tSFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,\t\t\\\n+\t\t\t\t\t sizeof(efx_qword_t)));\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_addr = (volatile uint64_t *)(_base + (_offset));\t\\\n \t\t(_eqp)->eq_u64[0] = _addr[0];\t\t\t\t\\\n@@ -266,7 +261,8 @@ typedef struct efsys_mem_s {\n \t\tvolatile __m128i *_addr;\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n-\t\tSFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t)));\t\\\n+\t\tSFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,\t\t\\\n+\t\t\t\t\t sizeof(efx_oword_t)));\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_addr = (volatile __m128i *)(_base + (_offset));\t\\\n \t\t(_eop)->eo_u128[0] = _addr[0];\t\t\t\t\\\n@@ -287,7 +283,8 @@ typedef struct efsys_mem_s {\n \t\tvolatile uint32_t *_addr;\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n-\t\tSFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t)));\t\\\n+\t\tSFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,\t\t\\\n+\t\t\t\t\t sizeof(efx_dword_t)));\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\tEFSYS_PROBE2(mem_writed, unsigned int, (_offset),\t\\\n \t\t\t\t\t uint32_t, (_edp)->ed_u32[0]);\t\\\n@@ -304,7 +301,8 @@ typedef struct efsys_mem_s {\n \t\tvolatile uint64_t *_addr;\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n-\t\tSFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t)));\t\\\n+\t\tSFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,\t\t\\\n+\t\t\t\t\t sizeof(efx_qword_t)));\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\tEFSYS_PROBE3(mem_writeq, unsigned int, (_offset),\t\\\n \t\t\t\t\t uint32_t, (_eqp)->eq_u32[1],\t\\\n@@ -322,7 +320,8 @@ typedef struct efsys_mem_s {\n \t\tvolatile __m128i *_addr;\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n-\t\tSFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t)));\t\\\n+\t\tSFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,\t\t\\\n+\t\t\t\t\t sizeof(efx_oword_t)));\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\tEFSYS_PROBE5(mem_writeo, unsigned int, (_offset),\t\\\n@@ -387,7 +386,8 @@ typedef struct efsys_bar_s {\n \t\tvolatile uint32_t *_addr;\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n-\t\tSFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t)));\t\\\n+\t\tSFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,\t\t\\\n+\t\t\t\t\t sizeof(efx_dword_t)));\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n \t\tif (_lock)\t\t\t\t\t\t\\\n \t\t\tSFC_BAR_LOCK(_esbp);\t\t\t\t\\\n@@ -411,7 +411,8 @@ typedef struct efsys_bar_s {\n \t\tvolatile uint64_t *_addr;\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n-\t\tSFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t)));\t\\\n+\t\tSFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,\t\t\\\n+\t\t\t\t\t sizeof(efx_qword_t)));\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\tSFC_BAR_LOCK(_esbp);\t\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n@@ -433,7 +434,8 @@ typedef struct efsys_bar_s {\n \t\tvolatile __m128i *_addr;\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n-\t\tSFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t)));\t\\\n+\t\tSFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,\t\t\\\n+\t\t\t\t\t sizeof(efx_oword_t)));\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n \t\tif (_lock)\t\t\t\t\t\t\\\n@@ -463,7 +465,8 @@ typedef struct efsys_bar_s {\n \t\tvolatile uint32_t *_addr;\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n-\t\tSFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t)));\t\\\n+\t\tSFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,\t\t\\\n+\t\t\t\t\t sizeof(efx_dword_t)));\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n \t\tif (_lock)\t\t\t\t\t\t\\\n@@ -488,7 +491,8 @@ typedef struct efsys_bar_s {\n \t\tvolatile uint64_t *_addr;\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n-\t\tSFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t)));\t\\\n+\t\tSFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,\t\t\\\n+\t\t\t\t\t sizeof(efx_qword_t)));\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\tSFC_BAR_LOCK(_esbp);\t\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n@@ -522,7 +526,8 @@ typedef struct efsys_bar_s {\n \t\tvolatile __m128i *_addr;\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n-\t\tSFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t)));\t\\\n+\t\tSFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset,\t\t\\\n+\t\t\t\t\t sizeof(efx_oword_t)));\t\\\n \t\t\t\t\t\t\t\t\t\\\n \t\t_NOTE(CONSTANTCONDITION);\t\t\t\t\\\n \t\tif (_lock)\t\t\t\t\t\t\\\n", "prefixes": [ "3/3" ] }