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GET /api/patches/56902/?format=api
{ "id": 56902, "url": "http://patches.dpdk.org/api/patches/56902/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1563807145-16577-23-git-send-email-matan@mellanox.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1563807145-16577-23-git-send-email-matan@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1563807145-16577-23-git-send-email-matan@mellanox.com", "date": "2019-07-22T14:52:19", "name": "[v2,22/28] net/mlx5: support LRO with single RxQ object", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "38bbce38c81d043c9f0f5a348a5d2bef31d4d675", "submitter": { "id": 796, "url": "http://patches.dpdk.org/api/people/796/?format=api", "name": "Matan Azrad", "email": "matan@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1563807145-16577-23-git-send-email-matan@mellanox.com/mbox/", "series": [ { "id": 5650, "url": "http://patches.dpdk.org/api/series/5650/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5650", "date": "2019-07-22T14:52:03", "name": "net/mlx5: support LRO", "version": 2, "mbox": "http://patches.dpdk.org/series/5650/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/56902/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/56902/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id C119A1BECD;\n\tMon, 22 Jul 2019 16:53:26 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n\tby dpdk.org (Postfix) with ESMTP id 8B5811BE57\n\tfor <dev@dpdk.org>; Mon, 22 Jul 2019 16:52:33 +0200 (CEST)", "from Internal Mail-Server by MTLPINE2 (envelope-from\n\tmatan@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 22 Jul 2019 17:52:29 +0300", "from pegasus07.mtr.labs.mlnx (pegasus07.mtr.labs.mlnx\n\t[10.210.16.112])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x6MEqRVp012492;\n\tMon, 22 Jul 2019 17:52:29 +0300" ], "From": "Matan Azrad <matan@mellanox.com>", "To": "Ferruh Yigit <ferruh.yigit@intel.com>,\n\tShahaf Shuler <shahafs@mellanox.com>, Yongseok Koh <yskoh@mellanox.com>, \n\tViacheslav Ovsiienko <viacheslavo@mellanox.com>", "Cc": "dev@dpdk.org, Dekel Peled <dekelp@mellanox.com>", "Date": "Mon, 22 Jul 2019 14:52:19 +0000", "Message-Id": "<1563807145-16577-23-git-send-email-matan@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1563807145-16577-1-git-send-email-matan@mellanox.com>", "References": "<1563786795-14027-1-git-send-email-matan@mellanox.com>\n\t<1563807145-16577-1-git-send-email-matan@mellanox.com>", "Subject": "[dpdk-dev] [PATCH v2 22/28] net/mlx5: support LRO with single RxQ\n\tobject", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Dekel Peled <dekelp@mellanox.com>\n\nImplement LRO support using a single RQ object per DPDK RxQ.\n\nSigned-off-by: Dekel Peled <dekelp@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\n---\n drivers/net/mlx5/mlx5_flow.h | 6 ++++++\n drivers/net/mlx5/mlx5_flow_dv.c | 21 +++++++++++++++++++--\n drivers/net/mlx5/mlx5_flow_verbs.c | 3 ++-\n drivers/net/mlx5/mlx5_rxq.c | 10 +++++++++-\n drivers/net/mlx5/mlx5_rxtx.h | 2 +-\n drivers/net/mlx5/mlx5_trigger.c | 11 ++++++++---\n 6 files changed, 45 insertions(+), 8 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex f3c563e..3f96bec 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -70,6 +70,12 @@\n \t(MLX5_FLOW_LAYER_OUTER_L2 | MLX5_FLOW_LAYER_OUTER_L3 | \\\n \t MLX5_FLOW_LAYER_OUTER_L4)\n \n+/* LRO support mask, i.e. flow contains IPv4/IPv6 and TCP. */\n+#define MLX5_FLOW_LAYER_IPV4_LRO \\\n+\t(MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_OUTER_L4_TCP)\n+#define MLX5_FLOW_LAYER_IPV6_LRO \\\n+\t(MLX5_FLOW_LAYER_OUTER_L3_IPV6 | MLX5_FLOW_LAYER_OUTER_L4_TCP)\n+\n /* Tunnel Masks. */\n #define MLX5_FLOW_LAYER_TUNNEL \\\n \t(MLX5_FLOW_LAYER_VXLAN | MLX5_FLOW_LAYER_VXLAN_GPE | \\\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 36696c8..7240d3b 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -62,6 +62,9 @@\n \tuint32_t attr;\n };\n \n+#define MLX5_FLOW_IPV4_LRO (1 << 0)\n+#define MLX5_FLOW_IPV6_LRO (1 << 1)\n+\n /**\n * Initialize flow attributes structure according to flow items' types.\n *\n@@ -5161,13 +5164,27 @@ struct field_modify_info modify_tcp[] = {\n \t\t\t\t\t dv->hash_fields,\n \t\t\t\t\t (*flow->queue),\n \t\t\t\t\t flow->rss.queue_num);\n-\t\t\tif (!hrxq)\n+\t\t\tif (!hrxq) {\n+\t\t\t\tint lro = 0;\n+\n+\t\t\t\tif (mlx5_lro_on(dev)) {\n+\t\t\t\t\tif ((dev_flow->layers &\n+\t\t\t\t\t MLX5_FLOW_LAYER_IPV4_LRO)\n+\t\t\t\t\t == MLX5_FLOW_LAYER_IPV4_LRO)\n+\t\t\t\t\t\tlro = MLX5_FLOW_IPV4_LRO;\n+\t\t\t\t\telse if ((dev_flow->layers &\n+\t\t\t\t\t\t MLX5_FLOW_LAYER_IPV6_LRO)\n+\t\t\t\t\t\t == MLX5_FLOW_LAYER_IPV6_LRO)\n+\t\t\t\t\t\tlro = MLX5_FLOW_IPV6_LRO;\n+\t\t\t\t}\n \t\t\t\thrxq = mlx5_hrxq_new\n \t\t\t\t\t(dev, flow->key, MLX5_RSS_HASH_KEY_LEN,\n \t\t\t\t\t dv->hash_fields, (*flow->queue),\n \t\t\t\t\t flow->rss.queue_num,\n \t\t\t\t\t !!(dev_flow->layers &\n-\t\t\t\t\t MLX5_FLOW_LAYER_TUNNEL));\n+\t\t\t\t\t MLX5_FLOW_LAYER_TUNNEL), lro);\n+\t\t\t}\n+\n \t\t\tif (!hrxq) {\n \t\t\t\trte_flow_error_set\n \t\t\t\t\t(error, rte_errno,\ndiff --git a/drivers/net/mlx5/mlx5_flow_verbs.c b/drivers/net/mlx5/mlx5_flow_verbs.c\nindex b3395b8..bcec3b4 100644\n--- a/drivers/net/mlx5/mlx5_flow_verbs.c\n+++ b/drivers/net/mlx5/mlx5_flow_verbs.c\n@@ -1669,7 +1669,8 @@\n \t\t\t\t\t\t (*flow->queue),\n \t\t\t\t\t\t flow->rss.queue_num,\n \t\t\t\t\t\t !!(dev_flow->layers &\n-\t\t\t\t\t\t MLX5_FLOW_LAYER_TUNNEL));\n+\t\t\t\t\t\t\tMLX5_FLOW_LAYER_TUNNEL),\n+\t\t\t\t\t\t 0);\n \t\t\tif (!hrxq) {\n \t\t\t\trte_flow_error_set\n \t\t\t\t\t(error, rte_errno,\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex 1e09078..b87eecc 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -2030,6 +2030,8 @@ struct mlx5_rxq_ctrl *\n * Number of queues.\n * @param tunnel\n * Tunnel type.\n+ * @param lro\n+ * Flow rule is relevant for LRO, i.e. contains IPv4/IPv6 and TCP.\n *\n * @return\n * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.\n@@ -2039,7 +2041,7 @@ struct mlx5_hrxq *\n \t const uint8_t *rss_key, uint32_t rss_key_len,\n \t uint64_t hash_fields,\n \t const uint16_t *queues, uint32_t queues_n,\n-\t int tunnel __rte_unused)\n+\t int tunnel __rte_unused, int lro)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \tstruct mlx5_hrxq *hrxq;\n@@ -2146,6 +2148,12 @@ struct mlx5_hrxq *\n \t\tif (dev->data->dev_conf.lpbk_mode)\n \t\t\ttir_attr.self_lb_block =\n \t\t\t\t\tMLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;\n+\t\tif (lro) {\n+\t\t\ttir_attr.lro_timeout_period_usecs =\n+\t\t\t\t\tpriv->config.lro.timeout;\n+\t\t\ttir_attr.lro_max_msg_sz = 0xff;\n+\t\t\ttir_attr.lro_enable_mask = lro;\n+\t\t}\n \t\ttir = mlx5_devx_cmd_create_tir(priv->sh->ctx, &tir_attr);\n \t\tif (!tir) {\n \t\t\tDRV_LOG(ERR, \"port %u cannot create DevX TIR\",\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex bd4ae80..ed5f637 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -346,7 +346,7 @@ struct mlx5_hrxq *mlx5_hrxq_new(struct rte_eth_dev *dev,\n \t\t\t\tconst uint8_t *rss_key, uint32_t rss_key_len,\n \t\t\t\tuint64_t hash_fields,\n \t\t\t\tconst uint16_t *queues, uint32_t queues_n,\n-\t\t\t\tint tunnel __rte_unused);\n+\t\t\t\tint tunnel __rte_unused, int lro);\n struct mlx5_hrxq *mlx5_hrxq_get(struct rte_eth_dev *dev,\n \t\t\t\tconst uint8_t *rss_key, uint32_t rss_key_len,\n \t\t\t\tuint64_t hash_fields,\ndiff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c\nindex acd2902..8bc2174 100644\n--- a/drivers/net/mlx5/mlx5_trigger.c\n+++ b/drivers/net/mlx5/mlx5_trigger.c\n@@ -99,6 +99,9 @@\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \tunsigned int i;\n \tint ret = 0;\n+\tunsigned int lro_on = mlx5_lro_on(dev);\n+\tenum mlx5_rxq_obj_type obj_type = lro_on ? MLX5_RXQ_OBJ_TYPE_DEVX_RQ :\n+\t\t\t\t\t\t MLX5_RXQ_OBJ_TYPE_IBV;\n \n \t/* Allocate/reuse/resize mempool for Multi-Packet RQ. */\n \tif (mlx5_mprq_alloc_mp(dev)) {\n@@ -123,11 +126,13 @@\n \t\tret = rxq_alloc_elts(rxq_ctrl);\n \t\tif (ret)\n \t\t\tgoto error;\n-\t\trxq_ctrl->obj = mlx5_rxq_obj_new(dev, i,\n-\t\t\t\t\t\t MLX5_RXQ_OBJ_TYPE_DEVX_RQ);\n+\t\trxq_ctrl->obj = mlx5_rxq_obj_new(dev, i, obj_type);\n \t\tif (!rxq_ctrl->obj)\n \t\t\tgoto error;\n-\t\trxq_ctrl->wqn = rxq_ctrl->obj->wq->wq_num;\n+\t\tif (obj_type == MLX5_RXQ_OBJ_TYPE_IBV)\n+\t\t\trxq_ctrl->wqn = rxq_ctrl->obj->wq->wq_num;\n+\t\telse if (obj_type == MLX5_RXQ_OBJ_TYPE_DEVX_RQ)\n+\t\t\trxq_ctrl->wqn = rxq_ctrl->obj->rq->id;\n \t}\n \treturn 0;\n error:\n", "prefixes": [ "v2", "22/28" ] }