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GET /api/patches/56762/?format=api
{ "id": 56762, "url": "http://patches.dpdk.org/api/patches/56762/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1563558832-65962-1-git-send-email-xiao.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1563558832-65962-1-git-send-email-xiao.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1563558832-65962-1-git-send-email-xiao.zhang@intel.com", "date": "2019-07-19T17:53:52", "name": "net/ice: CVL multi-process support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "ad76983f2fcb8706241a5e053e299e6ab11736d6", "submitter": { "id": 1352, "url": "http://patches.dpdk.org/api/people/1352/?format=api", "name": "Xiao Zhang", "email": "xiao.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1563558832-65962-1-git-send-email-xiao.zhang@intel.com/mbox/", "series": [ { "id": 5618, "url": "http://patches.dpdk.org/api/series/5618/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5618", "date": "2019-07-19T17:53:52", "name": "net/ice: CVL multi-process support", "version": 1, "mbox": "http://patches.dpdk.org/series/5618/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/56762/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/56762/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id EFE812BA8;\n\tFri, 19 Jul 2019 10:58:23 +0200 (CEST)", "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n\tby dpdk.org (Postfix) with ESMTP id DFBDA2082;\n\tFri, 19 Jul 2019 10:58:20 +0200 (CEST)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t19 Jul 2019 01:58:20 -0700", "from npg-dpdk-zhangxiao.sh.intel.com ([10.67.110.190])\n\tby fmsmga001.fm.intel.com with ESMTP; 19 Jul 2019 01:58:18 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.64,281,1559545200\"; d=\"scan'208\";a=\"187959186\"", "From": "Xiao Zhang <xiao.zhang@intel.com>", "To": "dev@dpdk.org", "Cc": "qiming.yang@intel.com, haiyue.wang@intel.com,\n\tXiao Zhang <xiao.zhang@intel.com>, stable@dpdk.org", "Date": "Sat, 20 Jul 2019 01:53:52 +0800", "Message-Id": "<1563558832-65962-1-git-send-email-xiao.zhang@intel.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1563552817-18069-1-git-send-email-xiao.zhang@intel.com>", "References": "<1563552817-18069-1-git-send-email-xiao.zhang@intel.com>", "Subject": "[dpdk-dev] net/ice: CVL multi-process support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add multiple process support for CVL, secondary processes will share\nmemory with primary process, do not need allocation for secondary\nprocesses.\nRestrict configuration ops permission for secondary processes, only\nallow primary process to do configuration ops since secondary processes\nshould not be allowed to do configuration but share from primary process.\n\nCc: stable@dpdk.org\n\nSigned-off-by: Xiao Zhang <xiao.zhang@intel.com>\n---\n drivers/net/ice/ice_ethdev.c | 85 ++++++++++++++++++++++++++++++++++++++++++++\n drivers/net/ice/ice_rxtx.c | 24 +++++++++++++\n 2 files changed, 109 insertions(+)", "diff": "diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex 9ce730c..b2ef21f 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -1408,6 +1408,12 @@ ice_dev_init(struct rte_eth_dev *dev)\n \tdev->tx_pkt_burst = ice_xmit_pkts;\n \tdev->tx_pkt_prepare = ice_prep_pkts;\n \n+\t/* for secondary processes, we don't initialise any further as primary\n+\t * has already done this work.\n+\t */\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\n \tice_set_default_ptype_table(dev);\n \tpci_dev = RTE_DEV_TO_PCI(dev->device);\n \tintr_handle = &pci_dev->intr_handle;\n@@ -1574,6 +1580,9 @@ ice_dev_stop(struct rte_eth_dev *dev)\n \tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n \tuint16_t i;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn;\n+\n \t/* avoid stopping again */\n \tif (pf->adapter_stopped)\n \t\treturn;\n@@ -1610,6 +1619,9 @@ ice_dev_close(struct rte_eth_dev *dev)\n \tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn;\n+\n \t/* Since stop will make link down, then the link event will be\n \t * triggered, disable the irq firstly to avoid the port_infoe etc\n \t * resources deallocation causing the interrupt service thread\n@@ -1638,6 +1650,9 @@ ice_dev_uninit(struct rte_eth_dev *dev)\n \tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tstruct rte_flow *p_flow;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\n \tice_dev_close(dev);\n \n \tdev->dev_ops = NULL;\n@@ -1670,6 +1685,9 @@ ice_dev_configure(__rte_unused struct rte_eth_dev *dev)\n \tstruct ice_adapter *ad =\n \t\tICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \t/* Initialize to TRUE. If any of Rx queues doesn't meet the\n \t * bulk allocation or vector Rx preconditions we will reset it.\n \t */\n@@ -1948,6 +1966,9 @@ ice_dev_start(struct rte_eth_dev *dev)\n \tuint16_t nb_txq, i;\n \tint mask, ret;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \t/* program Tx queues' context in hardware */\n \tfor (nb_txq = 0; nb_txq < data->nb_tx_queues; nb_txq++) {\n \t\tret = ice_tx_queue_start(dev, nb_txq);\n@@ -2031,6 +2052,9 @@ ice_dev_reset(struct rte_eth_dev *dev)\n {\n \tint ret;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tif (dev->data->sriov.active)\n \t\treturn -ENOTSUP;\n \n@@ -2211,6 +2235,9 @@ ice_link_update(struct rte_eth_dev *dev, int wait_to_complete)\n \tunsigned int rep_cnt = MAX_REPEAT_TIME;\n \tbool enable_lse = dev->data->dev_conf.intr_conf.lsc ? true : false;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tmemset(&link, 0, sizeof(link));\n \tmemset(&old, 0, sizeof(old));\n \tmemset(&link_status, 0, sizeof(link_status));\n@@ -2350,6 +2377,8 @@ ice_dev_set_link_up(struct rte_eth_dev *dev)\n {\n \tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n \treturn ice_force_phys_link_state(hw, true);\n }\n \n@@ -2358,6 +2387,8 @@ ice_dev_set_link_down(struct rte_eth_dev *dev)\n {\n \tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n \treturn ice_force_phys_link_state(hw, false);\n }\n \n@@ -2368,6 +2399,9 @@ ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)\n \tstruct rte_eth_dev_data *dev_data = pf->dev_data;\n \tuint32_t frame_size = mtu + ICE_ETH_OVERHEAD;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \t/* check if mtu is within the allowed range */\n \tif (mtu < RTE_ETHER_MIN_MTU || frame_size > ICE_FRAME_SIZE_MAX)\n \t\treturn -EINVAL;\n@@ -2402,6 +2436,9 @@ static int ice_macaddr_set(struct rte_eth_dev *dev,\n \tuint8_t flags = 0;\n \tint ret;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tif (!rte_is_valid_assigned_ether_addr(mac_addr)) {\n \t\tPMD_DRV_LOG(ERR, \"Tried to set invalid MAC address.\");\n \t\treturn -EINVAL;\n@@ -2448,6 +2485,9 @@ ice_macaddr_add(struct rte_eth_dev *dev,\n \tstruct ice_vsi *vsi = pf->main_vsi;\n \tint ret;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tret = ice_add_mac_filter(vsi, mac_addr);\n \tif (ret != ICE_SUCCESS) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to add MAC filter\");\n@@ -2467,6 +2507,9 @@ ice_macaddr_remove(struct rte_eth_dev *dev, uint32_t index)\n \tstruct rte_ether_addr *macaddr;\n \tint ret;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn;\n+\n \tmacaddr = &data->mac_addrs[index];\n \tret = ice_remove_mac_filter(vsi, macaddr);\n \tif (ret) {\n@@ -2484,6 +2527,9 @@ ice_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)\n \n \tPMD_INIT_FUNC_TRACE();\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tif (on) {\n \t\tret = ice_add_vlan_filter(vsi, vlan_id);\n \t\tif (ret < 0) {\n@@ -2602,6 +2648,9 @@ ice_vlan_offload_set(struct rte_eth_dev *dev, int mask)\n \tstruct ice_vsi *vsi = pf->main_vsi;\n \tstruct rte_eth_rxmode *rxmode;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \trxmode = &dev->data->dev_conf.rxmode;\n \tif (mask & ETH_VLAN_FILTER_MASK) {\n \t\tif (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER)\n@@ -2639,6 +2688,9 @@ ice_vlan_tpid_set(struct rte_eth_dev *dev,\n \tint qinq = dev->data->dev_conf.rxmode.offloads &\n \t\t DEV_RX_OFFLOAD_VLAN_EXTEND;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tswitch (vlan_type) {\n \tcase ETH_VLAN_TYPE_OUTER:\n \t\tif (qinq)\n@@ -2749,6 +2801,9 @@ ice_rss_reta_update(struct rte_eth_dev *dev,\n \tuint8_t *lut;\n \tint ret;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tif (reta_size != ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_128 &&\n \t reta_size != ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_512 &&\n \t reta_size != ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_2K) {\n@@ -2891,6 +2946,9 @@ ice_rss_hash_update(struct rte_eth_dev *dev,\n \tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tstruct ice_vsi *vsi = pf->main_vsi;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \t/* set hash key */\n \tstatus = ice_set_rss_key(vsi, rss_conf->rss_key, rss_conf->rss_key_len);\n \tif (status)\n@@ -2924,6 +2982,9 @@ ice_promisc_enable(struct rte_eth_dev *dev)\n \tenum ice_status status;\n \tuint8_t pmask;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn;\n+\n \tpmask = ICE_PROMISC_UCAST_RX | ICE_PROMISC_UCAST_TX |\n \t\tICE_PROMISC_MCAST_RX | ICE_PROMISC_MCAST_TX;\n \n@@ -2943,6 +3004,9 @@ ice_promisc_disable(struct rte_eth_dev *dev)\n \tenum ice_status status;\n \tuint8_t pmask;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn;\n+\n \tpmask = ICE_PROMISC_UCAST_RX | ICE_PROMISC_UCAST_TX |\n \t\tICE_PROMISC_MCAST_RX | ICE_PROMISC_MCAST_TX;\n \n@@ -2960,6 +3024,9 @@ ice_allmulti_enable(struct rte_eth_dev *dev)\n \tenum ice_status status;\n \tuint8_t pmask;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn;\n+\n \tpmask = ICE_PROMISC_MCAST_RX | ICE_PROMISC_MCAST_TX;\n \n \tstatus = ice_set_vsi_promisc(hw, vsi->idx, pmask, 0);\n@@ -2976,6 +3043,9 @@ ice_allmulti_disable(struct rte_eth_dev *dev)\n \tenum ice_status status;\n \tuint8_t pmask;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn;\n+\n \tif (dev->data->promiscuous == 1)\n \t\treturn; /* must remain in all_multicast mode */\n \n@@ -2995,6 +3065,9 @@ static int ice_rx_queue_intr_enable(struct rte_eth_dev *dev,\n \tuint32_t val;\n \tuint16_t msix_intr;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tmsix_intr = intr_handle->intr_vec[queue_id];\n \n \tval = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |\n@@ -3015,6 +3088,9 @@ static int ice_rx_queue_intr_disable(struct rte_eth_dev *dev,\n \tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint16_t msix_intr;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tmsix_intr = intr_handle->intr_vec[queue_id];\n \n \tICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), GLINT_DYN_CTL_WB_ON_ITR_M);\n@@ -3059,6 +3135,9 @@ ice_vsi_vlan_pvid_set(struct ice_vsi *vsi, struct ice_vsi_vlan_pvid_info *info)\n \tuint8_t vlan_flags = 0;\n \tint ret;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tif (!vsi || !info) {\n \t\tPMD_DRV_LOG(ERR, \"invalid parameters\");\n \t\treturn -EINVAL;\n@@ -3113,6 +3192,9 @@ ice_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)\n \tstruct ice_vsi_vlan_pvid_info info;\n \tint ret;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tmemset(&info, 0, sizeof(info));\n \tinfo.on = on;\n \tif (info.on) {\n@@ -3555,6 +3637,9 @@ ice_stats_reset(struct rte_eth_dev *dev)\n \tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn;\n+\n \t/* Mark PF and VSI stats to update the offset, aka \"reset\" */\n \tpf->offset_loaded = false;\n \tif (pf->main_vsi)\ndiff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c\nindex 035ed84..2a8b888 100644\n--- a/drivers/net/ice/ice_rxtx.c\n+++ b/drivers/net/ice/ice_rxtx.c\n@@ -337,6 +337,9 @@ ice_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n \n \tPMD_INIT_FUNC_TRACE();\n \n+\tif (rte_eal_process_type() == RTE_PROC_SECONDARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tif (rx_queue_id >= dev->data->nb_rx_queues) {\n \t\tPMD_DRV_LOG(ERR, \"RX queue %u is out of range %u\",\n \t\t\t rx_queue_id, dev->data->nb_rx_queues);\n@@ -391,6 +394,9 @@ ice_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n \tint err;\n \tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \n+\tif (rte_eal_process_type() == RTE_PROC_SECONDARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tif (rx_queue_id < dev->data->nb_rx_queues) {\n \t\trxq = dev->data->rx_queues[rx_queue_id];\n \n@@ -421,6 +427,9 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n \n \tPMD_INIT_FUNC_TRACE();\n \n+\tif (rte_eal_process_type() == RTE_PROC_SECONDARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tif (tx_queue_id >= dev->data->nb_tx_queues) {\n \t\tPMD_DRV_LOG(ERR, \"TX queue %u is out of range %u\",\n \t\t\t tx_queue_id, dev->data->nb_tx_queues);\n@@ -548,6 +557,9 @@ ice_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n \tuint32_t q_teids[1];\n \tuint16_t q_handle = tx_queue_id;\n \n+\tif (rte_eal_process_type() == RTE_PROC_SECONDARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tif (tx_queue_id >= dev->data->nb_tx_queues) {\n \t\tPMD_DRV_LOG(ERR, \"TX queue %u is out of range %u\",\n \t\t\t tx_queue_id, dev->data->nb_tx_queues);\n@@ -597,6 +609,9 @@ ice_rx_queue_setup(struct rte_eth_dev *dev,\n \tuint16_t len;\n \tint use_def_burst_func = 1;\n \n+\tif (rte_eal_process_type() == RTE_PROC_SECONDARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \tif (nb_desc % ICE_ALIGN_RING_DESC != 0 ||\n \t nb_desc > ICE_MAX_RING_DESC ||\n \t nb_desc < ICE_MIN_RING_DESC) {\n@@ -714,6 +729,9 @@ ice_rx_queue_release(void *rxq)\n {\n \tstruct ice_rx_queue *q = (struct ice_rx_queue *)rxq;\n \n+\tif (rte_eal_process_type() == RTE_PROC_SECONDARY)\n+\t\treturn;\n+\n \tif (!q) {\n \t\tPMD_DRV_LOG(DEBUG, \"Pointer to rxq is NULL\");\n \t\treturn;\n@@ -739,6 +757,9 @@ ice_tx_queue_setup(struct rte_eth_dev *dev,\n \tuint16_t tx_rs_thresh, tx_free_thresh;\n \tuint64_t offloads;\n \n+\tif (rte_eal_process_type() == RTE_PROC_SECONDARY)\n+\t\treturn -E_RTE_SECONDARY;\n+\n \toffloads = tx_conf->offloads | dev->data->dev_conf.txmode.offloads;\n \n \tif (nb_desc % ICE_ALIGN_RING_DESC != 0 ||\n@@ -910,6 +931,9 @@ ice_tx_queue_release(void *txq)\n {\n \tstruct ice_tx_queue *q = (struct ice_tx_queue *)txq;\n \n+\tif (rte_eal_process_type() == RTE_PROC_SECONDARY)\n+\t\treturn;\n+\n \tif (!q) {\n \t\tPMD_DRV_LOG(DEBUG, \"Pointer to TX queue is NULL\");\n \t\treturn;\n", "prefixes": [] }