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GET /api/patches/56334/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 56334,
    "url": "http://patches.dpdk.org/api/patches/56334/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190711102659.59001-10-jasvinder.singh@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190711102659.59001-10-jasvinder.singh@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190711102659.59001-10-jasvinder.singh@intel.com",
    "date": "2019-07-11T10:26:57",
    "name": "[v3,09/11] examples/ip_pipeline: add config flexibility to tm function",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "f234683f821df20b3a9b38ee19ecf7672df09f59",
    "submitter": {
        "id": 285,
        "url": "http://patches.dpdk.org/api/people/285/?format=api",
        "name": "Jasvinder Singh",
        "email": "jasvinder.singh@intel.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190711102659.59001-10-jasvinder.singh@intel.com/mbox/",
    "series": [
        {
            "id": 5451,
            "url": "http://patches.dpdk.org/api/series/5451/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5451",
            "date": "2019-07-11T10:26:48",
            "name": "sched: feature enhancements",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/5451/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/56334/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/56334/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 759CB1BDE0;\n\tThu, 11 Jul 2019 12:27:10 +0200 (CEST)",
            "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n\tby dpdk.org (Postfix) with ESMTP id 17FF41B946\n\tfor <dev@dpdk.org>; Thu, 11 Jul 2019 12:27:02 +0200 (CEST)",
            "from orsmga004.jf.intel.com ([10.7.209.38])\n\tby fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t11 Jul 2019 03:27:02 -0700",
            "from silpixa00381635.ir.intel.com (HELO\n\tsilpixa00381635.ger.corp.intel.com) ([10.237.223.4])\n\tby orsmga004.jf.intel.com with ESMTP; 11 Jul 2019 03:27:01 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.63,478,1557212400\"; d=\"scan'208\";a=\"317641422\"",
        "From": "Jasvinder Singh <jasvinder.singh@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "cristian.dumitrescu@intel.com, Abraham Tovar <abrahamx.tovar@intel.com>, \n\tLukasz Krakowiak <lukaszx.krakowiak@intel.com>",
        "Date": "Thu, 11 Jul 2019 11:26:57 +0100",
        "Message-Id": "<20190711102659.59001-10-jasvinder.singh@intel.com>",
        "X-Mailer": "git-send-email 2.21.0",
        "In-Reply-To": "<20190711102659.59001-1-jasvinder.singh@intel.com>",
        "References": "<20190625153217.24301-2-jasvinder.singh@intel.com>\n\t<20190711102659.59001-1-jasvinder.singh@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH v3 09/11] examples/ip_pipeline: add config\n\tflexibility to tm function",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Update ip pipeline sample app for configuration flexiblity of\npipe traffic classes and queues.\n\nSigned-off-by: Jasvinder Singh <jasvinder.singh@intel.com>\nSigned-off-by: Abraham Tovar <abrahamx.tovar@intel.com>\nSigned-off-by: Lukasz Krakowiak <lukaszx.krakowiak@intel.com>\n---\n examples/ip_pipeline/cli.c             | 45 +++++++++++++++-----------\n examples/ip_pipeline/tmgr.c            |  2 +-\n examples/ip_pipeline/tmgr.h            |  4 +--\n lib/librte_pipeline/rte_table_action.c |  1 -\n lib/librte_pipeline/rte_table_action.h |  4 +--\n 5 files changed, 31 insertions(+), 25 deletions(-)",
    "diff": "diff --git a/examples/ip_pipeline/cli.c b/examples/ip_pipeline/cli.c\nindex 309b2936e..b5e8b9bcf 100644\n--- a/examples/ip_pipeline/cli.c\n+++ b/examples/ip_pipeline/cli.c\n@@ -377,7 +377,9 @@ cmd_swq(char **tokens,\n static const char cmd_tmgr_subport_profile_help[] =\n \"tmgr subport profile\\n\"\n \"   <tb_rate> <tb_size>\\n\"\n-\"   <tc0_rate> <tc1_rate> <tc2_rate> <tc3_rate>\\n\"\n+\"   <tc0_rate> <tc1_rate> <tc2_rate> <tc3_rate> <tc4_rate>\"\n+\"        <tc5_rate> <tc6_rate> <tc7_rate> <tc8_rate>\"\n+\"        <tc9_rate> <tc10_rate> <tc11_rate> <tc12_rate>\\n\"\n \"   <tc_period>\\n\";\n \n static void\n@@ -389,7 +391,7 @@ cmd_tmgr_subport_profile(char **tokens,\n \tstruct rte_sched_subport_params p;\n \tint status, i;\n \n-\tif (n_tokens != 10) {\n+\tif (n_tokens != 19) {\n \t\tsnprintf(out, out_size, MSG_ARG_MISMATCH, tokens[0]);\n \t\treturn;\n \t}\n@@ -410,7 +412,7 @@ cmd_tmgr_subport_profile(char **tokens,\n \t\t\treturn;\n \t\t}\n \n-\tif (parser_read_uint32(&p.tc_period, tokens[9]) != 0) {\n+\tif (parser_read_uint32(&p.tc_period, tokens[18]) != 0) {\n \t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"tc_period\");\n \t\treturn;\n \t}\n@@ -425,10 +427,12 @@ cmd_tmgr_subport_profile(char **tokens,\n static const char cmd_tmgr_pipe_profile_help[] =\n \"tmgr pipe profile\\n\"\n \"   <tb_rate> <tb_size>\\n\"\n-\"   <tc0_rate> <tc1_rate> <tc2_rate> <tc3_rate>\\n\"\n+\"   <tc0_rate> <tc1_rate> <tc2_rate> <tc3_rate> <tc4_rate>\"\n+\"     <tc5_rate> <tc6_rate> <tc7_rate> <tc8_rate>\"\n+\"     <tc9_rate> <tc10_rate> <tc11_rate> <tc12_rate>\\n\"\n \"   <tc_period>\\n\"\n \"   <tc_ov_weight>\\n\"\n-\"   <wrr_weight0..15>\\n\";\n+\"   <wrr_weight0..3>\\n\";\n \n static void\n cmd_tmgr_pipe_profile(char **tokens,\n@@ -439,7 +443,7 @@ cmd_tmgr_pipe_profile(char **tokens,\n \tstruct rte_sched_pipe_params p;\n \tint status, i;\n \n-\tif (n_tokens != 27) {\n+\tif (n_tokens != 24) {\n \t\tsnprintf(out, out_size, MSG_ARG_MISMATCH, tokens[0]);\n \t\treturn;\n \t}\n@@ -460,20 +464,20 @@ cmd_tmgr_pipe_profile(char **tokens,\n \t\t\treturn;\n \t\t}\n \n-\tif (parser_read_uint32(&p.tc_period, tokens[9]) != 0) {\n+\tif (parser_read_uint32(&p.tc_period, tokens[18]) != 0) {\n \t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"tc_period\");\n \t\treturn;\n \t}\n \n #ifdef RTE_SCHED_SUBPORT_TC_OV\n-\tif (parser_read_uint8(&p.tc_ov_weight, tokens[10]) != 0) {\n+\tif (parser_read_uint8(&p.tc_ov_weight, tokens[19]) != 0) {\n \t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"tc_ov_weight\");\n \t\treturn;\n \t}\n #endif\n \n-\tfor (i = 0; i < RTE_SCHED_QUEUES_PER_PIPE; i++)\n-\t\tif (parser_read_uint8(&p.wrr_weights[i], tokens[11 + i]) != 0) {\n+\tfor (i = 0; i < RTE_SCHED_BE_QUEUES_PER_PIPE; i++)\n+\t\tif (parser_read_uint8(&p.wrr_weights[i], tokens[20 + i]) != 0) {\n \t\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"wrr_weights\");\n \t\t\treturn;\n \t\t}\n@@ -490,7 +494,10 @@ static const char cmd_tmgr_help[] =\n \"   rate <rate>\\n\"\n \"   spp <n_subports_per_port>\\n\"\n \"   pps <n_pipes_per_subport>\\n\"\n-\"   qsize <qsize_tc0> <qsize_tc1> <qsize_tc2> <qsize_tc3>\\n\"\n+\"   qsize <qsize_tc0> <qsize_tc1> <qsize_tc2> <qsize_tc3>\"\n+\"   <qsize_tc4> <qsize_tc5> <qsize_tc6> <qsize_tc7>\"\n+\"   <qsize_tc8> <qsize_tc9> <qsize_tc10> <qsize_tc11>\"\n+\"   <qsize_tc12> <qsize_tc13> <qsize_tc14 <qsize_tc15>\\n\"\n \"   fo <frame_overhead>\\n\"\n \"   mtu <mtu>\\n\"\n \"   cpu <cpu_id>\\n\";\n@@ -506,7 +513,7 @@ cmd_tmgr(char **tokens,\n \tstruct tmgr_port *tmgr_port;\n \tint i;\n \n-\tif (n_tokens != 19) {\n+\tif (n_tokens != 31) {\n \t\tsnprintf(out, out_size, MSG_ARG_MISMATCH, tokens[0]);\n \t\treturn;\n \t}\n@@ -548,38 +555,38 @@ cmd_tmgr(char **tokens,\n \t\treturn;\n \t}\n \n-\tfor (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)\n+\tfor (i = 0; i < RTE_SCHED_QUEUES_PER_PIPE; i++)\n \t\tif (parser_read_uint16(&p.qsize[i], tokens[9 + i]) != 0) {\n \t\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"qsize\");\n \t\t\treturn;\n \t\t}\n \n-\tif (strcmp(tokens[13], \"fo\") != 0) {\n+\tif (strcmp(tokens[25], \"fo\") != 0) {\n \t\tsnprintf(out, out_size, MSG_ARG_NOT_FOUND, \"fo\");\n \t\treturn;\n \t}\n \n-\tif (parser_read_uint32(&p.frame_overhead, tokens[14]) != 0) {\n+\tif (parser_read_uint32(&p.frame_overhead, tokens[26]) != 0) {\n \t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"frame_overhead\");\n \t\treturn;\n \t}\n \n-\tif (strcmp(tokens[15], \"mtu\") != 0) {\n+\tif (strcmp(tokens[27], \"mtu\") != 0) {\n \t\tsnprintf(out, out_size, MSG_ARG_NOT_FOUND, \"mtu\");\n \t\treturn;\n \t}\n \n-\tif (parser_read_uint32(&p.mtu, tokens[16]) != 0) {\n+\tif (parser_read_uint32(&p.mtu, tokens[28]) != 0) {\n \t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"mtu\");\n \t\treturn;\n \t}\n \n-\tif (strcmp(tokens[17], \"cpu\") != 0) {\n+\tif (strcmp(tokens[29], \"cpu\") != 0) {\n \t\tsnprintf(out, out_size, MSG_ARG_NOT_FOUND, \"cpu\");\n \t\treturn;\n \t}\n \n-\tif (parser_read_uint32(&p.cpu_id, tokens[18]) != 0) {\n+\tif (parser_read_uint32(&p.cpu_id, tokens[30]) != 0) {\n \t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"cpu_id\");\n \t\treturn;\n \t}\ndiff --git a/examples/ip_pipeline/tmgr.c b/examples/ip_pipeline/tmgr.c\nindex 40cbf1d0a..0a04ca4a6 100644\n--- a/examples/ip_pipeline/tmgr.c\n+++ b/examples/ip_pipeline/tmgr.c\n@@ -105,7 +105,7 @@ tmgr_port_create(const char *name, struct tmgr_port_params *params)\n \tp.n_subports_per_port = params->n_subports_per_port;\n \tp.n_pipes_per_subport = params->n_pipes_per_subport;\n \n-\tfor (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)\n+\tfor (i = 0; i < RTE_SCHED_QUEUES_PER_PIPE; i++)\n \t\tp.qsize[i] = params->qsize[i];\n \n \tp.pipe_profiles = pipe_profile;\ndiff --git a/examples/ip_pipeline/tmgr.h b/examples/ip_pipeline/tmgr.h\nindex 0b497e795..aad96097d 100644\n--- a/examples/ip_pipeline/tmgr.h\n+++ b/examples/ip_pipeline/tmgr.h\n@@ -39,11 +39,11 @@ tmgr_port_find(const char *name);\n struct tmgr_port_params {\n \tuint32_t rate;\n \tuint32_t n_subports_per_port;\n-\tuint32_t n_pipes_per_subport;\n-\tuint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];\n \tuint32_t frame_overhead;\n \tuint32_t mtu;\n \tuint32_t cpu_id;\n+\tuint32_t n_pipes_per_subport;\n+\tuint16_t qsize[RTE_SCHED_QUEUES_PER_PIPE];\n };\n \n int\ndiff --git a/lib/librte_pipeline/rte_table_action.c b/lib/librte_pipeline/rte_table_action.c\nindex a54ec46bc..47d7efbc1 100644\n--- a/lib/librte_pipeline/rte_table_action.c\n+++ b/lib/librte_pipeline/rte_table_action.c\n@@ -401,7 +401,6 @@ pkt_work_tm(struct rte_mbuf *mbuf,\n {\n \tstruct dscp_table_entry_data *dscp_entry = &dscp_table->entry[dscp];\n \tuint32_t queue_id = data->queue_id |\n-\t\t\t\t(dscp_entry->tc << 2) |\n \t\t\t\tdscp_entry->tc_queue;\n \trte_mbuf_sched_set(mbuf, queue_id, dscp_entry->tc,\n \t\t\t\t(uint8_t)dscp_entry->color);\ndiff --git a/lib/librte_pipeline/rte_table_action.h b/lib/librte_pipeline/rte_table_action.h\nindex 44041b5c9..82bc9d9ac 100644\n--- a/lib/librte_pipeline/rte_table_action.h\n+++ b/lib/librte_pipeline/rte_table_action.h\n@@ -181,10 +181,10 @@ struct rte_table_action_lb_params {\n  * RTE_TABLE_ACTION_MTR\n  */\n /** Max number of traffic classes (TCs). */\n-#define RTE_TABLE_ACTION_TC_MAX                                  4\n+#define RTE_TABLE_ACTION_TC_MAX                                  16\n \n /** Max number of queues per traffic class. */\n-#define RTE_TABLE_ACTION_TC_QUEUE_MAX                            4\n+#define RTE_TABLE_ACTION_TC_QUEUE_MAX                            16\n \n /** Differentiated Services Code Point (DSCP) translation table entry. */\n struct rte_table_action_dscp_table_entry {\n",
    "prefixes": [
        "v3",
        "09/11"
    ]
}