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GET /api/patches/55717/?format=api
{ "id": 55717, "url": "http://patches.dpdk.org/api/patches/55717/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190630180609.36705-32-jerinj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190630180609.36705-32-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190630180609.36705-32-jerinj@marvell.com", "date": "2019-06-30T18:05:43", "name": "[v2,31/57] net/octeontx2: add remaining PTP operations", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d55833063a1f157a02649981b0eae65ed52a970a", "submitter": { "id": 1188, "url": "http://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190630180609.36705-32-jerinj@marvell.com/mbox/", "series": [ { "id": 5236, "url": "http://patches.dpdk.org/api/series/5236/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5236", "date": "2019-06-30T18:05:12", "name": "OCTEON TX2 Ethdev driver", "version": 2, "mbox": "http://patches.dpdk.org/series/5236/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/55717/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/55717/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 3BB5E1BB78;\n\tSun, 30 Jun 2019 20:11:04 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n\t[67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 138171B9EA\n\tfor <dev@dpdk.org>; Sun, 30 Jun 2019 20:08:10 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5UI73OK028454; Sun, 30 Jun 2019 11:08:10 -0700", "from sc-exch04.marvell.com ([199.233.58.184])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2te5bn4gkf-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tSun, 30 Jun 2019 11:08:10 -0700", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH04.marvell.com\n\t(10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSun, 30 Jun 2019 11:08:09 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sun, 30 Jun 2019 11:08:09 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id DA55C3F703F;\n\tSun, 30 Jun 2019 11:08:06 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=9iZrMsh3WCX3n6IZnAHqMSta9bIyII+SjRRlvKvKtz8=;\n\tb=CryRKnKD4UqnTL9GgvMpdD4gBylu+fg935H+ayp1hNWzBCKVh8a9RkY2Ng+1nmsDFuH/\n\twHszK2iTy6ew6rhb5TCs71lrvy9CdSju77Zg6eN+8T4f21kzveF/gA7e+q61Dl40hgcG\n\tg7LPl/UnZccbsn+EjXlhYcqmNhVQHCFVi6tsg9E6uHLSEwEyMfQ58g9pYMrjxUAYvJTQ\n\tJsxdLJxmRcm2C6iMxcu/Jlmf80qG53tJGD12HH1w1hcfmtIrVYStdSgBoAaisnPpvvVk\n\tQHwNkoaAnRp5+dSpBHSAdIVJUEFwyhoG/GYAE6Cz3LAQU/qFWaC0vj+Bk091sTzkaBPa\n\t9w== ", "From": "<jerinj@marvell.com>", "To": "<dev@dpdk.org>, John McNamara <john.mcnamara@intel.com>, Marko Kovacevic\n\t<marko.kovacevic@intel.com>, Jerin Jacob <jerinj@marvell.com>, \"Nithin\n\tDabilpuram\" <ndabilpuram@marvell.com>, Kiran Kumar K\n\t<kirankumark@marvell.com>", "CC": "Harman Kalra <hkalra@marvell.com>, Zyta Szpak <zyta@marvell.com>", "Date": "Sun, 30 Jun 2019 23:35:43 +0530", "Message-ID": "<20190630180609.36705-32-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190630180609.36705-1-jerinj@marvell.com>", "References": "<20190602152434.23996-1-jerinj@marvell.com>\n\t<20190630180609.36705-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-30_08:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v2 31/57] net/octeontx2: add remaining PTP\n\toperations", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Harman Kalra <hkalra@marvell.com>\n\nAdd remaining PTP configuration/slowpath operations.\nTimesync feature is available only for PF devices.\n\nSigned-off-by: Harman Kalra <hkalra@marvell.com>\nSigned-off-by: Zyta Szpak <zyta@marvell.com>\n---\n doc/guides/nics/features/octeontx2.ini | 2 +\n drivers/net/octeontx2/otx2_ethdev.c | 6 ++\n drivers/net/octeontx2/otx2_ethdev.h | 11 +++\n drivers/net/octeontx2/otx2_ptp.c | 130 +++++++++++++++++++++++++\n 4 files changed, 149 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/octeontx2.ini b/doc/guides/nics/features/octeontx2.ini\nindex 00feb0cf2..46fb00be6 100644\n--- a/doc/guides/nics/features/octeontx2.ini\n+++ b/doc/guides/nics/features/octeontx2.ini\n@@ -23,6 +23,8 @@ RSS reta update = Y\n Inner RSS = Y\n Flow control = Y\n Packet type parsing = Y\n+Timesync = Y\n+Timestamp offload = Y\n Rx descriptor status = Y\n Basic stats = Y\n Stats per queue = Y\ndiff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c\nindex 29e8130f4..7512aacb3 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.c\n+++ b/drivers/net/octeontx2/otx2_ethdev.c\n@@ -47,6 +47,7 @@ nix_get_tx_offload_capa(struct otx2_eth_dev *dev)\n \n static const struct otx2_dev_ops otx2_dev_ops = {\n \t.link_status_update = otx2_eth_dev_link_status_update,\n+\t.ptp_info_update = otx2_eth_dev_ptp_info_update\n };\n \n static int\n@@ -1331,6 +1332,11 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {\n \t.flow_ctrl_set = otx2_nix_flow_ctrl_set,\n \t.timesync_enable = otx2_nix_timesync_enable,\n \t.timesync_disable = otx2_nix_timesync_disable,\n+\t.timesync_read_rx_timestamp = otx2_nix_timesync_read_rx_timestamp,\n+\t.timesync_read_tx_timestamp = otx2_nix_timesync_read_tx_timestamp,\n+\t.timesync_adjust_time = otx2_nix_timesync_adjust_time,\n+\t.timesync_read_time = otx2_nix_timesync_read_time,\n+\t.timesync_write_time = otx2_nix_timesync_write_time,\n };\n \n static inline int\ndiff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h\nindex 1ca28add4..8f8d93a39 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.h\n+++ b/drivers/net/octeontx2/otx2_ethdev.h\n@@ -430,5 +430,16 @@ void otx2_nix_form_default_desc(struct otx2_eth_txq *txq);\n /* Timesync - PTP routines */\n int otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev);\n int otx2_nix_timesync_disable(struct rte_eth_dev *eth_dev);\n+int otx2_nix_timesync_read_rx_timestamp(struct rte_eth_dev *eth_dev,\n+\t\t\t\t\tstruct timespec *timestamp,\n+\t\t\t\t\tuint32_t flags);\n+int otx2_nix_timesync_read_tx_timestamp(struct rte_eth_dev *eth_dev,\n+\t\t\t\t\tstruct timespec *timestamp);\n+int otx2_nix_timesync_adjust_time(struct rte_eth_dev *eth_dev, int64_t delta);\n+int otx2_nix_timesync_write_time(struct rte_eth_dev *eth_dev,\n+\t\t\t\t const struct timespec *ts);\n+int otx2_nix_timesync_read_time(struct rte_eth_dev *eth_dev,\n+\t\t\t\tstruct timespec *ts);\n+int otx2_eth_dev_ptp_info_update(struct otx2_dev *dev, bool ptp_en);\n \n #endif /* __OTX2_ETHDEV_H__ */\ndiff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c\nindex 105067949..5291da241 100644\n--- a/drivers/net/octeontx2/otx2_ptp.c\n+++ b/drivers/net/octeontx2/otx2_ptp.c\n@@ -57,6 +57,23 @@ nix_ptp_config(struct rte_eth_dev *eth_dev, int en)\n \treturn otx2_mbox_process(mbox);\n }\n \n+int\n+otx2_eth_dev_ptp_info_update(struct otx2_dev *dev, bool ptp_en)\n+{\n+\tstruct otx2_eth_dev *otx2_dev = (struct otx2_eth_dev *)dev;\n+\tstruct rte_eth_dev *eth_dev = otx2_dev->eth_dev;\n+\tint i;\n+\n+\totx2_dev->ptp_en = ptp_en;\n+\tfor (i = 0; i < eth_dev->data->nb_rx_queues; i++) {\n+\t\tstruct otx2_eth_rxq *rxq = eth_dev->data->rx_queues[i];\n+\t\trxq->mbuf_initializer =\n+\t\t\totx2_nix_rxq_mbuf_setup(otx2_dev,\n+\t\t\t\t\t\teth_dev->data->port_id);\n+\t}\n+\treturn 0;\n+}\n+\n int\n otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)\n {\n@@ -133,3 +150,116 @@ otx2_nix_timesync_disable(struct rte_eth_dev *eth_dev)\n \t}\n \treturn rc;\n }\n+\n+int\n+otx2_nix_timesync_read_rx_timestamp(struct rte_eth_dev *eth_dev,\n+\t\t\t\t struct timespec *timestamp,\n+\t\t\t\t uint32_t __rte_unused flags)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct otx2_timesync_info *tstamp = &dev->tstamp;\n+\tuint64_t ns;\n+\n+\tif (!tstamp->rx_ready)\n+\t\treturn -EINVAL;\n+\n+\tns = rte_timecounter_update(&dev->rx_tstamp_tc, tstamp->rx_tstamp);\n+\t*timestamp = rte_ns_to_timespec(ns);\n+\ttstamp->rx_ready = 0;\n+\n+\totx2_nix_dbg(\"rx timestamp: %llu sec: %lu nsec %lu\",\n+\t\t (unsigned long long)tstamp->rx_tstamp, timestamp->tv_sec,\n+\t\t timestamp->tv_nsec);\n+\n+\treturn 0;\n+}\n+\n+int\n+otx2_nix_timesync_read_tx_timestamp(struct rte_eth_dev *eth_dev,\n+\t\t\t\t struct timespec *timestamp)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct otx2_timesync_info *tstamp = &dev->tstamp;\n+\tuint64_t ns;\n+\n+\tif (*tstamp->tx_tstamp == 0)\n+\t\treturn -EINVAL;\n+\n+\tns = rte_timecounter_update(&dev->tx_tstamp_tc, *tstamp->tx_tstamp);\n+\t*timestamp = rte_ns_to_timespec(ns);\n+\n+\totx2_nix_dbg(\"tx timestamp: %llu sec: %lu nsec %lu\",\n+\t\t *(unsigned long long *)tstamp->tx_tstamp,\n+\t\t timestamp->tv_sec, timestamp->tv_nsec);\n+\n+\t*tstamp->tx_tstamp = 0;\n+\trte_wmb();\n+\n+\treturn 0;\n+}\n+\n+int\n+otx2_nix_timesync_adjust_time(struct rte_eth_dev *eth_dev, int64_t delta)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct otx2_mbox *mbox = dev->mbox;\n+\tstruct ptp_req *req;\n+\tstruct ptp_rsp *rsp;\n+\tint rc;\n+\n+\t/* Adjust the frequent to make tics increments in 10^9 tics per sec */\n+\tif (delta < PTP_FREQ_ADJUST && delta > -PTP_FREQ_ADJUST) {\n+\t\treq = otx2_mbox_alloc_msg_ptp_op(mbox);\n+\t\treq->op = PTP_OP_ADJFINE;\n+\t\treq->scaled_ppm = delta;\n+\n+\t\trc = otx2_mbox_process_msg(mbox, (void *)&rsp);\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\t}\n+\tdev->systime_tc.nsec += delta;\n+\tdev->rx_tstamp_tc.nsec += delta;\n+\tdev->tx_tstamp_tc.nsec += delta;\n+\n+\treturn 0;\n+}\n+\n+int\n+otx2_nix_timesync_write_time(struct rte_eth_dev *eth_dev,\n+\t\t\t const struct timespec *ts)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tuint64_t ns;\n+\n+\tns = rte_timespec_to_ns(ts);\n+\t/* Set the time counters to a new value. */\n+\tdev->systime_tc.nsec = ns;\n+\tdev->rx_tstamp_tc.nsec = ns;\n+\tdev->tx_tstamp_tc.nsec = ns;\n+\n+\treturn 0;\n+}\n+\n+int\n+otx2_nix_timesync_read_time(struct rte_eth_dev *eth_dev, struct timespec *ts)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct otx2_mbox *mbox = dev->mbox;\n+\tstruct ptp_req *req;\n+\tstruct ptp_rsp *rsp;\n+\tuint64_t ns;\n+\tint rc;\n+\n+\treq = otx2_mbox_alloc_msg_ptp_op(mbox);\n+\treq->op = PTP_OP_GET_CLOCK;\n+\trc = otx2_mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tns = rte_timecounter_update(&dev->systime_tc, rsp->clk);\n+\t*ts = rte_ns_to_timespec(ns);\n+\n+\totx2_nix_dbg(\"PTP time read: %ld.%09ld\", ts->tv_sec, ts->tv_nsec);\n+\n+\treturn 0;\n+}\n", "prefixes": [ "v2", "31/57" ] }